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-rw-r--r--board/armltd/integrator/timer.c2
-rw-r--r--board/freescale/mpc8313erdb/sdram.c2
2 files changed, 2 insertions, 2 deletions
diff --git a/board/armltd/integrator/timer.c b/board/armltd/integrator/timer.c
index 087cf59..7562ffa 100644
--- a/board/armltd/integrator/timer.c
+++ b/board/armltd/integrator/timer.c
@@ -124,7 +124,7 @@ void set_timer (ulong ticks)
}
/* delay usec useconds */
-void udelay (unsigned long usec)
+void __udelay (unsigned long usec)
{
ulong tmo, tmp;
diff --git a/board/freescale/mpc8313erdb/sdram.c b/board/freescale/mpc8313erdb/sdram.c
index cb13829..0c4fd68 100644
--- a/board/freescale/mpc8313erdb/sdram.c
+++ b/board/freescale/mpc8313erdb/sdram.c
@@ -72,7 +72,7 @@ static long fixed_sdram(void)
* Erratum DDR3 requires a 50ms delay after clearing DDRCDR[DDR_cfg],
* or the DDR2 controller may fail to initialize correctly.
*/
- udelay(50000);
+ __udelay(50000);
im->ddr.csbnds[0].csbnds = (msize - 1) >> 24;
im->ddr.cs_config[0] = CONFIG_SYS_DDR_CONFIG;