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-rw-r--r--board/amcc/sequoia/init.S26
-rw-r--r--board/amcc/sequoia/sdram.c7
-rw-r--r--board/esd/pmc440/sdram.c7
-rw-r--r--board/lwmon5/lwmon5.c157
4 files changed, 113 insertions, 84 deletions
diff --git a/board/amcc/sequoia/init.S b/board/amcc/sequoia/init.S
index ff6ae66..306c92c 100644
--- a/board/amcc/sequoia/init.S
+++ b/board/amcc/sequoia/init.S
@@ -39,15 +39,8 @@
tlbtab:
tlbtab_start
- /*
- * BOOT_CS (FLASH) must be first. Before relocation SA_I can be off to use the
- * speed up boot process. It is patched after relocation to enable SA_I
- */
-#ifndef CONFIG_NAND_SPL
- tlbentry( CFG_BOOT_BASE_ADDR, SZ_256M, CFG_BOOT_BASE_ADDR, 1, AC_R|AC_W|AC_X|SA_G )
-#else
- tlbentry( CFG_NAND_BOOT_SPL_SRC, SZ_4K, CFG_NAND_BOOT_SPL_SRC, 1, AC_R|AC_W|AC_X|SA_G )
-#endif
+ /* vxWorks needs this as first entry for the Machine Check interrupt */
+ tlbentry( 0x40000000, SZ_256M, 0, 0, AC_R|AC_W|AC_X|SA_G|SA_I )
/* TLB-entry for DDR SDRAM (Up to 2GB) */
#ifdef CONFIG_4xx_DCACHE
@@ -56,6 +49,18 @@ tlbtab:
tlbentry( CFG_SDRAM_BASE, SZ_256M, CFG_SDRAM_BASE, 0, AC_R|AC_W|AC_X|SA_G|SA_I )
#endif
+ /* TLB-entry for EBC */
+ tlbentry( CFG_BCSR_BASE, SZ_256M, CFG_BCSR_BASE, 1, AC_R|AC_W|AC_X|SA_G|SA_I )
+
+ /* BOOT_CS (FLASH) must be forth. Before relocation SA_I can be off to use the
+ * speed up boot process. It is patched after relocation to enable SA_I
+ */
+#ifndef CONFIG_NAND_SPL
+ tlbentry( CFG_BOOT_BASE_ADDR, SZ_256M, CFG_BOOT_BASE_ADDR, 1, AC_R|AC_W|AC_X|SA_G )
+#else
+ tlbentry( CFG_NAND_BOOT_SPL_SRC, SZ_4K, CFG_NAND_BOOT_SPL_SRC, 1, AC_R|AC_W|AC_X|SA_G )
+#endif
+
#ifdef CFG_INIT_RAM_DCACHE
/* TLB-entry for init-ram in dcache (SA_I must be turned off!) */
tlbentry( CFG_INIT_RAM_ADDR, SZ_64K, CFG_INIT_RAM_ADDR, 0, AC_R|AC_W|AC_X|SA_G )
@@ -67,9 +72,6 @@ tlbtab:
tlbentry( CFG_PCI_MEMBASE2, SZ_256M, CFG_PCI_MEMBASE2, 1, AC_R|AC_W|SA_G|SA_I )
tlbentry( CFG_PCI_MEMBASE3, SZ_256M, CFG_PCI_MEMBASE3, 1, AC_R|AC_W|SA_G|SA_I )
- /* TLB-entry for EBC */
- tlbentry( CFG_BCSR_BASE, SZ_1K, CFG_BCSR_BASE, 1, AC_R|AC_W|AC_X|SA_G|SA_I )
-
/* TLB-entry for NAND */
tlbentry( CFG_NAND_ADDR, SZ_1K, CFG_NAND_ADDR, 1, AC_R|AC_W|AC_X|SA_G|SA_I )
diff --git a/board/amcc/sequoia/sdram.c b/board/amcc/sequoia/sdram.c
index 5e93f6c..b43ec48 100644
--- a/board/amcc/sequoia/sdram.c
+++ b/board/amcc/sequoia/sdram.c
@@ -106,5 +106,12 @@ long int initdram (int board_type)
denali_core_search_data_eye();
#endif
+ /*
+ * Clear possible errors resulting from data-eye-search.
+ * If not done, then we could get an interrupt later on when
+ * exceptions are enabled.
+ */
+ set_mcsr(get_mcsr());
+
return (CFG_MBYTES_SDRAM << 20);
}
diff --git a/board/esd/pmc440/sdram.c b/board/esd/pmc440/sdram.c
index 7f92d37..624c457 100644
--- a/board/esd/pmc440/sdram.c
+++ b/board/esd/pmc440/sdram.c
@@ -104,5 +104,12 @@ long int initdram (int board_type)
denali_core_search_data_eye();
#endif
+ /*
+ * Clear possible errors resulting from data-eye-search.
+ * If not done, then we could get an interrupt later on when
+ * exceptions are enabled.
+ */
+ set_mcsr(get_mcsr());
+
return (CFG_MBYTES_SDRAM << 20);
}
diff --git a/board/lwmon5/lwmon5.c b/board/lwmon5/lwmon5.c
index 9b24a7e..815c01f 100644
--- a/board/lwmon5/lwmon5.c
+++ b/board/lwmon5/lwmon5.c
@@ -234,78 +234,6 @@ int misc_init_r(void)
mtdcr(plb4_acr, reg);
/*
- * Reset Lime controller
- */
- gpio_write_bit(CFG_GPIO_LIME_S, 1);
- udelay(500);
- gpio_write_bit(CFG_GPIO_LIME_RST, 1);
-
- /* Lime memory clock adjusted to 100MHz */
- out_be32((void *)CFG_LIME_SDRAM_CLOCK, CFG_LIME_CLOCK_100MHZ);
- /* Wait untill time expired. Because of requirements in lime manual */
- udelay(300);
- /* Write lime controller memory parameters */
- out_be32((void *)CFG_LIME_MMR, CFG_LIME_MMR_VALUE);
-
- /*
- * Init display controller
- */
- /* Setup dot clock (internal PLL, division rate 1/16) */
- out_be32((void *)0xc1fd0100, 0x00000f00);
-
- /* Lime L0 init (16 bpp, 640x480) */
- out_be32((void *)0xc1fd0020, 0x801401df);
- out_be32((void *)0xc1fd0024, 0x0);
- out_be32((void *)0xc1fd0028, 0x0);
- out_be32((void *)0xc1fd002c, 0x0);
- out_be32((void *)0xc1fd0110, 0x0);
- out_be32((void *)0xc1fd0114, 0x0);
- out_be32((void *)0xc1fd0118, 0x01df0280);
-
- /* Display timing init */
- out_be32((void *)0xc1fd0004, 0x031f0000);
- out_be32((void *)0xc1fd0008, 0x027f027f);
- out_be32((void *)0xc1fd000c, 0x015f028f);
- out_be32((void *)0xc1fd0010, 0x020c0000);
- out_be32((void *)0xc1fd0014, 0x01df01ea);
- out_be32((void *)0xc1fd0018, 0x0);
- out_be32((void *)0xc1fd001c, 0x01e00280);
-
-#if 1
- /*
- * Clear framebuffer using Lime's drawing engine
- * (draw blue rect. with white border around it)
- */
- /* Setup mode and fbbase, xres, fg, bg */
- out_be32((void *)0xc1ff0420, 0x8300);
- out_be32((void *)0xc1ff0440, 0x0000);
- out_be32((void *)0xc1ff0444, 0x0280);
- out_be32((void *)0xc1ff0480, 0x7fff);
- out_be32((void *)0xc1ff0484, 0x0000);
- /* Reset clipping rectangle */
- out_be32((void *)0xc1ff0454, 0x0000);
- out_be32((void *)0xc1ff0458, 0x0280);
- out_be32((void *)0xc1ff045c, 0x0000);
- out_be32((void *)0xc1ff0460, 0x01e0);
- /* Draw white rect. */
- out_be32((void *)0xc1ff04a0, 0x09410000);
- out_be32((void *)0xc1ff04a0, 0x00000000);
- out_be32((void *)0xc1ff04a0, 0x01e00280);
- udelay(2000);
- /* Draw blue rect. */
- out_be32((void *)0xc1ff0480, 0x001f);
- out_be32((void *)0xc1ff04a0, 0x09410000);
- out_be32((void *)0xc1ff04a0, 0x00010001);
- out_be32((void *)0xc1ff04a0, 0x01de027e);
-#endif
- /* Display enable, L0 layer */
- out_be32((void *)0xc1fd0100, 0x80010f00);
-
- /* TFT-LCD enable - PWM duty, lamp on */
- out_be32((void *)0xc4000024, 0x64);
- out_be32((void *)0xc4000020, 0x701);
-
- /*
* Init matrix keyboard
*/
misc_init_r_kbd();
@@ -562,3 +490,88 @@ U_BOOT_CMD(
"eepromwp- eeprom write protect off/on\n",
"<on|off> - enable (on) or disable (off) I2C EEPROM write protect\n"
);
+
+#if defined(CONFIG_VIDEO)
+#include <video_fb.h>
+#include <mb862xx.h>
+
+extern GraphicDevice mb862xx;
+
+static const gdc_regs init_regs [] =
+{
+ {0x0100, 0x00000f00},
+ {0x0020, 0x801401df},
+ {0x0024, 0x00000000},
+ {0x0028, 0x00000000},
+ {0x002c, 0x00000000},
+ {0x0110, 0x00000000},
+ {0x0114, 0x00000000},
+ {0x0118, 0x01df0280},
+ {0x0004, 0x031f0000},
+ {0x0008, 0x027f027f},
+ {0x000c, 0x015f028f},
+ {0x0010, 0x020c0000},
+ {0x0014, 0x01df01ea},
+ {0x0018, 0x00000000},
+ {0x001c, 0x01e00280},
+ {0x0100, 0x80010f00},
+ {0x0, 0x0}
+};
+
+const gdc_regs *board_get_regs (void)
+{
+ return init_regs;
+}
+
+/* Returns Lime base address */
+unsigned int board_video_init (void)
+{
+ /*
+ * Reset Lime controller
+ */
+ gpio_write_bit(CFG_GPIO_LIME_S, 1);
+ udelay(500);
+ gpio_write_bit(CFG_GPIO_LIME_RST, 1);
+
+ /* Lime memory clock adjusted to 100MHz */
+ out_be32((void *)CFG_LIME_SDRAM_CLOCK, CFG_LIME_CLOCK_100MHZ);
+ /* Wait untill time expired. Because of requirements in lime manual */
+ udelay(300);
+ /* Write lime controller memory parameters */
+ out_be32((void *)CFG_LIME_MMR, CFG_LIME_MMR_VALUE);
+
+ mb862xx.winSizeX = 640;
+ mb862xx.winSizeY = 480;
+ mb862xx.gdfBytesPP = 2;
+ mb862xx.gdfIndex = GDF_15BIT_555RGB;
+
+ return CFG_LIME_BASE_0;
+}
+
+void board_backlight_switch (int flag)
+{
+ if (flag) {
+ /* pwm duty, lamp on */
+ out_be32((void *)(CFG_FPGA_BASE_0 + 0x00000024), 0x64);
+ out_be32((void *)(CFG_FPGA_BASE_0 + 0x00000020), 0x701);
+ } else {
+ /* lamp off */
+ out_be32((void *)(CFG_FPGA_BASE_0 + 0x00000024), 0x00);
+ out_be32((void *)(CFG_FPGA_BASE_0 + 0x00000020), 0x00);
+ }
+}
+
+#if defined(CONFIG_CONSOLE_EXTRA_INFO)
+/*
+ * Return text to be printed besides the logo.
+ */
+void video_get_info_str (int line_number, char *info)
+{
+ if (line_number == 1) {
+ strcpy (info, " Board: Lwmon5 (Liebherr Elektronik GmbH)");
+ } else {
+ info [0] = '\0';
+ }
+}
+#endif
+#endif /* CONFIG_VIDEO */
generated by cgit v1.1 at 2024-11-20 16:14:10 +0000