5 files changed, 42 insertions, 6 deletions

diff --git a/board/freescale/mx53_ard/lowlevel_init.S b/board/freescale/mx53_ard/lowlevel_init.S
index 2a251f7..f8e7632 100644
--- a/board/freescale/mx53_ard/lowlevel_init.S
+++ b/board/freescale/mx53_ard/lowlevel_init.S
@@ -58,8 +58,15 @@
 .endm /* init_aips */
 
 .macro setup_pll pll, freq
+	/*
+	 * If freq < 300MHz, we need to set dpdck0_2_en to 0
+	 */
+	ldr r0, =\freq
+	ldr r1, =0x300
+	cmp r0, r1
+	ldrcs r1, =0x00001232
+	ldrcc r1, =0x00000232
 	ldr r0, =\pll
-	ldr r1, =0x00001232
 	str r1, [r0, #PLL_DP_CTL]
 	mov r1, #0x2
 	str r1, [r0, #PLL_DP_CONFIG]
diff --git a/board/freescale/mx53_evk/lowlevel_init.S b/board/freescale/mx53_evk/lowlevel_init.S
index 0122353..b52e518 100644
--- a/board/freescale/mx53_evk/lowlevel_init.S
+++ b/board/freescale/mx53_evk/lowlevel_init.S
@@ -58,8 +58,15 @@
 .endm /* init_aips */
 
 .macro setup_pll pll, freq
+	/*
+	 * If freq < 300MHz, we need to set dpdck0_2_en to 0
+	 */
+	ldr r0, =\freq
+	ldr r1, =0x300
+	cmp r0, r1
+	ldrcs r1, =0x00001232
+	ldrcc r1, =0x00000232
 	ldr r0, =\pll
-	ldr r1, =0x00001232
 	str r1, [r0, #PLL_DP_CTL]
 	mov r1, #0x2
 	str r1, [r0, #PLL_DP_CONFIG]
diff --git a/board/freescale/mx53_loco/lowlevel_init.S b/board/freescale/mx53_loco/lowlevel_init.S
index ff879a6..dbcb074 100644
--- a/board/freescale/mx53_loco/lowlevel_init.S
+++ b/board/freescale/mx53_loco/lowlevel_init.S
@@ -56,8 +56,15 @@
 .endm /* init_aips */
 
 .macro setup_pll pll, freq
+	/*
+	 * If freq < 300MHz, we need to set dpdck0_2_en to 0
+	 */
+	ldr r0, =\freq
+	ldr r1, =0x300
+	cmp r0, r1
+	ldrcs r1, =0x00001232
+	ldrcc r1, =0x00000232
 	ldr r0, =\pll
-	ldr r1, =0x00001232
 	str r1, [r0, #PLL_DP_CTL]
 	mov r1, #0x2
 	str r1, [r0, #PLL_DP_CONFIG]
diff --git a/board/freescale/mx53_pcba/lowlevel_init.S b/board/freescale/mx53_pcba/lowlevel_init.S
index 6a95a21..f9b1f11 100644
--- a/board/freescale/mx53_pcba/lowlevel_init.S
+++ b/board/freescale/mx53_pcba/lowlevel_init.S
@@ -56,8 +56,15 @@
 .endm /* init_aips */
 
 .macro setup_pll pll, freq
+	/*
+	 * If freq < 300MHz, we need to set dpdck0_2_en to 0
+	 */
+	ldr r0, =\freq
+	ldr r1, =0x300
+	cmp r0, r1
+	ldrcs r1, =0x00001232
+	ldrcc r1, =0x00000232
 	ldr r0, =\pll
-	ldr r1, =0x00001232
 	str r1, [r0, #PLL_DP_CTL]
 	mov r1, #0x2
 	str r1, [r0, #PLL_DP_CONFIG]
diff --git a/board/freescale/mx53_smd/lowlevel_init.S b/board/freescale/mx53_smd/lowlevel_init.S
index 07af735..8aef8b2 100644
--- a/board/freescale/mx53_smd/lowlevel_init.S
+++ b/board/freescale/mx53_smd/lowlevel_init.S
@@ -56,8 +56,15 @@
 .endm /* init_aips */
 
 .macro setup_pll pll, freq
+	/*
+	 * If freq < 300MHz, we need to set dpdck0_2_en to 0
+	 */
+	ldr r0, =\freq
+	ldr r1, =0x12c
+	cmp r0, r1
+	ldrcs r1, =0x00001232
+	ldrcc r1, =0x00000232
 	ldr r0, =\pll
-	ldr r1, =0x00001232
 	str r1, [r0, #PLL_DP_CTL]
 	mov r1, #0x2
 	str r1, [r0, #PLL_DP_CONFIG]
@@ -74,7 +81,8 @@
 	str r1, [r0, #PLL_DP_MFN]
 	str r1, [r0, #PLL_DP_HFS_MFN]
 
-	ldr r1, =0x00001232
+	ldrcs r1, =0x00001232
+	ldrcc r1, =0x00000232
 	str r1, [r0, #PLL_DP_CTL]
 1:	ldr r1, [r0, #PLL_DP_CTL]
 	ands r1, r1, #0x1