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-rw-r--r--board/actux3/Makefile8
-rw-r--r--board/actux3/actux3.c149
-rw-r--r--board/actux3/actux3_hw.h44
-rw-r--r--board/actux3/u-boot.lds99
4 files changed, 0 insertions, 300 deletions
diff --git a/board/actux3/Makefile b/board/actux3/Makefile
deleted file mode 100644
index f628f26..0000000
--- a/board/actux3/Makefile
+++ /dev/null
@@ -1,8 +0,0 @@
-#
-# (C) Copyright 2000-2006
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# SPDX-License-Identifier: GPL-2.0+
-#
-
-obj-y := actux3.o
diff --git a/board/actux3/actux3.c b/board/actux3/actux3.c
deleted file mode 100644
index 09c803c..0000000
--- a/board/actux3/actux3.c
+++ /dev/null
@@ -1,149 +0,0 @@
-/*
- * (C) Copyright 2007
- * Michael Schwingen, michael@schwingen.org
- *
- * (C) Copyright 2006
- * Stefan Roese, DENX Software Engineering, sr@denx.de.
- *
- * (C) Copyright 2002
- * Kyle Harris, Nexus Technologies, Inc. kharris@nexus-tech.net
- *
- * (C) Copyright 2002
- * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
- * Marius Groeger <mgroeger@sysgo.de>
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-#include <common.h>
-#include <command.h>
-#include <malloc.h>
-#include <asm/arch/ixp425.h>
-#include <asm/io.h>
-#include <miiphy.h>
-#include "actux3_hw.h"
-
-DECLARE_GLOBAL_DATA_PTR;
-
-int board_early_init_f(void)
-{
- /* CS1: IPAC-X */
- writel(0x94d10013, IXP425_EXP_CS1);
- /* CS5: Debug port */
- writel(0x9d520003, IXP425_EXP_CS5);
- /* CS6: Release/Option register */
- writel(0x81860001, IXP425_EXP_CS6);
- /* CS7: LEDs */
- writel(0x80900003, IXP425_EXP_CS7);
-
- return 0;
-}
-
-int board_init(void)
-{
- /* adress of boot parameters */
- gd->bd->bi_boot_params = 0x00000100;
-
- GPIO_OUTPUT_ENABLE(CONFIG_SYS_GPIO_IORST);
- GPIO_OUTPUT_ENABLE(CONFIG_SYS_GPIO_ETHRST);
- GPIO_OUTPUT_ENABLE(CONFIG_SYS_GPIO_DSR);
- GPIO_OUTPUT_ENABLE(CONFIG_SYS_GPIO_DCD);
- GPIO_OUTPUT_ENABLE(CONFIG_SYS_GPIO_LED5_GN);
- GPIO_OUTPUT_ENABLE(CONFIG_SYS_GPIO_LED6_RT);
- GPIO_OUTPUT_ENABLE(CONFIG_SYS_GPIO_LED6_GN);
-
- GPIO_OUTPUT_CLEAR(CONFIG_SYS_GPIO_IORST);
- GPIO_OUTPUT_CLEAR(CONFIG_SYS_GPIO_ETHRST);
-
- GPIO_OUTPUT_CLEAR(CONFIG_SYS_GPIO_DSR);
- GPIO_OUTPUT_SET(CONFIG_SYS_GPIO_DCD);
-
- GPIO_OUTPUT_CLEAR(CONFIG_SYS_GPIO_LED5_GN);
- GPIO_OUTPUT_CLEAR(CONFIG_SYS_GPIO_LED6_RT);
- GPIO_OUTPUT_CLEAR(CONFIG_SYS_GPIO_LED6_GN);
-
- /*
- * Setup GPIO's for Interrupt inputs
- */
- GPIO_OUTPUT_DISABLE(CONFIG_SYS_GPIO_DBGINT);
- GPIO_OUTPUT_DISABLE(CONFIG_SYS_GPIO_ETHINT);
-
- /*
- * Setup GPIO's for 33MHz clock output
- */
- GPIO_OUTPUT_ENABLE(CONFIG_SYS_GPIO_PCI_CLK);
- GPIO_OUTPUT_ENABLE(CONFIG_SYS_GPIO_EXTBUS_CLK);
- writel(0x011001FF, IXP425_GPIO_GPCLKR);
-
- /* we need a minimum PCI reset pulse width after enabling the clock */
- udelay(533);
- GPIO_OUTPUT_SET(CONFIG_SYS_GPIO_IORST);
- GPIO_OUTPUT_SET(CONFIG_SYS_GPIO_ETHRST);
-
- ACTUX3_LED1_RT(1);
- ACTUX3_LED1_GN(0);
- ACTUX3_LED2_RT(0);
- ACTUX3_LED2_GN(0);
- ACTUX3_LED3_RT(0);
- ACTUX3_LED3_GN(0);
- ACTUX3_LED4_GN(0);
- ACTUX3_LED5_RT(0);
-
- return 0;
-}
-
-/*
- * Check Board Identity
- */
-int checkboard(void)
-{
- char buf[64];
- int i = getenv_f("serial#", buf, sizeof(buf));
-
- puts("Board: AcTux-3 rev.");
- putc(ACTUX3_BOARDREL + 'A' - 1);
-
- if (i > 0) {
- puts (", serial# ");
- puts (buf);
- }
- putc('\n');
-
- return 0;
-}
-
-/*************************************************************************
- * get_board_rev() - setup to pass kernel board revision information
- * 0 = reserved
- * 1 = Rev. A
- * 2 = Rev. B
- *************************************************************************/
-u32 get_board_rev(void)
-{
- return ACTUX3_BOARDREL;
-}
-
-int dram_init(void)
-{
- gd->ram_size = get_ram_size(CONFIG_SYS_SDRAM_BASE, 128<<20);
- return 0;
-}
-
-void reset_phy(void)
-{
- int i;
-
- /* initialize the PHY */
- miiphy_reset("NPE0", CONFIG_PHY_ADDR);
-
- /* all LED outputs = Link/Act */
- miiphy_write("NPE0", CONFIG_PHY_ADDR, 0x16, 0x0AAA);
-
- /*
- * The Marvell 88E6060 switch comes up with all ports disabled.
- * set all ethernet switch ports to forwarding state
- */
- for (i = 1; i <= 5; i++)
- miiphy_write("NPE0", CONFIG_PHY_ADDR + 8 + i, 0x04, 0x03);
-
-}
diff --git a/board/actux3/actux3_hw.h b/board/actux3/actux3_hw.h
deleted file mode 100644
index f8acb4d..0000000
--- a/board/actux3/actux3_hw.h
+++ /dev/null
@@ -1,44 +0,0 @@
-/*
- * (C) Copyright 2007
- * Michael Schwingen, michael@schwingen.org
- *
- * hardware register definitions for the AcTux-3 board.
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-#ifndef _ACTUX3_HW_H
-#define _ACTUX3_HW_H
-
-/* 0 = LED off,1 = ON */
-#define ACTUX3_LED1_RT(a) writeb((a), IXP425_EXP_BUS_CS7_BASE_PHYS + 0)
-#define ACTUX3_LED1_GN(a) writeb((a), IXP425_EXP_BUS_CS7_BASE_PHYS + 1)
-#define ACTUX3_LED2_RT(a) writeb((a), IXP425_EXP_BUS_CS7_BASE_PHYS + 2)
-#define ACTUX3_LED2_GN(a) writeb((a), IXP425_EXP_BUS_CS7_BASE_PHYS + 3)
-#define ACTUX3_LED3_RT(a) writeb((a), IXP425_EXP_BUS_CS7_BASE_PHYS + 4)
-#define ACTUX3_LED3_GN(a) writeb((a), IXP425_EXP_BUS_CS7_BASE_PHYS + 5)
-#define ACTUX3_LED4_GN(a) writeb((a)^1, IXP425_EXP_BUS_CS7_BASE_PHYS + 6)
-#define ACTUX3_LED5_RT(a) writeb((a), IXP425_EXP_BUS_CS7_BASE_PHYS + 7)
-
-#define ACTUX3_DBG_PORT IXP425_EXP_BUS_CS5_BASE_PHYS
-#define ACTUX3_BOARDREL (readb(IXP425_EXP_BUS_CS6_BASE_PHYS) & 0x0F)
-#define ACTUX3_OPTION (readb(IXP425_EXP_BUS_CS6_BASE_PHYS) & 0xF0)
-
-/* GPIO settings */
-#define CONFIG_SYS_GPIO_DBGINT 0
-#define CONFIG_SYS_GPIO_ETHINT 1
-#define CONFIG_SYS_GPIO_ETHRST 2 /* Out */
-#define CONFIG_SYS_GPIO_LED5_GN 3 /* Out */
-#define CONFIG_SYS_GPIO_LED6_RT 4 /* Out */
-#define CONFIG_SYS_GPIO_LED6_GN 5 /* Out */
-#define CONFIG_SYS_GPIO_DSR 6 /* Out */
-#define CONFIG_SYS_GPIO_DCD 7 /* Out */
-#define CONFIG_SYS_GPIO_DBGJUMPER 9
-#define CONFIG_SYS_GPIO_BUTTON1 10
-#define CONFIG_SYS_GPIO_DBGSENSE 11
-#define CONFIG_SYS_GPIO_DTR 12
-#define CONFIG_SYS_GPIO_IORST 13 /* Out */
-#define CONFIG_SYS_GPIO_PCI_CLK 14 /* Out */
-#define CONFIG_SYS_GPIO_EXTBUS_CLK 15 /* Out */
-
-#endif
diff --git a/board/actux3/u-boot.lds b/board/actux3/u-boot.lds
deleted file mode 100644
index 2de3ca6..0000000
--- a/board/actux3/u-boot.lds
+++ /dev/null
@@ -1,99 +0,0 @@
-/*
- * (C) Copyright 2000
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-OUTPUT_FORMAT ("elf32-bigarm", "elf32-bigarm", "elf32-bigarm")
-OUTPUT_ARCH (arm)
-ENTRY (_start)
-SECTIONS
-{
- . = 0x00000000;
-
- . = ALIGN (4);
- .text : {
- *(.__image_copy_start)
- arch/arm/cpu/ixp/start.o(.text*)
- net/built-in.o(.text*)
- board/actux3/built-in.o(.text*)
- arch/arm/cpu/ixp/built-in.o(.text*)
- drivers/input/built-in.o(.text*)
-
- . = env_offset;
- common/env_embedded.o(.ppcenv)
- *(.text*)
- }
-
- . = ALIGN(4);
- .rodata : {
- *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*)))
- }
- . = ALIGN(4);
- .data : {
- *(.data*)
- }
- . = ALIGN(4);
- .got : {
- *(.got)
- }
- . =.;
-
- . = ALIGN(4);
- .u_boot_list : {
- KEEP(*(SORT(.u_boot_list*)));
- }
-
- . = ALIGN (4);
-
- .image_copy_end :
- {
- *(.__image_copy_end)
- }
-
- .rel_dyn_start :
- {
- *(.__rel_dyn_start)
- }
-
- .rel.dyn : {
- *(.rel*)
- }
-
- .rel_dyn_end :
- {
- *(.__rel_dyn_end)
- }
-
- _end = .;
-
-/*
- * Compiler-generated __bss_start and __bss_end, see arch/arm/lib/bss.c
- * __bss_base and __bss_limit are for linker only (overlay ordering)
- */
-
- .bss_start __rel_dyn_start (OVERLAY) : {
- KEEP(*(.__bss_start));
- __bss_base = .;
- }
-
- .bss __bss_base (OVERLAY) : {
- *(.bss*)
- . = ALIGN(4);
- __bss_limit = .;
- }
- .bss_end __bss_limit (OVERLAY) : {
- KEEP(*(.__bss_end));
- }
-
- .dynsym _end : { *(.dynsym) }
- .dynbss : { *(.dynbss) }
- .dynstr : { *(.dynstr*) }
- .dynamic : { *(.dynamic*) }
- .hash : { *(.hash*) }
- .plt : { *(.plt*) }
- .interp : { *(.interp*) }
- .gnu : { *(.gnu*) }
- .ARM.exidx : { *(.ARM.exidx*) }
-}
generated by cgit v1.1 at 2024-11-10 17:10:25 +0000