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-rw-r--r--board/imx31_litekit/imx31_litekit.c2
-rw-r--r--board/lwmon5/lwmon5.c18
-rw-r--r--board/mx31ads/mx31ads.c14
-rw-r--r--board/siemens/common/fpga.c2
4 files changed, 33 insertions, 3 deletions
diff --git a/board/imx31_litekit/imx31_litekit.c b/board/imx31_litekit/imx31_litekit.c
index 5ba60e9..e0fbf25 100644
--- a/board/imx31_litekit/imx31_litekit.c
+++ b/board/imx31_litekit/imx31_litekit.c
@@ -52,7 +52,7 @@ int board_init (void)
mx31_gpio_mux(MUX_RTS1__UART1_RTS_B);
mx31_gpio_mux(MUX_RTS1__UART1_CTS_B);
- gd->bd->bi_arch_number = 447; /* board id for linux */
+ gd->bd->bi_arch_number = MACH_TYPE_MX31LITE; /* board id for linux */
gd->bd->bi_boot_params = (0x80000100); /* adress of boot parameters */
return 0;
diff --git a/board/lwmon5/lwmon5.c b/board/lwmon5/lwmon5.c
index e5fa259..b63fbdc 100644
--- a/board/lwmon5/lwmon5.c
+++ b/board/lwmon5/lwmon5.c
@@ -476,6 +476,24 @@ int is_pci_host(struct pci_controller *hose)
void hw_watchdog_reset(void)
{
int val;
+#if defined(CONFIG_WD_MAX_RATE)
+ unsigned long long ct = get_ticks();
+
+ /*
+ * Don't allow watch-dog triggering more frequently than
+ * the predefined value CONFIG_WD_MAX_RATE [ticks].
+ */
+ if (ct >= gd->wdt_last) {
+ if ((ct - gd->wdt_last) < CONFIG_WD_MAX_RATE)
+ return;
+ } else {
+ /* Time base counter had been reset */
+ if (((unsigned long long)(-1) - gd->wdt_last + ct) <
+ CONFIG_WD_MAX_RATE)
+ return;
+ }
+ gd->wdt_last = get_ticks();
+#endif
/*
* Toggle watchdog output
diff --git a/board/mx31ads/mx31ads.c b/board/mx31ads/mx31ads.c
index 5a7d8c9..dd0e150 100644
--- a/board/mx31ads/mx31ads.c
+++ b/board/mx31ads/mx31ads.c
@@ -57,6 +57,18 @@ int board_init (void)
mx31_gpio_mux(MUX_RTS1__UART1_RTS_B);
mx31_gpio_mux(MUX_RTS1__UART1_CTS_B);
+ /* SPI2 */
+ mx31_gpio_mux((MUX_CTL_FUNC << 8) | MUX_CTL_CSPI2_SS2);
+ mx31_gpio_mux((MUX_CTL_FUNC << 8) | MUX_CTL_CSPI2_SCLK);
+ mx31_gpio_mux((MUX_CTL_FUNC << 8) | MUX_CTL_CSPI2_SPI_RDY);
+ mx31_gpio_mux((MUX_CTL_FUNC << 8) | MUX_CTL_CSPI2_MOSI);
+ mx31_gpio_mux((MUX_CTL_FUNC << 8) | MUX_CTL_CSPI2_MISO);
+ mx31_gpio_mux((MUX_CTL_FUNC << 8) | MUX_CTL_CSPI2_SS0);
+ mx31_gpio_mux((MUX_CTL_FUNC << 8) | MUX_CTL_CSPI2_SS1);
+
+ /* start SPI2 clock */
+ __REG(CCM_CGR2) = __REG(CCM_CGR2) | (3 << 4);
+
/* PBC setup */
/* Enable UART transceivers also reset the Ethernet/external UART */
readw(CS4_BASE + 4);
@@ -81,7 +93,7 @@ int board_init (void)
readb(CS4_BASE + 8);
readb(CS4_BASE + 7);
- gd->bd->bi_arch_number = 447; /* board id for linux */
+ gd->bd->bi_arch_number = MACH_TYPE_MX31ADS; /* board id for linux */
gd->bd->bi_boot_params = 0x80000100; /* adress of boot parameters */
return 0;
diff --git a/board/siemens/common/fpga.c b/board/siemens/common/fpga.c
index 48c1850..ac0022e 100644
--- a/board/siemens/common/fpga.c
+++ b/board/siemens/common/fpga.c
@@ -160,7 +160,7 @@ static int fpga_load (fpga_t* fpga, ulong addr, int checkall)
data = (uchar*)image_get_data (hdr);
len = image_get_data_size (hdr);
- verify = getenv_verify ();
+ verify = getenv_yesno ("verify");
if (verify) {
if (!image_check_dcrc (hdr)) {
strcpy (msg, "Bad Image Data CRC");