diff options
Diffstat (limited to 'board/xilinx/ml401/xparameters.h')
| -rw-r--r-- | board/xilinx/ml401/xparameters.h | 104 |
1 files changed, 48 insertions, 56 deletions
diff --git a/board/xilinx/ml401/xparameters.h b/board/xilinx/ml401/xparameters.h index 8ec2864..10ffd98 100644 --- a/board/xilinx/ml401/xparameters.h +++ b/board/xilinx/ml401/xparameters.h @@ -1,56 +1,48 @@ -/* - * (C) Copyright 2007 Michal Simek - * - * Michal SIMEK <monstr@monstr.eu> - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -/* DDR SDRAM */ -#define CONFIG_XILINX_ERAM_START 0x10000000 -#define CONFIG_XILINX_ERAM_SIZE 0x04000000 - -/* FLASH_MEMORY Settings */ -#define CONFIG_XILINX_FLASH_START 0x28000000 -#define CONFIG_XILINX_FLASH_SIZE 0x00800000 - -/* serial line */ -#define CONFIG_XILINX_UARTLITE_0_BASEADDR 0xA0000000 -#define CONFIG_XILINX_UARTLITE_0_BAUDRATE 115200 - -/* GPIO */ -#define CONFIG_XILINX_GPIO_0_BASEADDR 0x90000000 - -/* INTC */ -#define CONFIG_XILINX_INTC_0_BASEADDR 0xD1000FC0 -#define CONFIG_XILINX_INTC_0_NUM_INTR_INPUTS 12 - -/* TIMER */ -#define CONFIG_XILINX_TIMER_0_BASEADDR 0xA2000000 -#define CONFIG_XILINX_TIMER_0_IRQ 0 - -/* ethernet */ -#define XPAR_XEMAC_NUM_INSTANCES 1 -#define XPAR_OPB_ETHERNET_0_BASEADDR 0x60000000 -#define XPAR_OPB_ETHERNET_0_HIGHADDR 0x60003FFF -#define XPAR_OPB_ETHERNET_0_DEVICE_ID 0 -#define XPAR_EMAC_0_DEVICE_ID 0 -#define XPAR_OPB_ETHERNET_0_ERR_COUNT_EXIST 1 -#define XPAR_OPB_ETHERNET_0_DMA_PRESENT 1 -#define XPAR_OPB_ETHERNET_0_MII_EXIST 1 +/********************************************************************* +# +# CAUTION: This file is automatically generated by libgen. +# Version: Xilinx EDK 6.3 EDK_Gmm.12.3 +# Description: U-BOOT Configuration File +# Michal Simek - monstr@monstr.eu +# +**********************************************************************/ + +/* System Clock Frequency */ +#define XILINX_CLOCK_FREQ 66666667 + +/* Interrupt controller is intc_0 */ +#define XILINX_INTC_BASEADDR 0xd1000fc0 +#define XILINX_INTC_NUM_INTR_INPUTS 12 + +/* Timer pheriphery is opb_timer_0 */ +#define XILINX_TIMER_BASEADDR 0xa2000000 +#define XILINX_TIMER_IRQ 0 + +/* Uart pheriphery is console_uart */ +#define XILINX_UART_BASEADDR 0xa0000000 +#define XILINX_UART_BAUDRATE 115200 + +/* GPIO is opb_gpio_0*/ +#define XILINX_GPIO_BASEADDR 0x90000000 + +/* Flash Memory is opb_emc_0 */ +#define XILINX_FLASH_START 0x28000000 +#define XILINX_FLASH_SIZE 0x00800000 + +/* Main Memory is plb_ddr_0 */ +#define XILINX_RAM_START 0x10000000 +#define XILINX_RAM_SIZE 0x10000000 + +/* Sysace Controller is opb_sysace_0 */ +#define XILINX_SYSACE_BASEADDR 0xCF000000 +#define XILINX_SYSACE_HIGHADDR 0xCF0001FF +#define XILINX_SYSACE_MEM_WIDTH 16 + +/* Ethernet controller is opb_ethernet_0 */ +#define XPAR_XEMAC_NUM_INSTANCES 1 +#define XPAR_OPB_ETHERNET_0_DEVICE_ID 0 +#define XPAR_OPB_ETHERNET_0_BASEADDR 0x60000000 +#define XPAR_OPB_ETHERNET_0_HIGHADDR 0x60003FFF +#define XPAR_OPB_ETHERNET_0_DMA_PRESENT 1 +#define XPAR_OPB_ETHERNET_0_ERR_COUNT_EXIST 1 +#define XPAR_OPB_ETHERNET_0_MII_EXIST 1 |