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-rw-r--r--board/xilinx/ml300/Makefile57
-rw-r--r--board/xilinx/ml300/config.mk29
-rw-r--r--board/xilinx/ml300/init.S48
-rw-r--r--board/xilinx/ml300/ml300.c109
-rw-r--r--board/xilinx/ml300/serial.c155
-rw-r--r--board/xilinx/ml300/sw_services/uboot_v1_00_a/data/Ltypes41
-rw-r--r--board/xilinx/ml300/sw_services/uboot_v1_00_a/data/uboot_v2_1_0.mld48
-rw-r--r--board/xilinx/ml300/sw_services/uboot_v1_00_a/data/uboot_v2_1_0.tcl298
-rw-r--r--board/xilinx/ml300/u-boot.lds146
-rw-r--r--board/xilinx/ml300/u-boot.lds.debug135
-rw-r--r--board/xilinx/ml300/xparameters.h216
11 files changed, 1282 insertions, 0 deletions
diff --git a/board/xilinx/ml300/Makefile b/board/xilinx/ml300/Makefile
new file mode 100644
index 0000000..d9007c0
--- /dev/null
+++ b/board/xilinx/ml300/Makefile
@@ -0,0 +1,57 @@
+#
+# (C) Copyright 2000
+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+CFLAGS += -I../ml300 -I../common -I../xilinx_enet
+
+LIB = lib$(BOARD).a
+
+OBJS = $(BOARD).o serial.o \
+ ../xilinx_enet/emac_adapter.o ../xilinx_enet/xemac.o \
+ ../xilinx_enet/xemac_options.o ../xilinx_enet/xemac_polled.o \
+ ../xilinx_enet/xemac_intr.o ../xilinx_enet/xemac_g.o \
+ ../xilinx_enet/xemac_intr_dma.o \
+ ../common/xbasic_types.o ../common/xdma_channel.o \
+ ../common/xdma_channel_sg.o ../common/xpacket_fifo_v1_00_b.o \
+ ../common/xversion.o
+
+SOBJS = init.o
+
+$(LIB): $(OBJS) $(SOBJS)
+ $(AR) crv $@ $^
+
+clean:
+ rm -f $(SOBJS) $(OBJS)
+
+distclean: clean
+ rm -f $(LIB) core *.bak .depend
+
+#########################################################################
+
+.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
+ $(CC) -M $(CFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
+
+sinclude .depend
+
+#########################################################################
diff --git a/board/xilinx/ml300/config.mk b/board/xilinx/ml300/config.mk
new file mode 100644
index 0000000..57ddb2f
--- /dev/null
+++ b/board/xilinx/ml300/config.mk
@@ -0,0 +1,29 @@
+#
+# (C) Copyright 2000
+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+#
+# esd ADCIOP boards
+#
+
+#TEXT_BASE = 0xFFFE0000
+TEXT_BASE = 0x04000000
diff --git a/board/xilinx/ml300/init.S b/board/xilinx/ml300/init.S
new file mode 100644
index 0000000..f753df8
--- /dev/null
+++ b/board/xilinx/ml300/init.S
@@ -0,0 +1,48 @@
+/*
+ * init.S: Stubs for U-Boot initialization
+ *
+ * Author: Xilinx, Inc.
+ *
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ *
+ *
+ * XILINX IS PROVIDING THIS DESIGN, CODE, OR INFORMATION "AS IS" AS A
+ * COURTESY TO YOU. BY PROVIDING THIS DESIGN, CODE, OR INFORMATION AS
+ * ONE POSSIBLE IMPLEMENTATION OF THIS FEATURE, APPLICATION OR STANDARD,
+ * XILINX IS MAKING NO REPRESENTATION THAT THIS IMPLEMENTATION IS FREE
+ * FROM ANY CLAIMS OF INFRINGEMENT, AND YOU ARE RESPONSIBLE FOR OBTAINING
+ * ANY THIRD PARTY RIGHTS YOU MAY REQUIRE FOR YOUR IMPLEMENTATION.
+ * XILINX EXPRESSLY DISCLAIMS ANY WARRANTY WHATSOEVER WITH RESPECT TO
+ * THE ADEQUACY OF THE IMPLEMENTATION, INCLUDING BUT NOT LIMITED TO ANY
+ * WARRANTIES OR REPRESENTATIONS THAT THIS IMPLEMENTATION IS FREE FROM
+ * CLAIMS OF INFRINGEMENT, IMPLIED WARRANTIES OF MERCHANTABILITY AND
+ * FITNESS FOR A PARTICULAR PURPOSE.
+ *
+ *
+ * Xilinx hardware products are not intended for use in life support
+ * appliances, devices, or systems. Use in such applications is
+ * expressly prohibited.
+ *
+ *
+ * (c) Copyright 2002-2004 Xilinx Inc.
+ * All rights reserved.
+ *
+ *
+ * You should have received a copy of the GNU General Public License along
+ * with this program; if not, write to the Free Software Foundation, Inc.,
+ * 675 Mass Ave, Cambridge, MA 02139, USA.
+ *
+ *
+ */
+
+ .globl ext_bus_cntlr_init
+ext_bus_cntlr_init:
+ blr
+
+ .globl sdram_init
+sdram_init:
+ blr
diff --git a/board/xilinx/ml300/ml300.c b/board/xilinx/ml300/ml300.c
new file mode 100644
index 0000000..dbe8a8a
--- /dev/null
+++ b/board/xilinx/ml300/ml300.c
@@ -0,0 +1,109 @@
+/*
+ * ml300.c: U-Boot platform support for Xilinx ML300 board
+ *
+ * Author: Xilinx, Inc.
+ *
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ *
+ *
+ * XILINX IS PROVIDING THIS DESIGN, CODE, OR INFORMATION "AS IS" AS A
+ * COURTESY TO YOU. BY PROVIDING THIS DESIGN, CODE, OR INFORMATION AS
+ * ONE POSSIBLE IMPLEMENTATION OF THIS FEATURE, APPLICATION OR STANDARD,
+ * XILINX IS MAKING NO REPRESENTATION THAT THIS IMPLEMENTATION IS FREE
+ * FROM ANY CLAIMS OF INFRINGEMENT, AND YOU ARE RESPONSIBLE FOR OBTAINING
+ * ANY THIRD PARTY RIGHTS YOU MAY REQUIRE FOR YOUR IMPLEMENTATION.
+ * XILINX EXPRESSLY DISCLAIMS ANY WARRANTY WHATSOEVER WITH RESPECT TO
+ * THE ADEQUACY OF THE IMPLEMENTATION, INCLUDING BUT NOT LIMITED TO ANY
+ * WARRANTIES OR REPRESENTATIONS THAT THIS IMPLEMENTATION IS FREE FROM
+ * CLAIMS OF INFRINGEMENT, IMPLIED WARRANTIES OF MERCHANTABILITY AND
+ * FITNESS FOR A PARTICULAR PURPOSE.
+ *
+ *
+ * Xilinx hardware products are not intended for use in life support
+ * appliances, devices, or systems. Use in such applications is
+ * expressly prohibited.
+ *
+ *
+ * (c) Copyright 2002-2004 Xilinx Inc.
+ * All rights reserved.
+ *
+ *
+ * You should have received a copy of the GNU General Public License along
+ * with this program; if not, write to the Free Software Foundation, Inc.,
+ * 675 Mass Ave, Cambridge, MA 02139, USA.
+ *
+ */
+
+#include <common.h>
+#include <asm/processor.h>
+#include "xparameters.h"
+
+int
+board_pre_init(void)
+{
+ return 0;
+}
+
+int
+checkboard(void)
+{
+ unsigned char *s = getenv("serial#");
+ unsigned char *e;
+
+ if (!s || strncmp(s, "ML300", 9)) {
+ printf("### No HW ID - assuming ML300");
+ } else {
+ for (e = s; *e; ++e) {
+ if (*e == ' ')
+ break;
+ }
+
+ for (; s < e; ++s) {
+ putc(*s);
+ }
+ }
+
+ putc('\n');
+
+ return (0);
+}
+
+long int
+initdram(int board_type)
+{
+ return 128 * 1024 * 1024;
+}
+
+int
+testdram(void)
+{
+ printf("test: xxx MB - ok\n");
+
+ return (0);
+}
+
+/* implement functions originally in cpu/ppc4xx/speed.c */
+void
+get_sys_info(sys_info_t * sysInfo)
+{
+ sysInfo->freqProcessor = XPAR_CORE_CLOCK_FREQ_HZ;
+
+ /* only correct if the PLB and OPB run at the same frequency */
+ sysInfo->freqPLB = XPAR_UARTNS550_0_CLOCK_FREQ_HZ;
+ sysInfo->freqPCI = XPAR_UARTNS550_0_CLOCK_FREQ_HZ / 3;
+}
+
+ulong
+get_PCI_freq(void)
+{
+ ulong val;
+ PPC405_SYS_INFO sys_info;
+
+ get_sys_info(&sys_info);
+ val = sys_info.freqPCI;
+ return val;
+}
diff --git a/board/xilinx/ml300/serial.c b/board/xilinx/ml300/serial.c
new file mode 100644
index 0000000..19bcc6f
--- /dev/null
+++ b/board/xilinx/ml300/serial.c
@@ -0,0 +1,155 @@
+/*
+ * Author: Xilinx, Inc.
+ *
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ *
+ *
+ * XILINX IS PROVIDING THIS DESIGN, CODE, OR INFORMATION "AS IS" AS A
+ * COURTESY TO YOU. BY PROVIDING THIS DESIGN, CODE, OR INFORMATION AS
+ * ONE POSSIBLE IMPLEMENTATION OF THIS FEATURE, APPLICATION OR STANDARD,
+ * XILINX IS MAKING NO REPRESENTATION THAT THIS IMPLEMENTATION IS FREE
+ * FROM ANY CLAIMS OF INFRINGEMENT, AND YOU ARE RESPONSIBLE FOR OBTAINING
+ * ANY THIRD PARTY RIGHTS YOU MAY REQUIRE FOR YOUR IMPLEMENTATION.
+ * XILINX EXPRESSLY DISCLAIMS ANY WARRANTY WHATSOEVER WITH RESPECT TO
+ * THE ADEQUACY OF THE IMPLEMENTATION, INCLUDING BUT NOT LIMITED TO ANY
+ * WARRANTIES OR REPRESENTATIONS THAT THIS IMPLEMENTATION IS FREE FROM
+ * CLAIMS OF INFRINGEMENT, IMPLIED WARRANTIES OF MERCHANTABILITY AND
+ * FITNESS FOR A PARTICULAR PURPOSE.
+ *
+ *
+ * Xilinx hardware products are not intended for use in life support
+ * appliances, devices, or systems. Use in such applications is
+ * expressly prohibited.
+ *
+ *
+ * (c) Copyright 2002-2004 Xilinx Inc.
+ * All rights reserved.
+ *
+ *
+ * You should have received a copy of the GNU General Public License along
+ * with this program; if not, write to the Free Software Foundation, Inc.,
+ * 675 Mass Ave, Cambridge, MA 02139, USA.
+ *
+ */
+
+#include <asm/u-boot.h>
+#include <asm/processor.h>
+#include <common.h>
+#include <command.h>
+#include <configs/ml300.h>
+#include "xparameters.h"
+
+#define USE_CHAN1 \
+ ((defined XPAR_UARTNS550_0_BASEADDR) && (defined CFG_INIT_CHAN1))
+#define USE_CHAN2 \
+ ((defined XPAR_UARTNS550_1_BASEADDR) && (defined CFG_INIT_CHAN2))
+
+#if USE_CHAN1
+#include <ns16550.h>
+#endif
+
+#if USE_CHAN1
+const NS16550_t COM_PORTS[] = { (NS16550_t) (XPAR_UARTNS550_0_BASEADDR + 3)
+#if USE_CHAN2
+ , (NS16550_t) (XPAR_UARTNS550_1_BASEADDR + 3)
+#endif
+};
+#endif
+
+int
+serial_init(void)
+{
+#if USE_CHAN1
+ DECLARE_GLOBAL_DATA_PTR;
+ int clock_divisor;
+
+ clock_divisor = XPAR_UARTNS550_0_CLOCK_FREQ_HZ / 16 / gd->baudrate;
+ (void) NS16550_init(COM_PORTS[0], clock_divisor);
+#if USE_CHAN2
+ clock_divisor = XPAR_UARTNS550_1_CLOCK_FREQ_HZ / 16 / gd->baudrate;
+ (void) NS16550_init(COM_PORTS[1], clock_divisor);
+#endif
+#endif
+ return 0;
+
+}
+
+void
+serial_putc(const char c)
+{
+ if (c == '\n')
+ NS16550_putc(COM_PORTS[CFG_DUART_CHAN], '\r');
+
+ NS16550_putc(COM_PORTS[CFG_DUART_CHAN], c);
+}
+
+int
+serial_getc(void)
+{
+ return NS16550_getc(COM_PORTS[CFG_DUART_CHAN]);
+}
+
+int
+serial_tstc(void)
+{
+ return NS16550_tstc(COM_PORTS[CFG_DUART_CHAN]);
+}
+
+void
+serial_setbrg(void)
+{
+#if USE_CHAN1
+ DECLARE_GLOBAL_DATA_PTR;
+ int clock_divisor;
+
+ clock_divisor = XPAR_UARTNS550_0_CLOCK_FREQ_HZ / 16 / gd->baudrate;
+ NS16550_reinit(COM_PORTS[0], clock_divisor);
+#if USE_CHAN2
+ clock_divisor = XPAR_UARTNS550_1_CLOCK_FREQ_HZ / 16 / gd->baudrate;
+ NS16550_reinit(COM_PORTS[1], clock_divisor);
+#endif
+#endif
+}
+
+void
+serial_puts(const char *s)
+{
+ while (*s) {
+ serial_putc(*s++);
+ }
+}
+
+#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+void
+kgdb_serial_init(void)
+{
+}
+
+void
+putDebugChar(int c)
+{
+ serial_putc(c);
+}
+
+void
+putDebugStr(const char *str)
+{
+ serial_puts(str);
+}
+
+int
+getDebugChar(void)
+{
+ return serial_getc();
+}
+
+void
+kgdb_interruptible(int yes)
+{
+ return;
+}
+#endif /* CFG_CMD_KGDB */
diff --git a/board/xilinx/ml300/sw_services/uboot_v1_00_a/data/Ltypes b/board/xilinx/ml300/sw_services/uboot_v1_00_a/data/Ltypes
new file mode 100644
index 0000000..319b925
--- /dev/null
+++ b/board/xilinx/ml300/sw_services/uboot_v1_00_a/data/Ltypes
@@ -0,0 +1,41 @@
+#!/bin/bash
+
+if[$
+# -ne 1 ]
+ then echo "usage: Ltypes filename" > &2 exit 2 fi FILE = "$1"
+#TMPFILE='mktemp "${FILE}.XXXXXX"' || exit 1
+ TMPFILE = $ {
+ FILE}
+
+ . ` date "+%s" ` touch $TMPFILE || exit 1
+# Change all the Xilinx types to Linux types and put the result into a temp file
+ sed
+ - e 's/\bXTRUE\b/TRUE/g'
+ - e 's/\bXFALSE\b/FALSE/g'
+ - e 's/\bXNULL\b/NULL/g'
+ - e 's/<asm/delay.h>/<asm\/delay.h>/g'
+ - e 's/\bXENV_USLEEP\b/udelay/g'
+ - e 's/\bXuint8\b/u8/g'
+ - e 's/\bXuint16\b/u16/g'
+ - e 's/\bXuint32\b/u32/g'
+ - e 's/\bXint8\b/s8/g'
+ - e 's/\bXint16\b/s16/g'
+ - e 's/\bXint32\b/s32/g' - e 's/\bXboolean\b/u32/g' "${FILE}" > "${TMPFILE}"
+# Overlay the original file with the temp file
+ mv "${TMPFILE}" "${FILE}"
+# Are we doing xbasic_types.h?
+ if["${FILE##*/}" = xbasic_types.h]
+ then
+# Remember as you're reading this that we've already gone through the prior
+# sed script. We need to do some other things to xbasic_types.h:
+# 1) Add ifndefs around TRUE and FALSE defines
+# 2) Remove definition of NULL as NULL
+# 3) Replace most of the primitive types section with a #include
+ sed - e '/u32 true/,/#define false/Ic\
+#ifndef TRUE\
+#define TRUE 1\
+#endif\
+#ifndef FALSE\
+#define FALSE 0\
+#endif' - e '/#define[[:space:]][[:space:]]*NULL[[:space:]][[:space:]]*NULL/d' - e '/typedef[[:space:]][[:space:]]*unsigned[[:space:]][[:space:]]*char[[:space:]][[:space:]]*u8/,/typedef[[:space:]][[:space:]]*unsigned[[:space:]][[:space:]]*long[[:space:]][[:space:]]*u32.*boolean/c\
+#include <linux/types.h>' "${FILE}" > "${TMPFILE}" mv "${TMPFILE}" "${FILE}" fi
diff --git a/board/xilinx/ml300/sw_services/uboot_v1_00_a/data/uboot_v2_1_0.mld b/board/xilinx/ml300/sw_services/uboot_v1_00_a/data/uboot_v2_1_0.mld
new file mode 100644
index 0000000..e1aa7fd
--- /dev/null
+++ b/board/xilinx/ml300/sw_services/uboot_v1_00_a/data/uboot_v2_1_0.mld
@@ -0,0 +1,48 @@
+# (c) Copyright 2004 Xilinx Inc.
+# Author: Xilinx, Inc.
+#
+#
+# This program is free software; you can redistribute it and/or modify it
+# under the terms of the GNU General Public License as published by the
+# Free Software Foundation; either version 2 of the License, or (at your
+# option) any later version.
+#
+#
+# XILINX IS PROVIDING THIS DESIGN, CODE, OR INFORMATION "AS IS" AS A
+# COURTESY TO YOU. BY PROVIDING THIS DESIGN, CODE, OR INFORMATION AS
+# ONE POSSIBLE IMPLEMENTATION OF THIS FEATURE, APPLICATION OR STANDARD,
+# XILINX IS MAKING NO REPRESENTATION THAT THIS IMPLEMENTATION IS FREE
+# FROM ANY CLAIMS OF INFRINGEMENT, AND YOU ARE RESPONSIBLE FOR OBTAINING
+# ANY THIRD PARTY RIGHTS YOU MAY REQUIRE FOR YOUR IMPLEMENTATION.
+# XILINX EXPRESSLY DISCLAIMS ANY WARRANTY WHATSOEVER WITH RESPECT TO
+# THE ADEQUACY OF THE IMPLEMENTATION, INCLUDING BUT NOT LIMITED TO ANY
+# WARRANTIES OR REPRESENTATIONS THAT THIS IMPLEMENTATION IS FREE FROM
+# CLAIMS OF INFRINGEMENT, IMPLIED WARRANTIES OF MERCHANTABILITY AND
+# FITNESS FOR A PARTICULAR PURPOSE.
+#
+#
+# Xilinx hardware products are not intended for use in life support
+# appliances, devices, or systems. Use in such applications is
+# expressly prohibited.
+#
+#
+# (c) Copyright 2002-2004 Xilinx Inc.
+# All rights reserved.
+#
+#
+# You should have received a copy of the GNU General Public License along
+# with this program; if not, write to the Free Software Foundation, Inc.,
+# 675 Mass Ave, Cambridge, MA 02139, USA.
+
+OPTION psf_version = 2.1;
+
+BEGIN LIBRARY uboot OPTION DRC = uboot_drc;
+
+BEGIN ARRAY connected_periphs PROPERTY desc = "Peripherals connected to U-Boot";
+PROPERTY size = 0;
+PARAM name = periph_name, desc = "Name of Peripheral connected", type = string;
+END ARRAY
+ PARAMETER name = TARGET_DIR, desc =
+ "Target Directory for U-Boot BSP", type = string;
+
+END LIBRARY
diff --git a/board/xilinx/ml300/sw_services/uboot_v1_00_a/data/uboot_v2_1_0.tcl b/board/xilinx/ml300/sw_services/uboot_v1_00_a/data/uboot_v2_1_0.tcl
new file mode 100644
index 0000000..8d939b4
--- /dev/null
+++ b/board/xilinx/ml300/sw_services/uboot_v1_00_a/data/uboot_v2_1_0.tcl
@@ -0,0 +1,298 @@
+#
+# Author: Xilinx, Inc.
+#
+#
+# This program is free software; you can redistribute it and/or modify it
+# under the terms of the GNU General Public License as published by the
+# Free Software Foundation; either version 2 of the License, or (at your
+# option) any later version.
+#
+#
+# XILINX IS PROVIDING THIS DESIGN, CODE, OR INFORMATION "AS IS" AS A
+# COURTESY TO YOU. BY PROVIDING THIS DESIGN, CODE, OR INFORMATION AS
+# ONE POSSIBLE IMPLEMENTATION OF THIS FEATURE, APPLICATION OR STANDARD,
+# XILINX IS MAKING NO REPRESENTATION THAT THIS IMPLEMENTATION IS FREE
+# FROM ANY CLAIMS OF INFRINGEMENT, AND YOU ARE RESPONSIBLE FOR OBTAINING
+# ANY THIRD PARTY RIGHTS YOU MAY REQUIRE FOR YOUR IMPLEMENTATION.
+# XILINX EXPRESSLY DISCLAIMS ANY WARRANTY WHATSOEVER WITH RESPECT TO
+# THE ADEQUACY OF THE IMPLEMENTATION, INCLUDING BUT NOT LIMITED TO ANY
+# WARRANTIES OR REPRESENTATIONS THAT THIS IMPLEMENTATION IS FREE FROM
+# CLAIMS OF INFRINGEMENT, IMPLIED WARRANTIES OF MERCHANTABILITY AND
+# FITNESS FOR A PARTICULAR PURPOSE.
+#
+#
+# Xilinx hardware products are not intended for use in life support
+# appliances, devices, or systems. Use in such applications is
+# expressly prohibited.
+#
+#
+# (c) Copyright 2002-2004 Xilinx Inc.
+# All rights reserved.
+#
+#
+# You should have received a copy of the GNU General Public License along
+# with this program; if not, write to the Free Software Foundation, Inc.,
+# 675 Mass Ave, Cambridge, MA 02139, USA.
+#
+# Globals
+lappend drvlist
+set ltypes "../../../sw_services/uboot_v1_00_a/data/Ltypes"
+
+proc uboot_drc {lib_handle} {
+ puts "U-Boot DRC..."
+}
+
+proc generate {libname} {
+
+ global drvlist
+
+ # Get list of peripherals connected to uboot
+ set conn_periphs [xget_handle $libname "ARRAY" "connected_periphs"]
+ #lappend drvlist
+ if {[string compare -nocase $conn_periphs ""] != 0} {
+ set conn_periphs_elems [xget_handle $conn_periphs "ELEMENTS" "*"]
+ # For each periph
+ foreach periph_elem $conn_periphs_elems {
+ set periph [xget_value $periph_elem "PARAMETER" "periph_name"]
+ # 1. Get driver
+ set drv [xget_swhandle $periph]
+ set posn [lsearch -exact $drvlist $drv]
+ if {$posn == -1} {
+ lappend drvlist $drv
+ }
+ }
+
+ set file_handle [xopen_include_file "xparameters.h"]
+ puts $file_handle "\n/******************************************************************/\n"
+ puts $file_handle "/* U-Boot Redefines */"
+ puts $file_handle "\n/******************************************************************/\n"
+ close $file_handle
+
+ foreach drv $drvlist {
+ set drvname [xget_value $drv "NAME"]
+
+ #Redefines xparameters.h
+ if {[string compare -nocase $drvname "uartns550"] == 0} {
+ xredefine_uartns550 $drv "xparameters.h"
+ } elseif {[string compare -nocase $drvname "emac"] == 0} {
+ xredefine_emac $drv "xparameters.h"
+ }
+ }
+ }
+
+ # define core_clock
+ xredefine_params $libname "xparameters.h" "CORE_CLOCK_FREQ_HZ"
+}
+
+proc xget_corefreq {} {
+ set processor [xget_processor]
+ set name [xget_value $processor "NAME"]
+ puts "procname : $name"
+ set processor_driver [xget_swhandle [xget_value $processor "NAME"]]
+ puts "procdrv : $processor_driver"
+ if {[string compare -nocase $processor_driver ""] != 0} {
+ set arg "CORE_CLOCK_FREQ_HZ"
+ #set retval [xget_value $processor_driver "PARAMETER" $arg]
+ set retval [xget_dname [xget_value $processor_driver "NAME"] $arg]
+ return $retval
+ }
+}
+
+# procedure that adds # defines to xparameters.h as XPAR_argument
+proc xredefine_params {handle file_name args} {
+
+ puts "xredfine ..."
+ # Open include file
+ set file_handle [xopen_include_file $file_name]
+ puts "args : $args"
+
+ foreach arg $args {
+ if {[string compare -nocase $arg "CORE_CLOCK_FREQ_HZ"] == 0} {
+ set value [xget_corefreq]
+ puts "corefreq : $value"
+ } else {
+ set value [xget_value $handle "PARAMETER" $arg]
+ puts "value : $value"
+ }
+
+ if {$value != ""} {
+ set value [xformat_addr_string $value $arg]
+ set name [string toupper $arg]
+ set name [format "XPAR_%s" $name]
+ puts $file_handle "#define $name $value"
+ }
+ }
+
+ puts $file_handle "\n/******************************************************************/\n"
+ close $file_handle
+}
+
+# uart redefines...
+proc xredefine_uartns550 {drvhandle file_name} {
+
+ xredefine_include_file $drvhandle $file_name "uartns550" "C_BASEADDR" "C_HIGHADDR" "CLOCK_HZ" "DEVICE_ID"
+
+}
+
+proc xredefine_emac {drvhandle file_name} {
+
+ xredefine_include_file $drvhandle $file_name "emac" "C_BASEADDR" "C_HIGHADDR" "C_DMA_PRESENT" "C_MII_EXIST" "C_ERR_COUNT_EXIST" "DEVICE_ID"
+
+}
+
+#######################
+
+proc xredefine_include_file {drv_handle file_name drv_string args} {
+
+ # Open include file
+ set file_handle [xopen_include_file $file_name]
+
+ # Get all peripherals connected to this driver
+ set periphs [xget_periphs $drv_handle]
+
+ set pname [format "XPAR_%s_" [string toupper $drv_string]]
+
+ # Print all parameters for all peripherals
+ set device_id 0
+ set sub_periphs 1
+ foreach periph $periphs {
+ puts "$periph : $drv_string : $sub_periphs"
+
+ for {set i 0} {$i < $sub_periphs} {incr i} {
+ foreach arg $args {
+ set name "${pname}${device_id}_"
+
+ if {[string compare -nocase "CLOCK_HZ" $arg] == 0} {
+ set xdrv_string [format "%s%s" "X" $drv_string]
+ set value [xget_dname $xdrv_string $arg]
+ set name "${name}CLOCK_FREQ_HZ"
+ } else {
+ if {[string match C_* $arg]} {
+ set name [format "%s%s" $name [string range $arg 2 end]]
+ } else {
+ set name "${name}${arg}"
+ }
+ set value [xget_name $periph $arg]
+ }
+
+ if {[string compare -nocase "uartns550" $drv_string] == 0} {
+ if {[string compare -nocase "C_BASEADDR" $arg] == 0} {
+ set value [format "(%s%s%s)" $value "+" "0x1000"]
+ }
+ }
+
+ puts $file_handle "#define $name $value"
+ if {[string compare -nocase "DEVICE_ID" $arg] == 0} {
+ incr device_id
+ }
+ }
+ }
+ }
+ puts $file_handle "\n/******************************************************************/\n"
+ close $file_handle
+}
+
+##################################################
+# procedure post_generate
+# This generates the drivers directory for uboot
+# and runs the ltypes script
+##################################################
+
+proc post_generate {lib_handle} {
+
+ global drvlist
+
+ # Create U-Boot tree structure
+ set pwd [pwd]
+ set common_dir "uboot/board/xilinx/common"
+ set xilinx_enet_dir "uboot/board/xilinx/xilinx_enet"
+ set ml300_dir "uboot/board/xilinx/ml300"
+
+ exec bash -c "mkdir -p $common_dir $xilinx_enet_dir $ml300_dir"
+
+ # Copy files for xilinx_ocp
+ xcopy_commonfiles
+
+ foreach drv $drvlist {
+ set drvname [xget_value $drv "NAME"]
+ set ver [xget_value $drv "PARAMETER" "DRIVER_VER"]
+ set ver [string map {. _} $ver]
+ set dirname [format "%s_v%s" $drvname $ver]
+
+ if {[string compare -nocase $drvname "emac"] == 0} {
+ xcopy_emac $drv $dirname
+ }
+ }
+
+ # Call Ltypes Script here
+ set uboot "uboot"
+ xltype_file $uboot
+
+ # Move xparameters.h around
+ exec bash -c "cp ../../include/xparameters.h $ml300_dir"
+
+ # copy the whole U-Boot BSP to its final destination
+ set value [xget_value $lib_handle "PARAMETER" TARGET_DIR]
+ puts "TARGET_DIR : $value"
+
+ if {$value != ""} {
+ if {[file isdirectory $value] == 0} {
+ exec bash -c "mkdir -p $value"
+ }
+ exec bash -c "cp -Rp uboot/* $value"
+ }
+}
+
+proc xcopy_commonfiles {} {
+
+ global drvlist
+
+ set common_dir "uboot/board/xilinx/common"
+
+ foreach drv $drvlist {
+ set depends [xget_value $drv "OPTION" "DEPENDS"]
+ foreach dep $depends {
+ puts "dep : $dep"
+ if {[file isdirectory "../$dep"] == 1} {
+ exec bash -c "cp -f ../$dep/src/*.c $common_dir"
+ exec bash -c "cp -f ../$dep/src/*.h $common_dir"
+ }
+ }
+ }
+
+}
+
+proc xcopy_emac {drv_handle dirname} {
+ set emac "board/xilinx/xilinx_enet"
+ xcopy_dir $dirname $emac
+}
+
+proc xcopy_dir {srcdir dstdir} {
+
+ set dstdirname [format "%s%s" "uboot/" $dstdir]
+ if {[file isdirectory "../$srcdir"] == 1} {
+ # Copy files from src to dst
+ exec bash -c "mkdir -p $dstdirname"
+ exec bash -c "cp -f ../$srcdir/src/*.c $dstdirname"
+ exec bash -c "cp -f ../$srcdir/src/*.h $dstdirname"
+ } else {
+ puts "$srcdir does not exist ..."
+ }
+}
+
+
+proc xltype_file {filename} {
+
+ global ltypes
+
+ puts $filename
+
+ if {[file isdirectory $filename]} {
+ foreach entry [glob -nocomplain [file join $filename *]] {
+ xltype_file $entry
+ }
+ } else {
+ exec bash -c "$ltypes $filename"
+ }
+
+}
diff --git a/board/xilinx/ml300/u-boot.lds b/board/xilinx/ml300/u-boot.lds
new file mode 100644
index 0000000..e7b7e10
--- /dev/null
+++ b/board/xilinx/ml300/u-boot.lds
@@ -0,0 +1,146 @@
+/*
+ * (C) Copyright 2000
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+OUTPUT_ARCH(powerpc)
+ENTRY(_start)
+SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
+/* Do we need any of these for elf?
+ __DYNAMIC = 0; */
+SECTIONS
+{
+ /* Read-only sections, merged into text segment: */
+ . = + SIZEOF_HEADERS;
+ .interp : { *(.interp) }
+ .hash : { *(.hash) }
+ .dynsym : { *(.dynsym) }
+ .dynstr : { *(.dynstr) }
+ .rel.text : { *(.rel.text) }
+ .rela.text : { *(.rela.text) }
+ .rel.data : { *(.rel.data) }
+ .rela.data : { *(.rela.data) }
+ .rel.rodata : { *(.rel.rodata) }
+ .rela.rodata : { *(.rela.rodata) }
+ .rel.got : { *(.rel.got) }
+ .rela.got : { *(.rela.got) }
+ .rel.ctors : { *(.rel.ctors) }
+ .rela.ctors : { *(.rela.ctors) }
+ .rel.dtors : { *(.rel.dtors) }
+ .rela.dtors : { *(.rela.dtors) }
+ .rel.bss : { *(.rel.bss) }
+ .rela.bss : { *(.rela.bss) }
+ .rel.plt : { *(.rel.plt) }
+ .rela.plt : { *(.rela.plt) }
+ .init : { *(.init) }
+ .plt : { *(.plt) }
+ .text :
+ {
+ /* WARNING - the following is hand-optimized to fit within */
+ /* the sector layout of our flash chips! XXX FIXME XXX */
+/*
+ cpu/ppc4xx/start.o (.text)
+ board/xilinx/ml300/init.o (.text)
+ cpu/ppc4xx/kgdb.o (.text)
+ cpu/ppc4xx/traps.o (.text)
+ cpu/ppc4xx/interrupts.o (.text)
+ cpu/ppc4xx/serial.o (.text)
+ cpu/ppc4xx/cpu_init.o (.text)
+ cpu/ppc4xx/speed.o (.text)
+ cpu/ppc4xx/405gp_enet.o (.text)
+ common/dlmalloc.o (.text)
+ lib_generic/crc32.o (.text)
+ lib_ppc/extable.o (.text)
+ lib_generic/zlib.o (.text)
+*/
+/* . = env_offset;*/
+/* common/environment.o(.text)*/
+
+ *(.text)
+ *(.fixup)
+ *(.got1)
+ }
+ _etext = .;
+ PROVIDE (etext = .);
+ .rodata :
+ {
+ *(.rodata)
+ *(.rodata1)
+ *(.rodata.str1.4)
+ }
+ .fini : { *(.fini) } =0
+ .ctors : { *(.ctors) }
+ .dtors : { *(.dtors) }
+
+ /* Read-write section, merged into data segment: */
+ . = (. + 0x00FF) & 0xFFFFFF00;
+ _erotext = .;
+ PROVIDE (erotext = .);
+ .reloc :
+ {
+ *(.got)
+ _GOT2_TABLE_ = .;
+ *(.got2)
+ _FIXUP_TABLE_ = .;
+ *(.fixup)
+ }
+ __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
+ __fixup_entries = (. - _FIXUP_TABLE_)>>2;
+
+ .data :
+ {
+ *(.data)
+ *(.data1)
+ *(.sdata)
+ *(.sdata2)
+ *(.dynamic)
+ CONSTRUCTORS
+ }
+ _edata = .;
+ PROVIDE (edata = .);
+
+ __u_boot_cmd_start = .;
+ .u_boot_cmd : { *(.u_boot_cmd) }
+ __u_boot_cmd_end = .;
+
+
+ __start___ex_table = .;
+ __ex_table : { *(__ex_table) }
+ __stop___ex_table = .;
+
+ . = ALIGN(256);
+ __init_begin = .;
+ .text.init : { *(.text.init) }
+ .data.init : { *(.data.init) }
+ . = ALIGN(256);
+ __init_end = .;
+
+ __bss_start = .;
+ .bss :
+ {
+ *(.sbss) *(.scommon)
+ *(.dynbss)
+ *(.bss)
+ *(COMMON)
+ }
+ _end = . ;
+ PROVIDE (end = .);
+}
diff --git a/board/xilinx/ml300/u-boot.lds.debug b/board/xilinx/ml300/u-boot.lds.debug
new file mode 100644
index 0000000..d483424
--- /dev/null
+++ b/board/xilinx/ml300/u-boot.lds.debug
@@ -0,0 +1,135 @@
+/*
+ * (C) Copyright 2000
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+OUTPUT_ARCH(powerpc)
+SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
+/* Do we need any of these for elf?
+ __DYNAMIC = 0; */
+SECTIONS
+{
+ /* Read-only sections, merged into text segment: */
+ . = + SIZEOF_HEADERS;
+ .interp : { *(.interp) }
+ .hash : { *(.hash) }
+ .dynsym : { *(.dynsym) }
+ .dynstr : { *(.dynstr) }
+ .rel.text : { *(.rel.text) }
+ .rela.text : { *(.rela.text) }
+ .rel.data : { *(.rel.data) }
+ .rela.data : { *(.rela.data) }
+ .rel.rodata : { *(.rel.rodata) }
+ .rela.rodata : { *(.rela.rodata) }
+ .rel.got : { *(.rel.got) }
+ .rela.got : { *(.rela.got) }
+ .rel.ctors : { *(.rel.ctors) }
+ .rela.ctors : { *(.rela.ctors) }
+ .rel.dtors : { *(.rel.dtors) }
+ .rela.dtors : { *(.rela.dtors) }
+ .rel.bss : { *(.rel.bss) }
+ .rela.bss : { *(.rela.bss) }
+ .rel.plt : { *(.rel.plt) }
+ .rela.plt : { *(.rela.plt) }
+ .init : { *(.init) }
+ .plt : { *(.plt) }
+ .text :
+ {
+ /* WARNING - the following is hand-optimized to fit within */
+ /* the sector layout of our flash chips! XXX FIXME XXX */
+
+ mpc8xx/start.o (.text)
+ common/dlmalloc.o (.text)
+ lib_generic/vsprintf.o (.text)
+ lib_generic/crc32.o (.text)
+ lib_ppc/extable.o (.text)
+
+ common/environment.o(.text)
+
+ *(.text)
+ *(.fixup)
+ *(.got1)
+ }
+ _etext = .;
+ PROVIDE (etext = .);
+ .rodata :
+ {
+ *(.rodata)
+ *(.rodata1)
+ }
+ .fini : { *(.fini) } =0
+ .ctors : { *(.ctors) }
+ .dtors : { *(.dtors) }
+
+ /* Read-write section, merged into data segment: */
+ . = (. + 0x0FFF) & 0xFFFFF000;
+ _erotext = .;
+ PROVIDE (erotext = .);
+ .reloc :
+ {
+ *(.got)
+ _GOT2_TABLE_ = .;
+ *(.got2)
+ _FIXUP_TABLE_ = .;
+ *(.fixup)
+ }
+ __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
+ __fixup_entries = (. - _FIXUP_TABLE_)>>2;
+
+ .data :
+ {
+ *(.data)
+ *(.data1)
+ *(.sdata)
+ *(.sdata2)
+ *(.dynamic)
+ CONSTRUCTORS
+ }
+ _edata = .;
+ PROVIDE (edata = .);
+
+ __u_boot_cmd_start = .;
+ .u_boot_cmd : { *(.u_boot_cmd) }
+ __u_boot_cmd_end = .;
+
+
+ __start___ex_table = .;
+ __ex_table : { *(__ex_table) }
+ __stop___ex_table = .;
+
+ . = ALIGN(4096);
+ __init_begin = .;
+ .text.init : { *(.text.init) }
+ .data.init : { *(.data.init) }
+ . = ALIGN(4096);
+ __init_end = .;
+
+ __bss_start = .;
+ .bss :
+ {
+ *(.sbss) *(.scommon)
+ *(.dynbss)
+ *(.bss)
+ *(COMMON)
+ }
+ _end = . ;
+ PROVIDE (end = .);
+}
diff --git a/board/xilinx/ml300/xparameters.h b/board/xilinx/ml300/xparameters.h
new file mode 100644
index 0000000..c636256
--- /dev/null
+++ b/board/xilinx/ml300/xparameters.h
@@ -0,0 +1,216 @@
+/*******************************************************************
+*
+* CAUTION: This file is automatically generated by libgen.
+* Version: Xilinx EDK 6.1.2 EDK_G.14
+* DO NOT EDIT.
+*
+* Author: Xilinx, Inc.
+*
+*
+* This program is free software; you can redistribute it and/or modify it
+* under the terms of the GNU General Public License as published by the
+* Free Software Foundation; either version 2 of the License, or (at your
+* option) any later version.
+*
+*
+* XILINX IS PROVIDING THIS DESIGN, CODE, OR INFORMATION "AS IS" AS A
+* COURTESY TO YOU. BY PROVIDING THIS DESIGN, CODE, OR INFORMATION AS
+* ONE POSSIBLE IMPLEMENTATION OF THIS FEATURE, APPLICATION OR STANDARD,
+* XILINX IS MAKING NO REPRESENTATION THAT THIS IMPLEMENTATION IS FREE
+* FROM ANY CLAIMS OF INFRINGEMENT, AND YOU ARE RESPONSIBLE FOR OBTAINING
+* ANY THIRD PARTY RIGHTS YOU MAY REQUIRE FOR YOUR IMPLEMENTATION.
+* XILINX EXPRESSLY DISCLAIMS ANY WARRANTY WHATSOEVER WITH RESPECT TO
+* THE ADEQUACY OF THE IMPLEMENTATION, INCLUDING BUT NOT LIMITED TO ANY
+* WARRANTIES OR REPRESENTATIONS THAT THIS IMPLEMENTATION IS FREE FROM
+* CLAIMS OF INFRINGEMENT, IMPLIED WARRANTIES OF MERCHANTABILITY AND
+* FITNESS FOR A PARTICULAR PURPOSE.
+*
+*
+* Xilinx hardware products are not intended for use in life support
+* appliances, devices, or systems. Use in such applications is
+* expressly prohibited.
+*
+*
+* (c) Copyright 2002-2004 Xilinx Inc.
+* All rights reserved.
+*
+*
+* You should have received a copy of the GNU General Public License along
+* with this program; if not, write to the Free Software Foundation, Inc.,
+* 675 Mass Ave, Cambridge, MA 02139, USA.
+*
+* Description: Driver parameters
+*
+*******************************************************************/
+
+#define XPAR_XPCI_NUM_INSTANCES 1
+#define XPAR_XPCI_CLOCK_HZ 33333333
+#define XPAR_OPB_PCI_REF_0_DEVICE_ID 0
+#define XPAR_OPB_PCI_REF_0_BASEADDR 0x20000000
+#define XPAR_OPB_PCI_REF_0_HIGHADDR 0x3FFFFFFF
+#define XPAR_OPB_PCI_REF_0_CONFIG_ADDR 0x3C000000
+#define XPAR_OPB_PCI_REF_0_CONFIG_DATA 0x3C000004
+#define XPAR_OPB_PCI_REF_0_LCONFIG_ADDR 0x3E000000
+#define XPAR_OPB_PCI_REF_0_MEM_BASEADDR 0x20000000
+#define XPAR_OPB_PCI_REF_0_MEM_HIGHADDR 0x37FFFFFF
+#define XPAR_OPB_PCI_REF_0_IO_BASEADDR 0x38000000
+#define XPAR_OPB_PCI_REF_0_IO_HIGHADDR 0x3BFFFFFF
+
+/******************************************************************/
+
+#define XPAR_XEMAC_NUM_INSTANCES 1
+#define XPAR_OPB_ETHERNET_0_BASEADDR 0x60000000
+#define XPAR_OPB_ETHERNET_0_HIGHADDR 0x60003FFF
+#define XPAR_OPB_ETHERNET_0_DEVICE_ID 0
+#define XPAR_OPB_ETHERNET_0_ERR_COUNT_EXIST 1
+#define XPAR_OPB_ETHERNET_0_DMA_PRESENT 1
+#define XPAR_OPB_ETHERNET_0_MII_EXIST 1
+
+/******************************************************************/
+
+#define XPAR_MY_OPB_GPIO_0_DEVICE_ID_0 0
+#define XPAR_MY_OPB_GPIO_0_BASEADDR_0 0x90000000
+#define XPAR_MY_OPB_GPIO_0_HIGHADDR_0 (0x90000000+0x7)
+#define XPAR_MY_OPB_GPIO_0_DEVICE_ID_1 1
+#define XPAR_MY_OPB_GPIO_0_BASEADDR_1 (0x90000000+0x8)
+#define XPAR_MY_OPB_GPIO_0_HIGHADDR_1 (0x90000000+0x1F)
+#define XPAR_XGPIO_NUM_INSTANCES 2
+
+/******************************************************************/
+
+#define XPAR_XIIC_NUM_INSTANCES 1
+#define XPAR_OPB_IIC_0_BASEADDR 0xA8000000
+#define XPAR_OPB_IIC_0_HIGHADDR 0xA80001FF
+#define XPAR_OPB_IIC_0_DEVICE_ID 0
+#define XPAR_OPB_IIC_0_TEN_BIT_ADR 0
+
+/******************************************************************/
+
+#define XPAR_XUARTNS550_NUM_INSTANCES 2
+#define XPAR_XUARTNS550_CLOCK_HZ 100000000
+#define XPAR_OPB_UART16550_0_BASEADDR 0xA0000000
+#define XPAR_OPB_UART16550_0_HIGHADDR 0xA0001FFF
+#define XPAR_OPB_UART16550_0_DEVICE_ID 0
+#define XPAR_OPB_UART16550_1_BASEADDR 0xA0010000
+#define XPAR_OPB_UART16550_1_HIGHADDR 0xA0011FFF
+#define XPAR_OPB_UART16550_1_DEVICE_ID 1
+
+/******************************************************************/
+
+#define XPAR_XSPI_NUM_INSTANCES 1
+#define XPAR_OPB_SPI_0_BASEADDR 0xA4000000
+#define XPAR_OPB_SPI_0_HIGHADDR 0xA400007F
+#define XPAR_OPB_SPI_0_DEVICE_ID 0
+#define XPAR_OPB_SPI_0_FIFO_EXIST 1
+#define XPAR_OPB_SPI_0_SPI_SLAVE_ONLY 0
+#define XPAR_OPB_SPI_0_NUM_SS_BITS 1
+
+/******************************************************************/
+
+#define XPAR_XPS2_NUM_INSTANCES 2
+#define XPAR_OPB_PS2_DUAL_REF_0_DEVICE_ID_0 0
+#define XPAR_OPB_PS2_DUAL_REF_0_BASEADDR_0 0xA9000000
+#define XPAR_OPB_PS2_DUAL_REF_0_HIGHADDR_0 (0xA9000000+0x3F)
+#define XPAR_OPB_PS2_DUAL_REF_0_DEVICE_ID_1 1
+#define XPAR_OPB_PS2_DUAL_REF_0_BASEADDR_1 (0xA9000000+0x1000)
+#define XPAR_OPB_PS2_DUAL_REF_0_HIGHADDR_1 (0xA9000000+0x103F)
+
+/******************************************************************/
+
+#define XPAR_XTOUCHSCREEN_NUM_INSTANCES 1
+#define XPAR_OPB_TSD_REF_0_BASEADDR 0xAA000000
+#define XPAR_OPB_TSD_REF_0_HIGHADDR 0xAA000007
+#define XPAR_OPB_TSD_REF_0_DEVICE_ID 0
+
+/******************************************************************/
+
+#define XPAR_OPB_AC97_CONTROLLER_REF_0_BASEADDR 0xA6000000
+#define XPAR_OPB_AC97_CONTROLLER_REF_0_HIGHADDR 0xA60000FF
+#define XPAR_OPB_PAR_PORT_REF_0_BASEADDR 0x90010000
+#define XPAR_OPB_PAR_PORT_REF_0_HIGHADDR 0x900100FF
+#define XPAR_PLB_DDR_0_BASEADDR 0x00000000
+#define XPAR_PLB_DDR_0_HIGHADDR 0x0FFFFFFF
+
+/******************************************************************/
+
+#define XPAR_XINTC_HAS_IPR 1
+#define XPAR_INTC_MAX_NUM_INTR_INPUTS 18
+#define XPAR_XINTC_USE_DCR 0
+#define XPAR_XINTC_NUM_INSTANCES 1
+#define XPAR_DCR_INTC_0_BASEADDR 0xD0000FC0
+#define XPAR_DCR_INTC_0_HIGHADDR 0xD0000FDF
+#define XPAR_DCR_INTC_0_DEVICE_ID 0
+#define XPAR_DCR_INTC_0_KIND_OF_INTR 0x00038000
+
+/******************************************************************/
+
+#define XPAR_DCR_INTC_0_MISC_LOGIC_0_PHY_MII_INT_INTR 0
+#define XPAR_DCR_INTC_0_OPB_ETHERNET_0_IP2INTC_IRPT_INTR 1
+#define XPAR_DCR_INTC_0_MISC_LOGIC_0_IIC_TEMP_CRIT_INTR 2
+#define XPAR_DCR_INTC_0_MISC_LOGIC_0_IIC_IRQ_INTR 3
+#define XPAR_DCR_INTC_0_OPB_IIC_0_IP2INTC_IRPT_INTR 4
+#define XPAR_DCR_INTC_0_OPB_SYSACE_0_SYSACE_IRQ_INTR 5
+#define XPAR_DCR_INTC_0_OPB_UART16550_0_IP2INTC_IRPT_INTR 6
+#define XPAR_DCR_INTC_0_OPB_UART16550_1_IP2INTC_IRPT_INTR 7
+#define XPAR_DCR_INTC_0_OPB_PS2_DUAL_REF_0_SYS_INTR1_INTR 8
+#define XPAR_DCR_INTC_0_OPB_PS2_DUAL_REF_0_SYS_INTR2_INTR 9
+#define XPAR_DCR_INTC_0_OPB_SPI_0_IP2INTC_IRPT_INTR 10
+#define XPAR_DCR_INTC_0_OPB_TSD_REF_0_INTR_INTR 11
+#define XPAR_DCR_INTC_0_OPB_AC97_CONTROLLER_REF_0_PLAYBACK_INTERRUPT_INTR 12
+#define XPAR_DCR_INTC_0_OPB_AC97_CONTROLLER_REF_0_RECORD_INTERRUPT_INTR 13
+#define XPAR_DCR_INTC_0_OPB_PCI_REF_0_INTR_OUT_INTR 14
+#define XPAR_DCR_INTC_0_PLB2OPB_BRIDGE_0_BUS_ERROR_DET_INTR 15
+#define XPAR_DCR_INTC_0_PLB_V34_0_BUS_ERROR_DET_INTR 16
+#define XPAR_DCR_INTC_0_OPB2PLB_BRIDGE_0_BUS_ERROR_DET_INTR 17
+
+/******************************************************************/
+
+#define XPAR_XTFT_NUM_INSTANCES 1
+#define XPAR_PLB_TFT_CNTLR_REF_0_DCR_BASEADDR 0xD0000200
+#define XPAR_PLB_TFT_CNTLR_REF_0_DCR_HIGHADDR 0xD0000207
+#define XPAR_PLB_TFT_CNTLR_REF_0_DEVICE_ID 0
+
+/******************************************************************/
+
+#define XPAR_XSYSACE_MEM_WIDTH 8
+#define XPAR_XSYSACE_NUM_INSTANCES 1
+#define XPAR_OPB_SYSACE_0_BASEADDR 0xCF000000
+#define XPAR_OPB_SYSACE_0_HIGHADDR 0xCF0001FF
+#define XPAR_OPB_SYSACE_0_DEVICE_ID 0
+#define XPAR_OPB_SYSACE_0_MEM_WIDTH 8
+
+/******************************************************************/
+
+#define STDIN_BASEADDRESS 0xA0000000
+#define STDOUT_BASEADDRESS 0xA0000000
+#define XPAR_CPU_PPC405_CORE_CLOCK_FREQ_HZ 300000000
+
+/******************************************************************/
+
+/* U-Boot Redefines */
+
+/******************************************************************/
+
+#define XPAR_UARTNS550_0_BASEADDR (XPAR_OPB_UART16550_0_BASEADDR+0x1000)
+#define XPAR_UARTNS550_0_HIGHADDR XPAR_OPB_UART16550_0_HIGHADDR
+#define XPAR_UARTNS550_0_CLOCK_FREQ_HZ XPAR_XUARTNS550_CLOCK_HZ
+#define XPAR_UARTNS550_0_DEVICE_ID XPAR_OPB_UART16550_0_DEVICE_ID
+#define XPAR_UARTNS550_1_BASEADDR (XPAR_OPB_UART16550_1_BASEADDR+0x1000)
+#define XPAR_UARTNS550_1_HIGHADDR XPAR_OPB_UART16550_1_HIGHADDR
+#define XPAR_UARTNS550_1_CLOCK_FREQ_HZ XPAR_XUARTNS550_CLOCK_HZ
+#define XPAR_UARTNS550_1_DEVICE_ID XPAR_OPB_UART16550_1_DEVICE_ID
+
+/******************************************************************/
+
+#define XPAR_EMAC_0_BASEADDR XPAR_OPB_ETHERNET_0_BASEADDR
+#define XPAR_EMAC_0_HIGHADDR XPAR_OPB_ETHERNET_0_HIGHADDR
+#define XPAR_EMAC_0_DMA_PRESENT XPAR_OPB_ETHERNET_0_DMA_PRESENT
+#define XPAR_EMAC_0_MII_EXIST XPAR_OPB_ETHERNET_0_MII_EXIST
+#define XPAR_EMAC_0_ERR_COUNT_EXIST XPAR_OPB_ETHERNET_0_ERR_COUNT_EXIST
+#define XPAR_EMAC_0_DEVICE_ID XPAR_OPB_ETHERNET_0_DEVICE_ID
+
+/******************************************************************/
+
+#define XPAR_CORE_CLOCK_FREQ_HZ XPAR_CPU_PPC405_CORE_CLOCK_FREQ_HZ
+
+/******************************************************************/
generated by cgit v1.1 at 2024-11-17 08:40:58 +0000