diff options
Diffstat (limited to 'board/xes')
| -rw-r--r-- | board/xes/common/Makefile | 2 | ||||
| -rw-r--r-- | board/xes/common/fsl_8xxx_ddr.c | 46 | ||||
| -rw-r--r-- | board/xes/common/fsl_8xxx_pci.c | 113 | ||||
| -rw-r--r-- | board/xes/xpedite517x/law.c | 8 | ||||
| -rw-r--r-- | board/xes/xpedite517x/xpedite517x.c | 13 | ||||
| -rw-r--r-- | board/xes/xpedite520x/law.c | 8 | ||||
| -rw-r--r-- | board/xes/xpedite537x/law.c | 12 | ||||
| -rw-r--r-- | board/xes/xpedite550x/law.c | 12 |
8 files changed, 27 insertions, 187 deletions
diff --git a/board/xes/common/Makefile b/board/xes/common/Makefile index 7604f62..39d105f 100644 --- a/board/xes/common/Makefile +++ b/board/xes/common/Makefile @@ -33,8 +33,6 @@ COBJS-$(CONFIG_FSL_PCI_INIT) += fsl_8xxx_pci.o COBJS-$(CONFIG_MPC8572) += fsl_8xxx_clk.o COBJS-$(CONFIG_MPC86xx) += fsl_8xxx_clk.o COBJS-$(CONFIG_P2020) += fsl_8xxx_clk.o -COBJS-$(CONFIG_FSL_DDR2) += fsl_8xxx_ddr.o -COBJS-$(CONFIG_FSL_DDR3) += fsl_8xxx_ddr.o COBJS-$(CONFIG_MPC85xx) += fsl_8xxx_misc.o board.o COBJS-$(CONFIG_MPC86xx) += fsl_8xxx_misc.o board.o COBJS-$(CONFIG_NAND_ACTL) += actl_nand.o diff --git a/board/xes/common/fsl_8xxx_ddr.c b/board/xes/common/fsl_8xxx_ddr.c deleted file mode 100644 index 81ee70d..0000000 --- a/board/xes/common/fsl_8xxx_ddr.c +++ /dev/null @@ -1,46 +0,0 @@ -/* - * Copyright 2008 Extreme Engineering Solutions, Inc. - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#include <common.h> -#include <asm/fsl_ddr_sdram.h> -#include <asm/mmu.h> - -#if defined(CONFIG_DDR_ECC) && !defined(CONFIG_ECC_INIT_VIA_DDRCONTROLLER) -extern void ddr_enable_ecc(unsigned int dram_size); -#endif - -phys_size_t initdram(int board_type) -{ - phys_size_t dram_size = fsl_ddr_sdram(); - -#ifdef CONFIG_MPC85xx - dram_size = setup_ddr_tlbs(dram_size / 0x100000); - dram_size *= 0x100000; -#endif - -#if defined(CONFIG_DDR_ECC) && !defined(CONFIG_ECC_INIT_VIA_DDRCONTROLLER) - /* Initialize and enable DDR ECC */ - ddr_enable_ecc(dram_size); -#endif - - return dram_size; -} diff --git a/board/xes/common/fsl_8xxx_pci.c b/board/xes/common/fsl_8xxx_pci.c index 4a0965b..28c83c7 100644 --- a/board/xes/common/fsl_8xxx_pci.c +++ b/board/xes/common/fsl_8xxx_pci.c @@ -24,6 +24,7 @@ #include <common.h> #include <pci.h> #include <asm/fsl_pci.h> +#include <asm/fsl_serdes.h> #include <asm/io.h> #include <linux/compiler.h> #include <libfdt.h> @@ -33,59 +34,16 @@ #ifdef CONFIG_PCI1 static struct pci_controller pci1_hose; #endif -#ifdef CONFIG_PCIE1 -static struct pci_controller pcie1_hose; -#endif -#ifdef CONFIG_PCIE2 -static struct pci_controller pcie2_hose; -#endif -#ifdef CONFIG_PCIE3 -static struct pci_controller pcie3_hose; -#endif - -/* - * 85xx and 86xx share naming conventions, but different layout. - * Correlate names to CPU-specific values to share common - * PCI code. - */ -#if defined(CONFIG_MPC85xx) -#define MPC8xxx_DEVDISR_PCIE1 MPC85xx_DEVDISR_PCIE -#define MPC8xxx_DEVDISR_PCIE2 MPC85xx_DEVDISR_PCIE2 -#define MPC8xxx_DEVDISR_PCIE3 MPC85xx_DEVDISR_PCIE3 -#define MPC8xxx_PORDEVSR_IO_SEL MPC85xx_PORDEVSR_IO_SEL -#define MPC8xxx_PORDEVSR_IO_SEL_SHIFT MPC85xx_PORDEVSR_IO_SEL_SHIFT -#define MPC8xxx_PORBMSR_HA MPC85xx_PORBMSR_HA -#define MPC8xxx_PORBMSR_HA_SHIFT MPC85xx_PORBMSR_HA_SHIFT -#elif defined(CONFIG_MPC86xx) -#define MPC8xxx_DEVDISR_PCIE1 MPC86xx_DEVDISR_PCIEX1 -#define MPC8xxx_DEVDISR_PCIE2 MPC86xx_DEVDISR_PCIEX2 -#define MPC8xxx_DEVDISR_PCIE3 0 /* 8641 doesn't have PCIe3 */ -#define MPC8xxx_PORDEVSR_IO_SEL MPC8641_PORDEVSR_IO_SEL -#define MPC8xxx_PORDEVSR_IO_SEL_SHIFT MPC8641_PORDEVSR_IO_SEL_SHIFT -#define MPC8xxx_PORBMSR_HA MPC8641_PORBMSR_HA -#define MPC8xxx_PORBMSR_HA_SHIFT MPC8641_PORBMSR_HA_SHIFT -#endif void pci_init_board(void) { - struct fsl_pci_info pci_info[3]; int first_free_busno = 0; - int num = 0; - int pcie_ep; - __maybe_unused int pcie_configured; -#if defined(CONFIG_MPC85xx) +#ifdef CONFIG_PCI1 + int pcie_ep; + struct fsl_pci_info pci_info; volatile ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR); -#elif defined(CONFIG_MPC86xx) - immap_t *immap = (immap_t *)CONFIG_SYS_IMMR; - volatile ccsr_gur_t *gur = &immap->im_gur; -#endif u32 devdisr = in_be32(&gur->devdisr); - u32 pordevsr = in_be32(&gur->pordevsr); - __maybe_unused uint io_sel = (pordevsr & MPC8xxx_PORDEVSR_IO_SEL) >> - MPC8xxx_PORDEVSR_IO_SEL_SHIFT; - -#ifdef CONFIG_PCI1 uint pci_spd_norm = in_be32(&gur->pordevsr) & MPC85xx_PORDEVSR_PCI1_SPD; uint pci_32 = in_be32(&gur->pordevsr) & MPC85xx_PORDEVSR_PCI1_PCI32; uint pci_arb = in_be32(&gur->pordevsr) & MPC85xx_PORDEVSR_PCI1_ARB; @@ -93,8 +51,13 @@ void pci_init_board(void) uint freq = CONFIG_SYS_CLK_FREQ / 1000 / 1000; if (!(devdisr & MPC85xx_DEVDISR_PCI1)) { - SET_STD_PCI_INFO(pci_info[num], 1); - pcie_ep = fsl_setup_hose(&pci1_hose, pci_info[num].regs); + SET_STD_PCI_INFO(pci_info, 1); + set_next_law(pci_info.mem_phys, + law_size_bits(pci_info.mem_size), pci_info.law); + set_next_law(pci_info.io_phys, + law_size_bits(pci_info.io_size), pci_info.law); + + pcie_ep = fsl_setup_hose(&pci1_hose, pci_info.regs); printf("PCI1: %d bit %s, %s %d MHz, %s, %s\n", pci_32 ? 32 : 64, pcix ? "PCIX" : "PCI", @@ -103,66 +66,18 @@ void pci_init_board(void) pcie_ep ? "agent" : "host", pci_arb ? "arbiter" : "external-arbiter"); - first_free_busno = fsl_pci_init_port(&pci_info[num++], + first_free_busno = fsl_pci_init_port(&pci_info, &pci1_hose, first_free_busno); } else { printf("PCI1: disabled\n"); } #elif defined CONFIG_MPC8548 + volatile ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR); /* PCI1 not present on MPC8572 */ setbits_be32(&gur->devdisr, MPC85xx_DEVDISR_PCI1); #endif -#ifdef CONFIG_PCIE1 - pcie_configured = is_fsl_pci_cfg(LAW_TRGT_IF_PCIE_1, io_sel); - - if (pcie_configured && !(devdisr & MPC8xxx_DEVDISR_PCIE1)) { - SET_STD_PCIE_INFO(pci_info[num], 1); - pcie_ep = fsl_setup_hose(&pcie1_hose, pci_info[num].regs); - printf("PCIE1: connected as %s\n", - pcie_ep ? "Endpoint" : "Root Complex"); - first_free_busno = fsl_pci_init_port(&pci_info[num++], - &pcie1_hose, first_free_busno); - } else { - printf("PCIE1: disabled\n"); - } -#else - setbits_be32(&gur->devdisr, MPC8xxx_DEVDISR_PCIE1); -#endif /* CONFIG_PCIE1 */ - -#ifdef CONFIG_PCIE2 - pcie_configured = is_fsl_pci_cfg(LAW_TRGT_IF_PCIE_2, io_sel); - - if (pcie_configured && !(devdisr & MPC8xxx_DEVDISR_PCIE2)) { - SET_STD_PCIE_INFO(pci_info[num], 2); - pcie_ep = fsl_setup_hose(&pcie2_hose, pci_info[num].regs); - printf("PCIE2: connected as %s\n", - pcie_ep ? "Endpoint" : "Root Complex"); - first_free_busno = fsl_pci_init_port(&pci_info[num++], - &pcie2_hose, first_free_busno); - } else { - printf("PCIE2: disabled\n"); - } -#else - setbits_be32(&gur->devdisr, MPC8xxx_DEVDISR_PCIE2); -#endif /* CONFIG_PCIE2 */ - -#ifdef CONFIG_PCIE3 - pcie_configured = is_fsl_pci_cfg(LAW_TRGT_IF_PCIE_3, io_sel); - - if (pcie_configured && !(devdisr & MPC8xxx_DEVDISR_PCIE3)) { - SET_STD_PCIE_INFO(pci_info[num], 3); - pcie_ep = fsl_setup_hose(&pcie3_hose, pci_info[num].regs); - printf("PCIE3: connected as %s\n", - pcie_ep ? "Endpoint" : "Root Complex"); - first_free_busno = fsl_pci_init_port(&pci_info[num++], - &pcie3_hose, first_free_busno); - } else { - printf("PCIE3: disabled\n"); - } -#else - setbits_be32(&gur->devdisr, MPC8xxx_DEVDISR_PCIE3); -#endif /* CONFIG_PCIE3 */ + fsl_pcie_init_board(first_free_busno); } #if defined(CONFIG_OF_BOARD_SETUP) diff --git a/board/xes/xpedite517x/law.c b/board/xes/xpedite517x/law.c index 0b7d9ef..df23df1 100644 --- a/board/xes/xpedite517x/law.c +++ b/board/xes/xpedite517x/law.c @@ -39,14 +39,6 @@ struct law_entry law_table[] = { /* NAND LAW covers 2 NAND flashes */ SET_LAW(CONFIG_SYS_NAND_BASE, LAW_SIZE_512K, LAW_TRGT_IF_LBC), #endif -#ifdef CONFIG_SYS_PCIE1_MEM_PHYS - SET_LAW(CONFIG_SYS_PCIE1_MEM_PHYS, LAW_SIZE_1G, LAW_TRGT_IF_PCIE_1), - SET_LAW(CONFIG_SYS_PCIE1_IO_PHYS, LAW_SIZE_8M, LAW_TRGT_IF_PCIE_1), -#endif -#ifdef CONFIG_SYS_PCIE2_MEM_PHYS - SET_LAW(CONFIG_SYS_PCIE2_MEM_PHYS, LAW_SIZE_256M, LAW_TRGT_IF_PCIE_2), - SET_LAW(CONFIG_SYS_PCIE2_IO_PHYS, LAW_SIZE_8M, LAW_TRGT_IF_PCIE_2), -#endif }; int num_law_entries = ARRAY_SIZE(law_table); diff --git a/board/xes/xpedite517x/xpedite517x.c b/board/xes/xpedite517x/xpedite517x.c index 0f7fa6c..572a908 100644 --- a/board/xes/xpedite517x/xpedite517x.c +++ b/board/xes/xpedite517x/xpedite517x.c @@ -22,6 +22,7 @@ #include <common.h> #include <asm/processor.h> +#include <asm/fsl_ddr_sdram.h> #include <asm/mmu.h> #include <asm/io.h> #include <fdt_support.h> @@ -71,6 +72,18 @@ int board_early_init_r(void) return 0; } +phys_size_t initdram(int board_type) +{ + phys_size_t dram_size = fsl_ddr_sdram(); + +#if defined(CONFIG_DDR_ECC) && !defined(CONFIG_ECC_INIT_VIA_DDRCONTROLLER) + /* Initialize and enable DDR ECC */ + ddr_enable_ecc(dram_size); +#endif + + return dram_size; +} + #if defined(CONFIG_OF_BOARD_SETUP) void ft_board_setup(void *blob, bd_t *bd) { diff --git a/board/xes/xpedite520x/law.c b/board/xes/xpedite520x/law.c index bbfcb9d..5c1fcd2 100644 --- a/board/xes/xpedite520x/law.c +++ b/board/xes/xpedite520x/law.c @@ -38,14 +38,6 @@ struct law_entry law_table[] = { /* LBC window - maps 256M 0xf0000000 -> 0xffffffff */ SET_LAW(CONFIG_SYS_FLASH_BASE2, LAW_SIZE_256M, LAW_TRGT_IF_LBC), SET_LAW(CONFIG_SYS_NAND_BASE, LAW_SIZE_1M, LAW_TRGT_IF_LBC), -#if CONFIG_SYS_PCI1_MEM_PHYS - SET_LAW(CONFIG_SYS_PCI1_MEM_PHYS, LAW_SIZE_1G, LAW_TRGT_IF_PCI_1), - SET_LAW(CONFIG_SYS_PCI1_IO_PHYS, LAW_SIZE_8M, LAW_TRGT_IF_PCI_1), -#endif -#if CONFIG_SYS_PCI2_MEM_PHYS - SET_LAW(CONFIG_SYS_PCI2_MEM_PHYS, LAW_SIZE_256M, LAW_TRGT_IF_PCI_2), - SET_LAW(CONFIG_SYS_PCI2_IO_PHYS, LAW_SIZE_8M, LAW_TRGT_IF_PCI_2), -#endif }; int num_law_entries = ARRAY_SIZE(law_table); diff --git a/board/xes/xpedite537x/law.c b/board/xes/xpedite537x/law.c index daee676..54c28da 100644 --- a/board/xes/xpedite537x/law.c +++ b/board/xes/xpedite537x/law.c @@ -37,18 +37,6 @@ struct law_entry law_table[] = { SET_LAW(CONFIG_SYS_FLASH_BASE2, LAW_SIZE_256M, LAW_TRGT_IF_LBC), SET_LAW(CONFIG_SYS_NAND_BASE, LAW_SIZE_1M, LAW_TRGT_IF_LBC), -#ifdef CONFIG_SYS_PCIE1_MEM_PHYS - SET_LAW(CONFIG_SYS_PCIE1_MEM_PHYS, LAW_SIZE_1G, LAW_TRGT_IF_PCIE_1), - SET_LAW(CONFIG_SYS_PCIE1_IO_PHYS, LAW_SIZE_8M, LAW_TRGT_IF_PCIE_1), -#endif -#ifdef CONFIG_SYS_PCIE2_MEM_PHYS - SET_LAW(CONFIG_SYS_PCIE2_MEM_PHYS, LAW_SIZE_256M, LAW_TRGT_IF_PCIE_2), - SET_LAW(CONFIG_SYS_PCIE2_IO_PHYS, LAW_SIZE_8M, LAW_TRGT_IF_PCIE_2), -#endif -#ifdef CONFIG_SYS_PCIE3_MEM_PHYS - SET_LAW(CONFIG_SYS_PCIE3_MEM_PHYS, LAW_SIZE_256M, LAW_TRGT_IF_PCIE_3), - SET_LAW(CONFIG_SYS_PCIE3_IO_PHYS, LAW_SIZE_8M, LAW_TRGT_IF_PCIE_3), -#endif }; int num_law_entries = ARRAY_SIZE(law_table); diff --git a/board/xes/xpedite550x/law.c b/board/xes/xpedite550x/law.c index 4d4445d..66f1cf9 100644 --- a/board/xes/xpedite550x/law.c +++ b/board/xes/xpedite550x/law.c @@ -37,18 +37,6 @@ struct law_entry law_table[] = { SET_LAW(CONFIG_SYS_FLASH_BASE2, LAW_SIZE_256M, LAW_TRGT_IF_LBC), SET_LAW(CONFIG_SYS_NAND_BASE, LAW_SIZE_1M, LAW_TRGT_IF_LBC), -#ifdef CONFIG_SYS_PCIE1_MEM_PHYS - SET_LAW(CONFIG_SYS_PCIE1_MEM_PHYS, LAW_SIZE_1G, LAW_TRGT_IF_PCIE_1), - SET_LAW(CONFIG_SYS_PCIE1_IO_PHYS, LAW_SIZE_8M, LAW_TRGT_IF_PCIE_1), -#endif -#ifdef CONFIG_SYS_PCIE2_MEM_PHYS - SET_LAW(CONFIG_SYS_PCIE2_MEM_PHYS, LAW_SIZE_256M, LAW_TRGT_IF_PCIE_2), - SET_LAW(CONFIG_SYS_PCIE2_IO_PHYS, LAW_SIZE_8M, LAW_TRGT_IF_PCIE_2), -#endif -#ifdef CONFIG_SYS_PCIE3_MEM_PHYS - SET_LAW(CONFIG_SYS_PCIE3_MEM_PHYS, LAW_SIZE_256M, LAW_TRGT_IF_PCIE_3), - SET_LAW(CONFIG_SYS_PCIE3_IO_PHYS, LAW_SIZE_8M, LAW_TRGT_IF_PCIE_3), -#endif }; int num_law_entries = ARRAY_SIZE(law_table); |