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-rw-r--r--board/uc100/u-boot.lds8
-rw-r--r--board/uc100/u-boot.lds.debug8
-rw-r--r--board/uc100/uc100.c2
3 files changed, 9 insertions, 9 deletions
diff --git a/board/uc100/u-boot.lds b/board/uc100/u-boot.lds
index 2554abc..db29342 100644
--- a/board/uc100/u-boot.lds
+++ b/board/uc100/u-boot.lds
@@ -33,11 +33,11 @@ SECTIONS
.dynsym : { *(.dynsym) }
.dynstr : { *(.dynstr) }
.rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
+ .rela.text : { *(.rela.text) }
.rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
+ .rela.data : { *(.rela.data) }
+ .rel.rodata : { *(.rel.rodata) }
+ .rela.rodata : { *(.rela.rodata) }
.rel.got : { *(.rel.got) }
.rela.got : { *(.rela.got) }
.rel.ctors : { *(.rel.ctors) }
diff --git a/board/uc100/u-boot.lds.debug b/board/uc100/u-boot.lds.debug
index 5aede10..25702a5 100644
--- a/board/uc100/u-boot.lds.debug
+++ b/board/uc100/u-boot.lds.debug
@@ -33,11 +33,11 @@ SECTIONS
.dynsym : { *(.dynsym) }
.dynstr : { *(.dynstr) }
.rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
+ .rela.text : { *(.rela.text) }
.rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
+ .rela.data : { *(.rela.data) }
+ .rel.rodata : { *(.rel.rodata) }
+ .rela.rodata : { *(.rela.rodata) }
.rel.got : { *(.rel.got) }
.rela.got : { *(.rela.got) }
.rel.ctors : { *(.rel.ctors) }
diff --git a/board/uc100/uc100.c b/board/uc100/uc100.c
index 4f2cff6..a5dd95d 100644
--- a/board/uc100/uc100.c
+++ b/board/uc100/uc100.c
@@ -188,7 +188,7 @@ long int initdram (int board_type)
memctl->memc_mptpr = 0x0200; /* Divide by 32 WV */
memctl->memc_mamr = CFG_MAMR_VAL & 0xFF7FFFFF; /* Bit 8 := "0" Kein Refresh WV */
- memctl->memc_mbmr = CFG_MBMR_VAL;
+ memctl->memc_mbmr = CFG_MBMR_VAL;
/*---------------------------------------------------------------------*/
/* Initialize the Memory Controller registers, MPTPR, Chip Select 1 */