6 files changed, 34 insertions, 31 deletions
diff --git a/board/ti/am335x/Kconfig b/board/ti/am335x/Kconfig
index 1ddbb2c..a20e0c1 100644
--- a/board/ti/am335x/Kconfig
+++ b/board/ti/am335x/Kconfig
@@ -37,4 +37,20 @@ config NOR_BOOT
 	  booted via NOR.  In this case we will enable certain pinmux early
 	  as the ROM only partially sets up pinmux.  We also default to using
 	  NOR for environment.
+
+config DM
+	default y if !SPL_BUILD
+
+config DM_GPIO
+	default y if DM && !SPL_BUILD
+
+config DM_SERIAL
+	default y if DM && !SPL_BUILD
+
+config SYS_MALLOC_F
+	default y if DM && !SPL_BUILD
+
+config SYS_MALLOC_F_LEN
+	default 0x400 if DM && !SPL_BUILD
+
 endif
diff --git a/board/ti/beagle_x15/board.c b/board/ti/beagle_x15/board.c
index db96e34..3a7e04d 100644
--- a/board/ti/beagle_x15/board.c
+++ b/board/ti/beagle_x15/board.c
@@ -47,7 +47,8 @@ static const struct emif_regs beagle_x15_emif1_ddr3_532mhz_emif_regs = {
 	.sdram_config_init	= 0x61851b32,
 	.sdram_config		= 0x61851b32,
 	.sdram_config2		= 0x00000000,
-	.ref_ctrl		= 0x00001035,
+	.ref_ctrl		= 0x000040F1,
+	.ref_ctrl_final		= 0x00001035,
 	.sdram_tim1		= 0xceef266b,
 	.sdram_tim2		= 0x328f7fda,
 	.sdram_tim3		= 0x027f88a8,
@@ -103,7 +104,8 @@ static const struct emif_regs beagle_x15_emif2_ddr3_532mhz_emif_regs = {
 	.sdram_config_init	= 0x61851b32,
 	.sdram_config		= 0x61851b32,
 	.sdram_config2		= 0x00000000,
-	.ref_ctrl		= 0x00001035,
+	.ref_ctrl		= 0x000040F1,
+	.ref_ctrl_final		= 0x00001035,
 	.sdram_tim1		= 0xceef266b,
 	.sdram_tim2		= 0x328f7fda,
 	.sdram_tim3		= 0x027f88a8,
diff --git a/board/ti/ks2_evm/board.c b/board/ti/ks2_evm/board.c
index 04ec675..8892a28 100644
--- a/board/ti/ks2_evm/board.c
+++ b/board/ti/ks2_evm/board.c
@@ -35,12 +35,14 @@ static struct aemif_config aemif_configs[] = {
 
 int dram_init(void)
 {
-	ddr3_init();
+	u32 ddr3_size;
+
+	ddr3_size = ddr3_init();
 
 	gd->ram_size = get_ram_size((long *)CONFIG_SYS_SDRAM_BASE,
 				    CONFIG_MAX_RAM_BANK_SIZE);
 	aemif_init(ARRAY_SIZE(aemif_configs), aemif_configs);
-	ddr3_init_ecc(KS2_DDR3A_EMIF_CTRL_BASE);
+	ddr3_init_ecc(KS2_DDR3A_EMIF_CTRL_BASE, ddr3_size);
 	return 0;
 }
 
diff --git a/board/ti/ks2_evm/ddr3_k2e.c b/board/ti/ks2_evm/ddr3_k2e.c
index 40fd966..35ffb42 100644
--- a/board/ti/ks2_evm/ddr3_k2e.c
+++ b/board/ti/ks2_evm/ddr3_k2e.c
@@ -11,11 +11,11 @@
 #include "ddr3_cfg.h"
 #include <asm/arch/ddr3.h>
 
-static int ddr3_size;
 static struct pll_init_data ddr3_400 = DDR3_PLL_400;
 
-void ddr3_init(void)
+u32 ddr3_init(void)
 {
+	u32 ddr3_size;
 	char dimm_name[32];
 
 	if (~(readl(KS2_PLL_CNTRL_BASE + KS2_RSTCTRL_RSTYPE) & 0x1))
@@ -43,13 +43,11 @@ void ddr3_init(void)
 		printf("DRAM: 4 GiB\n");
 		ddr3_init_ddrphy(KS2_DDR3A_DDRPHYC, &ddr3phy_1600_4g);
 		ddr3_init_ddremif(KS2_DDR3A_EMIF_CTRL_BASE, &ddr3_1600_4g);
+	} else {
+		printf("Unknown SO-DIMM. Cannot configure DDR3\n");
+		while (1)
+			;
 	}
-}
 
-/**
- * ddr3_get_size - return ddr3 size in GiB
- */
-int ddr3_get_size(void)
-{
 	return ddr3_size;
 }
diff --git a/board/ti/ks2_evm/ddr3_k2hk.c b/board/ti/ks2_evm/ddr3_k2hk.c
index a1c3d05..b36eb27 100644
--- a/board/ti/ks2_evm/ddr3_k2hk.c
+++ b/board/ti/ks2_evm/ddr3_k2hk.c
@@ -12,14 +12,13 @@
 #include <asm/arch/ddr3.h>
 #include <asm/arch/hardware.h>
 
-static int ddr3_size;
-
 struct pll_init_data ddr3a_333 = DDR3_PLL_333(A);
 struct pll_init_data ddr3a_400 = DDR3_PLL_400(A);
 
-void ddr3_init(void)
+u32 ddr3_init(void)
 {
 	char dimm_name[32];
+	u32 ddr3_size;
 
 	ddr3_get_dimm_params(dimm_name);
 
@@ -93,12 +92,6 @@ void ddr3_init(void)
 	/* Apply the workaround for PG 1.0 and 1.1 Silicons */
 	if (cpu_revision() <= 1)
 		ddr3_err_reset_workaround();
-}
 
-/**
- * ddr3_get_size - return ddr3 size in GiB
- */
-int ddr3_get_size(void)
-{
 	return ddr3_size;
 }
diff --git a/board/ti/ks2_evm/ddr3_k2l.c b/board/ti/ks2_evm/ddr3_k2l.c
index 15a14f2..00fc194 100644
--- a/board/ti/ks2_evm/ddr3_k2l.c
+++ b/board/ti/ks2_evm/ddr3_k2l.c
@@ -11,28 +11,20 @@
 #include "ddr3_cfg.h"
 #include <asm/arch/ddr3.h>
 
-static int ddr3_size;
 static struct pll_init_data ddr3_400 = DDR3_PLL_400;
 
-void ddr3_init(void)
+u32 ddr3_init(void)
 {
 	init_pll(&ddr3_400);
 
 	/* No SO-DIMM, 2GB discreet DDR */
 	printf("DRAM: 2 GiB\n");
-	ddr3_size = 2;
 
 	/* Reset DDR3 PHY after PLL enabled */
 	ddr3_reset_ddrphy();
 
 	ddr3_init_ddrphy(KS2_DDR3A_DDRPHYC, &ddr3phy_1600_2g);
 	ddr3_init_ddremif(KS2_DDR3A_EMIF_CTRL_BASE, &ddr3_1600_2g);
-}
 
-/**
- * ddr3_get_size - return ddr3 size in GiB
- */
-int ddr3_get_size(void)
-{
-	return ddr3_size;
+	return 2;
 }