diff options
Diffstat (limited to 'board/ti')
-rw-r--r-- | board/ti/am335x/mux.c | 4 | ||||
-rw-r--r-- | board/ti/am3517crane/am3517crane.h | 2 | ||||
-rw-r--r-- | board/ti/evm/evm.h | 2 | ||||
-rw-r--r-- | board/ti/ks2_evm/Kconfig | 16 | ||||
-rw-r--r-- | board/ti/ks2_evm/MAINTAINERS | 2 | ||||
-rw-r--r-- | board/ti/ks2_evm/Makefile | 2 | ||||
-rw-r--r-- | board/ti/ks2_evm/board.c | 34 | ||||
-rw-r--r-- | board/ti/ks2_evm/board.h | 3 | ||||
-rw-r--r-- | board/ti/ks2_evm/board_k2e.c | 79 | ||||
-rw-r--r-- | board/ti/ks2_evm/board_k2hk.c | 14 | ||||
-rw-r--r-- | board/ti/ks2_evm/board_k2l.c | 72 | ||||
-rw-r--r-- | board/ti/ks2_evm/ddr3_cfg.c | 36 | ||||
-rw-r--r-- | board/ti/ks2_evm/ddr3_cfg.h | 3 | ||||
-rw-r--r-- | board/ti/ks2_evm/ddr3_k2hk.c | 16 | ||||
-rw-r--r-- | board/ti/ks2_evm/ddr3_k2l.c | 38 | ||||
-rw-r--r-- | board/ti/sdp3430/sdp.h | 2 |
16 files changed, 316 insertions, 9 deletions
diff --git a/board/ti/am335x/mux.c b/board/ti/am335x/mux.c index f4bb9f8..680f656 100644 --- a/board/ti/am335x/mux.c +++ b/board/ti/am335x/mux.c @@ -359,9 +359,9 @@ void enable_board_pin_mux(struct am335x_baseboard_id *header) configure_module_pin_mux(i2c1_pin_mux); configure_module_pin_mux(mii1_pin_mux); configure_module_pin_mux(mmc0_pin_mux); -#if defined(CONFIG_NAND) +#if defined(CONFIG_NAND) && defined(CONFIG_EMMC_BOOT) configure_module_pin_mux(nand_pin_mux); -#elif defined(CONFIG_NOR) +#elif defined(CONFIG_NOR) && defined(CONFIG_EMMC_BOOT) configure_module_pin_mux(bone_norcape_pin_mux); #else configure_module_pin_mux(mmc1_pin_mux); diff --git a/board/ti/am3517crane/am3517crane.h b/board/ti/am3517crane/am3517crane.h index e131c8f..6289ca7 100644 --- a/board/ti/am3517crane/am3517crane.h +++ b/board/ti/am3517crane/am3517crane.h @@ -284,7 +284,7 @@ const omap3_sysinfo sysinfo = { MUX_VAL(CP(SYS_CLKOUT1), (IEN | PTD | DIS | M4))/*GPIO_10 TP*/\ MUX_VAL(CP(SYS_CLKOUT2), (IEN | PTU | EN | M0))\ /*JTAG*/\ - MUX_VAL(CP(JTAG_nTRST), (IEN | PTD | DIS | M0))\ + MUX_VAL(CP(JTAG_NTRST), (IEN | PTD | DIS | M0))\ MUX_VAL(CP(JTAG_TCK), (IEN | PTD | DIS | M0))\ MUX_VAL(CP(JTAG_TMS), (IEN | PTD | DIS | M0))\ MUX_VAL(CP(JTAG_TDI), (IEN | PTD | DIS | M0))\ diff --git a/board/ti/evm/evm.h b/board/ti/evm/evm.h index f50193d..91e9b88 100644 --- a/board/ti/evm/evm.h +++ b/board/ti/evm/evm.h @@ -300,7 +300,7 @@ static void reset_net_chip(void); MUX_VAL(CP(SYS_OFF_MODE), (IEN | PTD | DIS | M0)) /*SYS_OFF_MODE*/\ MUX_VAL(CP(SYS_CLKOUT1), (IEN | PTD | DIS | M0)) /*SYS_CLKOUT1*/\ MUX_VAL(CP(SYS_CLKOUT2), (IEN | PTU | EN | M0)) /*SYS_CLKOUT2*/\ - MUX_VAL(CP(JTAG_nTRST), (IEN | PTD | DIS | M0)) /*JTAG_nTRST*/\ + MUX_VAL(CP(JTAG_NTRST), (IEN | PTD | DIS | M0)) /*JTAG_NTRST*/\ MUX_VAL(CP(JTAG_TCK), (IEN | PTD | DIS | M0)) /*JTAG_TCK*/\ MUX_VAL(CP(JTAG_TMS), (IEN | PTD | DIS | M0)) /*JTAG_TMS*/\ MUX_VAL(CP(JTAG_TDI), (IEN | PTD | DIS | M0)) /*JTAG_TDI*/\ diff --git a/board/ti/ks2_evm/Kconfig b/board/ti/ks2_evm/Kconfig index 9c1e103..96c5f22 100644 --- a/board/ti/ks2_evm/Kconfig +++ b/board/ti/ks2_evm/Kconfig @@ -23,3 +23,19 @@ config SYS_CONFIG_NAME default "k2hk_evm" endif + +if TARGET_K2L_EVM + +config SYS_BOARD + string + default "ks2_evm" + +config SYS_VENDOR + string + default "ti" + +config SYS_CONFIG_NAME + string + default "k2l_evm" + +endif diff --git a/board/ti/ks2_evm/MAINTAINERS b/board/ti/ks2_evm/MAINTAINERS index 595a80a..87c36c9 100644 --- a/board/ti/ks2_evm/MAINTAINERS +++ b/board/ti/ks2_evm/MAINTAINERS @@ -6,3 +6,5 @@ F: include/configs/k2hk_evm.h F: configs/k2hk_evm_defconfig F: include/configs/k2e_evm.h F: configs/k2e_evm_defconfig +F: include/configs/k2l_evm.h +F: configs/k2l_evm_defconfig diff --git a/board/ti/ks2_evm/Makefile b/board/ti/ks2_evm/Makefile index 00f1164..071dbee 100644 --- a/board/ti/ks2_evm/Makefile +++ b/board/ti/ks2_evm/Makefile @@ -11,3 +11,5 @@ obj-$(CONFIG_K2HK_EVM) += board_k2hk.o obj-$(CONFIG_K2HK_EVM) += ddr3_k2hk.o obj-$(CONFIG_K2E_EVM) += board_k2e.o obj-$(CONFIG_K2E_EVM) += ddr3_k2e.o +obj-$(CONFIG_K2L_EVM) += board_k2l.o +obj-$(CONFIG_K2L_EVM) += ddr3_k2l.o diff --git a/board/ti/ks2_evm/board.c b/board/ti/ks2_evm/board.c index dfe7be6..4029493 100644 --- a/board/ti/ks2_evm/board.c +++ b/board/ti/ks2_evm/board.c @@ -9,11 +9,13 @@ #include "board.h" #include <common.h> +#include <spl.h> #include <exports.h> #include <fdt_support.h> #include <asm/arch/ddr3.h> -#include <asm/arch/emac_defs.h> +#include <asm/arch/psc_defs.h> #include <asm/ti-common/ti-aemif.h> +#include <asm/ti-common/keystone_net.h> DECLARE_GLOBAL_DATA_PTR; @@ -38,6 +40,7 @@ int dram_init(void) gd->ram_size = get_ram_size((long *)CONFIG_SYS_SDRAM_BASE, CONFIG_MAX_RAM_BANK_SIZE); aemif_init(ARRAY_SIZE(aemif_configs), aemif_configs); + ddr3_init_ecc(KS2_DDR3A_EMIF_CTRL_BASE); return 0; } @@ -68,6 +71,15 @@ int board_eth_init(bd_t *bis) int port_num; char link_type_name[32]; + /* By default, select PA PLL clock as PA clock source */ + if (psc_enable_module(KS2_LPSC_PA)) + return -1; + if (psc_enable_module(KS2_LPSC_CPGMAC)) + return -1; + if (psc_enable_module(KS2_LPSC_CRYPTO)) + return -1; + pass_pll_pa_clk_enable(); + port_num = get_num_eth_ports(); for (j = 0; j < port_num; j++) { @@ -83,6 +95,24 @@ int board_eth_init(bd_t *bis) } #endif +#ifdef CONFIG_SPL_BUILD +void spl_board_init(void) +{ + spl_init_keystone_plls(); + preloader_console_init(); +} + +u32 spl_boot_device(void) +{ +#if defined(CONFIG_SPL_SPI_LOAD) + return BOOT_DEVICE_SPI; +#else + puts("Unknown boot device\n"); + hang(); +#endif +} +#endif + #if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP) void ft_board_setup(void *blob, bd_t *bd) { @@ -225,5 +255,7 @@ void ft_board_setup_ex(void *blob, bd_t *bd) reserve_start += 2; } } + + ddr3_check_ecc_int(KS2_DDR3A_EMIF_CTRL_BASE); } #endif diff --git a/board/ti/ks2_evm/board.h b/board/ti/ks2_evm/board.h index d91ef73..2bbd792 100644 --- a/board/ti/ks2_evm/board.h +++ b/board/ti/ks2_evm/board.h @@ -10,10 +10,11 @@ #ifndef _KS2_BOARD #define _KS2_BOARD -#include <asm/arch/emac_defs.h> +#include <asm/ti-common/keystone_net.h> extern struct eth_priv_t eth_priv_cfg[]; int get_num_eth_ports(void); +void spl_init_keystone_plls(void); #endif diff --git a/board/ti/ks2_evm/board_k2e.c b/board/ti/ks2_evm/board_k2e.c index 5472a43..43dfc48 100644 --- a/board/ti/ks2_evm/board_k2e.c +++ b/board/ti/ks2_evm/board_k2e.c @@ -10,6 +10,7 @@ #include <common.h> #include <asm/arch/ddr3.h> #include <asm/arch/hardware.h> +#include <asm/ti-common/keystone_net.h> DECLARE_GLOBAL_DATA_PTR; @@ -35,10 +36,75 @@ static struct pll_init_data core_pll_config[] = { CORE_PLL_1500, }; - static struct pll_init_data pa_pll_config = PASS_PLL_1000; +#ifdef CONFIG_DRIVER_TI_KEYSTONE_NET +struct eth_priv_t eth_priv_cfg[] = { + { + .int_name = "K2E_EMAC0", + .rx_flow = 0, + .phy_addr = 0, + .slave_port = 1, + .sgmii_link_type = SGMII_LINK_MAC_PHY, + }, + { + .int_name = "K2E_EMAC1", + .rx_flow = 8, + .phy_addr = 1, + .slave_port = 2, + .sgmii_link_type = SGMII_LINK_MAC_PHY, + }, + { + .int_name = "K2E_EMAC2", + .rx_flow = 16, + .phy_addr = 2, + .slave_port = 3, + .sgmii_link_type = SGMII_LINK_MAC_MAC_FORCED, + }, + { + .int_name = "K2E_EMAC3", + .rx_flow = 24, + .phy_addr = 3, + .slave_port = 4, + .sgmii_link_type = SGMII_LINK_MAC_MAC_FORCED, + }, + { + .int_name = "K2E_EMAC4", + .rx_flow = 32, + .phy_addr = 4, + .slave_port = 5, + .sgmii_link_type = SGMII_LINK_MAC_MAC_FORCED, + }, + { + .int_name = "K2E_EMAC5", + .rx_flow = 40, + .phy_addr = 5, + .slave_port = 6, + .sgmii_link_type = SGMII_LINK_MAC_MAC_FORCED, + }, + { + .int_name = "K2E_EMAC6", + .rx_flow = 48, + .phy_addr = 6, + .slave_port = 7, + .sgmii_link_type = SGMII_LINK_MAC_MAC_FORCED, + }, + { + .int_name = "K2E_EMAC7", + .rx_flow = 56, + .phy_addr = 7, + .slave_port = 8, + .sgmii_link_type = SGMII_LINK_MAC_MAC_FORCED, + }, +}; + +int get_num_eth_ports(void) +{ + return sizeof(eth_priv_cfg) / sizeof(struct eth_priv_t); +} +#endif + #if defined(CONFIG_BOARD_EARLY_INIT_F) int board_early_init_f(void) { @@ -52,3 +118,14 @@ int board_early_init_f(void) return 0; } #endif + +#ifdef CONFIG_SPL_BUILD +static struct pll_init_data spl_pll_config[] = { + CORE_PLL_800, +}; + +void spl_init_keystone_plls(void) +{ + init_plls(ARRAY_SIZE(spl_pll_config), spl_pll_config); +} +#endif diff --git a/board/ti/ks2_evm/board_k2hk.c b/board/ti/ks2_evm/board_k2hk.c index 6fb3d21..ed181f4 100644 --- a/board/ti/ks2_evm/board_k2hk.c +++ b/board/ti/ks2_evm/board_k2hk.c @@ -10,7 +10,7 @@ #include <common.h> #include <asm/arch/clock.h> #include <asm/arch/hardware.h> -#include <asm/arch/emac_defs.h> +#include <asm/ti-common/keystone_net.h> DECLARE_GLOBAL_DATA_PTR; @@ -100,3 +100,15 @@ int board_early_init_f(void) return 0; } #endif + +#ifdef CONFIG_SPL_BUILD +static struct pll_init_data spl_pll_config[] = { + CORE_PLL_799, + TETRIS_PLL_500, +}; + +void spl_init_keystone_plls(void) +{ + init_plls(ARRAY_SIZE(spl_pll_config), spl_pll_config); +} +#endif diff --git a/board/ti/ks2_evm/board_k2l.c b/board/ti/ks2_evm/board_k2l.c new file mode 100644 index 0000000..559d20c --- /dev/null +++ b/board/ti/ks2_evm/board_k2l.c @@ -0,0 +1,72 @@ +/* + * K2L EVM : Board initialization + * + * (C) Copyright 2014 + * Texas Instruments Incorporated, <www.ti.com> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <common.h> +#include <asm/arch/ddr3.h> +#include <asm/arch/hardware.h> +#include <asm/ti-common/ti-aemif.h> + +DECLARE_GLOBAL_DATA_PTR; + +unsigned int external_clk[ext_clk_count] = { + [sys_clk] = 122880000, + [alt_core_clk] = 100000000, + [pa_clk] = 122880000, + [tetris_clk] = 122880000, + [ddr3_clk] = 100000000, + [pcie_clk] = 100000000, + [sgmii_clk] = 156250000, + [usb_clk] = 100000000, +}; + +static struct pll_init_data core_pll_config[] = { + CORE_PLL_799, + CORE_PLL_1000, + CORE_PLL_1198, +}; + +static struct pll_init_data tetris_pll_config[] = { + TETRIS_PLL_799, + TETRIS_PLL_1000, + TETRIS_PLL_1198, + TETRIS_PLL_1352, + TETRIS_PLL_1401, +}; + +static struct pll_init_data pa_pll_config = + PASS_PLL_983; + +#ifdef CONFIG_BOARD_EARLY_INIT_F +int board_early_init_f(void) +{ + int speed; + + speed = get_max_dev_speed(); + init_pll(&core_pll_config[speed]); + + init_pll(&pa_pll_config); + + speed = get_max_arm_speed(); + init_pll(&tetris_pll_config[speed]); + + return 0; +} +#endif + +#ifdef CONFIG_SPL_BUILD +static struct pll_init_data spl_pll_config[] = { + CORE_PLL_799, + TETRIS_PLL_491, +}; + +void spl_init_keystone_plls(void) +{ + init_plls(ARRAY_SIZE(spl_pll_config), spl_pll_config); +} +#endif diff --git a/board/ti/ks2_evm/ddr3_cfg.c b/board/ti/ks2_evm/ddr3_cfg.c index f7da9f2..ab44676 100644 --- a/board/ti/ks2_evm/ddr3_cfg.c +++ b/board/ti/ks2_evm/ddr3_cfg.c @@ -133,6 +133,42 @@ struct ddr3_emif_config ddr3_1600_4g = { }; #endif +struct ddr3_phy_config ddr3phy_1600_2g = { + .pllcr = 0x0001C000ul, + .pgcr1_mask = (IODDRM_MASK | ZCKSEL_MASK), + .pgcr1_val = ((1 << 2) | (1 << 7) | (1 << 23)), + .ptr0 = 0x42C21590ul, + .ptr1 = 0xD05612C0ul, + .ptr2 = 0, /* not set in gel */ + .ptr3 = 0x0D861A80ul, + .ptr4 = 0x0C827100ul, + .dcr_mask = (PDQ_MASK | MPRDQ_MASK | BYTEMASK_MASK), + .dcr_val = ((1 << 10)), + .dtpr0 = 0x9D5CBB66ul, + .dtpr1 = 0x12868300ul, + .dtpr2 = 0x5002D200ul, + .mr0 = 0x00001C70ul, + .mr1 = 0x00000006ul, + .mr2 = 0x00000018ul, + .dtcr = 0x710035C7ul, + .pgcr2 = 0x00F07A12ul, + .zq0cr1 = 0x0001005Dul, + .zq1cr1 = 0x0001005Bul, + .zq2cr1 = 0x0001005Bul, + .pir_v1 = 0x00000033ul, + .pir_v2 = 0x0000FF81ul, +}; + +struct ddr3_emif_config ddr3_1600_2g = { + .sdcfg = 0x6200CE62ul, + .sdtim1 = 0x166C9855ul, + .sdtim2 = 0x00001D4Aul, + .sdtim3 = 0x435DFF53ul, + .sdtim4 = 0x543F0CFFul, + .zqcfg = 0x70073200ul, + .sdrfc = 0x00001869ul, +}; + int ddr3_get_dimm_params(char *dimm_name) { int ret; diff --git a/board/ti/ks2_evm/ddr3_cfg.h b/board/ti/ks2_evm/ddr3_cfg.h index 15fcf52..5bd786c 100644 --- a/board/ti/ks2_evm/ddr3_cfg.h +++ b/board/ti/ks2_evm/ddr3_cfg.h @@ -19,6 +19,9 @@ extern struct ddr3_emif_config ddr3_1333_2g; extern struct ddr3_phy_config ddr3phy_1600_4g; extern struct ddr3_emif_config ddr3_1600_4g; +extern struct ddr3_phy_config ddr3phy_1600_2g; +extern struct ddr3_emif_config ddr3_1600_2g; + int ddr3_get_dimm_params(char *dimm_name); #endif /* __DDR3_CFG_H */ diff --git a/board/ti/ks2_evm/ddr3_k2hk.c b/board/ti/ks2_evm/ddr3_k2hk.c index 6070a99..a1c3d05 100644 --- a/board/ti/ks2_evm/ddr3_k2hk.c +++ b/board/ti/ks2_evm/ddr3_k2hk.c @@ -12,6 +12,8 @@ #include <asm/arch/ddr3.h> #include <asm/arch/hardware.h> +static int ddr3_size; + struct pll_init_data ddr3a_333 = DDR3_PLL_333(A); struct pll_init_data ddr3a_400 = DDR3_PLL_400(A); @@ -44,12 +46,14 @@ void ddr3_init(void) ddr3_init_ddremif(KS2_DDR3A_EMIF_CTRL_BASE, &ddr3_1600_8g); printf("DRAM: Capacity 8 GiB (includes reported below)\n"); + ddr3_size = 8; } else { ddr3_init_ddrphy(KS2_DDR3A_DDRPHYC, &ddr3phy_1600_8g); ddr3_1600_8g.sdcfg |= 0x1000; ddr3_init_ddremif(KS2_DDR3A_EMIF_CTRL_BASE, &ddr3_1600_8g); printf("DRAM: Capacity 4 GiB (includes reported below)\n"); + ddr3_size = 4; } } else if (!strcmp(dimm_name, "SQR-SD3T-2G1333SED")) { init_pll(&ddr3a_333); @@ -70,11 +74,15 @@ void ddr3_init(void) } ddr3_init_ddremif(KS2_DDR3A_EMIF_CTRL_BASE, &ddr3_1333_2g); + ddr3_size = 2; + printf("DRAM: 2 GiB"); } else { ddr3_init_ddrphy(KS2_DDR3A_DDRPHYC, &ddr3phy_1333_2g); ddr3_1333_2g.sdcfg |= 0x1000; ddr3_init_ddremif(KS2_DDR3A_EMIF_CTRL_BASE, &ddr3_1333_2g); + ddr3_size = 1; + printf("DRAM: 1 GiB"); } } else { printf("Unknown SO-DIMM. Cannot configure DDR3\n"); @@ -86,3 +94,11 @@ void ddr3_init(void) if (cpu_revision() <= 1) ddr3_err_reset_workaround(); } + +/** + * ddr3_get_size - return ddr3 size in GiB + */ +int ddr3_get_size(void) +{ + return ddr3_size; +} diff --git a/board/ti/ks2_evm/ddr3_k2l.c b/board/ti/ks2_evm/ddr3_k2l.c new file mode 100644 index 0000000..15a14f2 --- /dev/null +++ b/board/ti/ks2_evm/ddr3_k2l.c @@ -0,0 +1,38 @@ +/* + * Keystone2: DDR3 initialization + * + * (C) Copyright 2014 + * Texas Instruments Incorporated, <www.ti.com> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <common.h> +#include "ddr3_cfg.h" +#include <asm/arch/ddr3.h> + +static int ddr3_size; +static struct pll_init_data ddr3_400 = DDR3_PLL_400; + +void ddr3_init(void) +{ + init_pll(&ddr3_400); + + /* No SO-DIMM, 2GB discreet DDR */ + printf("DRAM: 2 GiB\n"); + ddr3_size = 2; + + /* Reset DDR3 PHY after PLL enabled */ + ddr3_reset_ddrphy(); + + ddr3_init_ddrphy(KS2_DDR3A_DDRPHYC, &ddr3phy_1600_2g); + ddr3_init_ddremif(KS2_DDR3A_EMIF_CTRL_BASE, &ddr3_1600_2g); +} + +/** + * ddr3_get_size - return ddr3 size in GiB + */ +int ddr3_get_size(void) +{ + return ddr3_size; +} diff --git a/board/ti/sdp3430/sdp.h b/board/ti/sdp3430/sdp.h index 2acb302..0e63189 100644 --- a/board/ti/sdp3430/sdp.h +++ b/board/ti/sdp3430/sdp.h @@ -265,7 +265,7 @@ MUX_VAL(CP(SYS_OFF_MODE), (IEN | PTD | DIS | M0))\ MUX_VAL(CP(SYS_CLKOUT1), (IEN | PTD | DIS | M0))\ MUX_VAL(CP(SYS_CLKOUT2), (OFF_IN_PD | IEN | PTU | EN | M4))/*GPIO_186*/\ - MUX_VAL(CP(JTAG_nTRST), (IEN | PTD | DIS | M0))\ + MUX_VAL(CP(JTAG_NTRST), (IEN | PTD | DIS | M0))\ MUX_VAL(CP(JTAG_TCK), (IEN | PTD | DIS | M0))\ MUX_VAL(CP(JTAG_TMS), (IEN | PTD | DIS | M0))\ MUX_VAL(CP(JTAG_TDI), (IEN | PTD | DIS | M0))\ |