diff options
Diffstat (limited to 'board/ti/am335x')
-rw-r--r-- | board/ti/am335x/README | 28 | ||||
-rw-r--r-- | board/ti/am335x/board.c | 6 |
2 files changed, 28 insertions, 6 deletions
diff --git a/board/ti/am335x/README b/board/ti/am335x/README index 67b5246..2a30ab8 100644 --- a/board/ti/am335x/README +++ b/board/ti/am335x/README @@ -13,7 +13,33 @@ documented in TI's reference designs: - AM335x EVM SK - Beaglebone White - Beaglebone Black -' + +Customization +============= + +Given that all of the above boards are reference platforms (and the +Beaglebone platforms are OSHA), it is likely that this platform code and +configuration will be used as the basis of a custom platform. It is +worth noting that aside from things such as NAND or MMC only being +required if a custom platform makes use of these blocks, the following +are required, depending on design: + +- GPIO is only required if DDR3 power is controlled in a way similar to + EVM SK +- SPI is only required for SPI flash, or exposing the SPI bus. + +The following blocks are required: +- I2C, to talk with the PMIC and ensure that we do not run afoul of + errata 1.0.24. + +When removing options as part of customization, +CONFIG_EXTRA_ENV_SETTINGS will need additional care to update for your +needs and to remove no longer relevant options as in some cases we +define additional text blocks (such as for NAND or DFU strings). Also +note that all of the SPL options are grouped together, rather than with +the IP blocks, so both areas will need their choices updated to reflect +the custom design. + NAND ==== diff --git a/board/ti/am335x/board.c b/board/ti/am335x/board.c index 04c37e2..cc04426 100644 --- a/board/ti/am335x/board.c +++ b/board/ti/am335x/board.c @@ -30,10 +30,6 @@ DECLARE_GLOBAL_DATA_PTR; -/* MII mode defines */ -#define MII_MODE_ENABLE 0x0 -#define RGMII_MODE_ENABLE 0x3A - /* GPIO that controls power to DDR on EVM-SK */ #define GPIO_DDR_VTT_EN 7 @@ -460,7 +456,7 @@ int board_eth_init(bd_t *bis) cpsw_slaves[0].phy_if = cpsw_slaves[1].phy_if = PHY_INTERFACE_MODE_MII; } else { - writel(RGMII_MODE_ENABLE, &cdev->miisel); + writel((RGMII_MODE_ENABLE | RGMII_INT_DELAY), &cdev->miisel); cpsw_slaves[0].phy_if = cpsw_slaves[1].phy_if = PHY_INTERFACE_MODE_RGMII; } |