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-rw-r--r--board/solidcard3/init.S55
1 files changed, 27 insertions, 28 deletions
diff --git a/board/solidcard3/init.S b/board/solidcard3/init.S
index 36039e8..e7b3c83 100644
--- a/board/solidcard3/init.S
+++ b/board/solidcard3/init.S
@@ -1,26 +1,26 @@
/*------------------------------------------------------------------------------+
*
- * This souce code has been made available to you by EuroDesign
- * (www.eurodsn.de). It's based on the original IBM source code, so
- * this follows:
+ * This souce code has been made available to you by EuroDesign
+ * (www.eurodsn.de). It's based on the original IBM source code, so
+ * this follows:
*
- * This source code has been made available to you by IBM on an AS-IS
- * basis. Anyone receiving this source is licensed under IBM
- * copyrights to use it in any way he or she deems fit, including
- * copying it, modifying it, compiling it, and redistributing it either
- * with or without modifications. No license under IBM patents or
- * patent applications is to be implied by the copyright license.
+ * This source code has been made available to you by IBM on an AS-IS
+ * basis. Anyone receiving this source is licensed under IBM
+ * copyrights to use it in any way he or she deems fit, including
+ * copying it, modifying it, compiling it, and redistributing it either
+ * with or without modifications. No license under IBM patents or
+ * patent applications is to be implied by the copyright license.
*
- * Any user of this software should understand that IBM cannot provide
- * technical support for this software and will not be responsible for
- * any consequences resulting from the use of this software.
+ * Any user of this software should understand that IBM cannot provide
+ * technical support for this software and will not be responsible for
+ * any consequences resulting from the use of this software.
*
- * Any person who transfers this source code or any derivative work
- * must include the IBM copyright notice, this paragraph, and the
- * preceding two paragraphs in the transferred software.
+ * Any person who transfers this source code or any derivative work
+ * must include the IBM copyright notice, this paragraph, and the
+ * preceding two paragraphs in the transferred software.
*
- * COPYRIGHT I B M CORPORATION 1995
- * LICENSED MATERIAL - PROGRAM PROPERTY OF I B M
+ * COPYRIGHT I B M CORPORATION 1995
+ * LICENSED MATERIAL - PROGRAM PROPERTY OF I B M
*------------------------------------------------------------------------------- */
#include <config.h>
@@ -56,12 +56,12 @@ ext_bus_cntlr_init:
* timings into internal flash and external flash
*/
mfdcr r24,strap /* xxxx xxxx xxxx xxx? ?xxx xxxx xxxx xxxx
- 0 0 -> 8 bit external ROM
- 0 1 -> 16 bit internal ROM */
+ 0 0 -> 8 bit external ROM
+ 0 1 -> 16 bit internal ROM */
addi r4,0,2
srw r24,r24,r4 /* shift right r24 two positions */
andi. r24,r24,0x06000
-/*
+/*
* All calculations are based on 33MHz EBC clock.
*
* First, create a "very slow" timing (~250ns) with burst mode enabled
@@ -130,7 +130,7 @@ ext_bus_cntlr_init:
mtdcr ebccfgd,r4
/*-----------------------------------------------------------------------
- * Memory Bank 3 (Second-Flash) initialization
+ * Memory Bank 3 (Second-Flash) initialization
* 0xF0000000...0xF01FFFFF -> 2MB
*----------------------------------------------------------------------- */
@@ -149,7 +149,7 @@ ext_bus_cntlr_init:
xori r24,r24,0x2000 /* invert current bus width */
or r4,r4,r24
mtdcr ebccfgd,r4
-
+
/*-----------------------------------------------------------------------
* Memory Bank 1 (NAND-Flash) initialization
* 0x77D00000...0x77DFFFFF -> 1MB
@@ -186,7 +186,7 @@ ext_bus_cntlr_init:
li r4,pb4ap /* PB4AP=Peripheral Bank 4 Access Parameters */
mtdcr ebccfga,r4
lis r4,0x0180
- ori r4,r4,0x5940
+ ori r4,r4,0x5940
mtdcr ebccfgd,r4
#endif
@@ -199,7 +199,7 @@ ext_bus_cntlr_init:
A7 (ppc notation) or A24 (standard notation) decides about
the type of access:
A7/A24=0 -> memory cycle
- A7//A24=1 -> I/O cycle
+ A7/ /A24=1 -> I/O cycle
*/
li r4,pb2ap /* PB2AP=Peripheral Bank 2 Access Parameters */
mtdcr ebccfga,r4
@@ -253,7 +253,7 @@ ext_bus_cntlr_init:
li r25,pb6cr /* PB6CR=Peripheral Bank 6 Configuration Register */
mtdcr ebccfga,r25
lis r4,0x7401
- ori r4,r4,0xA000
+ ori r4,r4,0xA000
mtdcr ebccfgd,r4
li r25,pb7cr /* PB7CR=Peripheral Bank 7 Configuration Register */
@@ -295,8 +295,8 @@ ext_bus_cntlr_init:
*
* Note: All calculations are based on 33MHz EBC clock. One '#' or '_' is 30ns
*
- * |- 300ns --|
- * |---- 420ns ---|---- 420ns ---| cycle
+ * |- 300ns --|
+ * |---- 420ns ---|---- 420ns ---| cycle
* CS ############:###____#######:###____#######
* OE ############:####___#######:####___#######
* WE ############:####__########:####__########
@@ -380,4 +380,3 @@ ext_bus_cntlr_init:
stb r3,0(r4) /* 01 -> external bus controller is initialized */
nop /* pass2 DCR errata #8 */
blr
-