diff options
Diffstat (limited to 'board/scb9328')
| -rw-r--r-- | board/scb9328/flash.c | 22 | ||||
| -rw-r--r-- | board/scb9328/lowlevel_init.S | 38 | ||||
| -rw-r--r-- | board/scb9328/u-boot.lds | 2 |
3 files changed, 31 insertions, 31 deletions
diff --git a/board/scb9328/flash.c b/board/scb9328/flash.c index 304190c..c6f94ae 100644 --- a/board/scb9328/flash.c +++ b/board/scb9328/flash.c @@ -82,7 +82,7 @@ #endif -flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; +flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS]; static FLASH_BUS_RET flash_status_reg (void) { @@ -109,7 +109,7 @@ static int flash_ready (ulong timeout) return ok; } -#if ( CFG_MAX_FLASH_BANKS != 1 ) +#if ( CONFIG_SYS_MAX_FLASH_BANKS != 1 ) # error "SCB9328 platform has only one flash bank!" #endif @@ -120,11 +120,11 @@ ulong flash_init (void) unsigned long address = SCB9328_FLASH_BASE; flash_info[0].size = SCB9328_FLASH_BANK_SIZE; - flash_info[0].sector_count = CFG_MAX_FLASH_SECT; + flash_info[0].sector_count = CONFIG_SYS_MAX_FLASH_SECT; flash_info[0].flash_id = INTEL_MANUFACT; - memset (flash_info[0].protect, 0, CFG_MAX_FLASH_SECT); + memset (flash_info[0].protect, 0, CONFIG_SYS_MAX_FLASH_SECT); - for (i = 0; i < CFG_MAX_FLASH_SECT; i++) { + for (i = 0; i < CONFIG_SYS_MAX_FLASH_SECT; i++) { flash_info[0].start[i] = address; #ifdef SCB9328_FLASH_UNLOCK /* Some devices are hw locked after start. */ @@ -137,13 +137,13 @@ ulong flash_init (void) } flash_protect (FLAG_PROTECT_SET, - CFG_FLASH_BASE, - CFG_FLASH_BASE + monitor_flash_len - 1, + CONFIG_SYS_FLASH_BASE, + CONFIG_SYS_FLASH_BASE + monitor_flash_len - 1, &flash_info[0]); flash_protect (FLAG_PROTECT_SET, - CFG_ENV_ADDR, - CFG_ENV_ADDR + CFG_ENV_SIZE - 1, &flash_info[0]); + CONFIG_ENV_ADDR, + CONFIG_ENV_ADDR + CONFIG_ENV_SIZE - 1, &flash_info[0]); return SCB9328_FLASH_BANK_SIZE; } @@ -209,7 +209,7 @@ int flash_erase (flash_info_t * info, int s_first, int s_last) *address = FLASH_CMD (CFI_INTEL_CMD_BLOCK_ERASE); *address = FLASH_CMD (CFI_INTEL_CMD_CONFIRM); - if (flash_ready (CFG_FLASH_ERASE_TOUT)) { + if (flash_ready (CONFIG_SYS_FLASH_ERASE_TOUT)) { *address = FLASH_CMD (CFI_INTEL_CMD_CLEAR_STATUS_REGISTER); printf ("ok.\n"); } else { @@ -257,7 +257,7 @@ static int write_data (flash_info_t * info, ulong dest, FLASH_BUS data) *address = FLASH_CMD (CFI_INTEL_CMD_PROGRAM1); *address = data; - if (!flash_ready (CFG_FLASH_WRITE_TOUT)) { + if (!flash_ready (CONFIG_SYS_FLASH_WRITE_TOUT)) { *address = FLASH_CMD (CFI_INTEL_CMD_SUSPEND); rc = ERR_TIMOUT; printf ("timeout! Aborting...\n"); diff --git a/board/scb9328/lowlevel_init.S b/board/scb9328/lowlevel_init.S index ba3b6d2..8e6a49e 100644 --- a/board/scb9328/lowlevel_init.S +++ b/board/scb9328/lowlevel_init.S @@ -29,13 +29,13 @@ lowlevel_init: /* Change PERCLK1DIV to 14 ie 14+1 */ ldr r0, =PCDR - ldr r1, =CFG_PCDR_VAL + ldr r1, =CONFIG_SYS_PCDR_VAL str r1, [r0] /* set MCU PLL Control Register 0 */ ldr r0, =MPCTL0 - ldr r1, =CFG_MPCTL0_VAL + ldr r1, =CONFIG_SYS_MPCTL0_VAL str r1, [r0] /* set mpll restart bit */ @@ -57,7 +57,7 @@ lowlevel_init: /* set System PLL Control Register 0 */ ldr r0, =SPCTL0 - ldr r1, =CFG_SPCTL0_VAL + ldr r1, =CONFIG_SYS_SPCTL0_VAL str r1, [r0] /* set spll restart bit */ @@ -77,7 +77,7 @@ lowlevel_init: bne 1b ldr r0, =CSCR - ldr r1, =CFG_CSCR_VAL + ldr r1, =CONFIG_SYS_CSCR_VAL str r1, [r0] /* I have now read the ARM920 DataSheet back-to-Back, and have stumbled upon @@ -102,65 +102,65 @@ lowlevel_init: MCR p15,0,r0,c1,c0,0 ldr r0, =GPR(0) - ldr r1, =CFG_GPR_A_VAL + ldr r1, =CONFIG_SYS_GPR_A_VAL str r1, [r0] ldr r0, =GIUS(0) - ldr r1, =CFG_GIUS_A_VAL + ldr r1, =CONFIG_SYS_GIUS_A_VAL str r1, [r0] /* CS3 becomes CS3 by clearing reset default bit 1 in FMCR */ ldr r0, =FMCR - ldr r1, =CFG_FMCR_VAL + ldr r1, =CONFIG_SYS_FMCR_VAL str r1, [r0] ldr r0, =CS0U - ldr r1, =CFG_CS0U_VAL + ldr r1, =CONFIG_SYS_CS0U_VAL str r1, [r0] ldr r0, =CS0L - ldr r1, =CFG_CS0L_VAL + ldr r1, =CONFIG_SYS_CS0L_VAL str r1, [r0] ldr r0, =CS1U - ldr r1, =CFG_CS1U_VAL + ldr r1, =CONFIG_SYS_CS1U_VAL str r1, [r0] ldr r0, =CS1L - ldr r1, =CFG_CS1L_VAL + ldr r1, =CONFIG_SYS_CS1L_VAL str r1, [r0] ldr r0, =CS2U - ldr r1, =CFG_CS2U_VAL + ldr r1, =CONFIG_SYS_CS2U_VAL str r1, [r0] ldr r0, =CS2L - ldr r1, =CFG_CS2L_VAL + ldr r1, =CONFIG_SYS_CS2L_VAL str r1, [r0] ldr r0, =CS3U - ldr r1, =CFG_CS3U_VAL + ldr r1, =CONFIG_SYS_CS3U_VAL str r1, [r0] ldr r0, =CS3L - ldr r1, =CFG_CS3L_VAL + ldr r1, =CONFIG_SYS_CS3L_VAL str r1, [r0] ldr r0, =CS4U - ldr r1, =CFG_CS4U_VAL + ldr r1, =CONFIG_SYS_CS4U_VAL str r1, [r0] ldr r0, =CS4L - ldr r1, =CFG_CS4L_VAL + ldr r1, =CONFIG_SYS_CS4L_VAL str r1, [r0] ldr r0, =CS5U - ldr r1, =CFG_CS5U_VAL + ldr r1, =CONFIG_SYS_CS5U_VAL str r1, [r0] ldr r0, =CS5L - ldr r1, =CFG_CS5L_VAL + ldr r1, =CONFIG_SYS_CS5L_VAL str r1, [r0] /* SDRAM Setup */ diff --git a/board/scb9328/u-boot.lds b/board/scb9328/u-boot.lds index 46ed451..c96e58a 100644 --- a/board/scb9328/u-boot.lds +++ b/board/scb9328/u-boot.lds @@ -52,6 +52,6 @@ SECTIONS . = ALIGN(4); __bss_start = .; - .bss (NOLOAD) : { *(.bss) } + .bss (NOLOAD) : { *(.bss) . = ALIGN(4); } _end = .; } |