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-rw-r--r--board/sandpoint/early_init.S96
-rw-r--r--board/sandpoint/flash.c40
-rw-r--r--board/sandpoint/sandpoint.c8
3 files changed, 75 insertions, 69 deletions
diff --git a/board/sandpoint/early_init.S b/board/sandpoint/early_init.S
index 07dafb7..531dcdf 100644
--- a/board/sandpoint/early_init.S
+++ b/board/sandpoint/early_init.S
@@ -32,68 +32,68 @@
#if defined(USE_DINK32)
/* We are running from RAM, so do not clear the MCCR1_MEMGO bit! */
- #define MCCR1VAL ((CFG_ROMNAL << MCCR1_ROMNAL_SHIFT) | (CFG_ROMFAL << MCCR1_ROMFAL_SHIFT) | MCCR1_MEMGO)
+ #define MCCR1VAL ((CONFIG_SYS_ROMNAL << MCCR1_ROMNAL_SHIFT) | (CONFIG_SYS_ROMFAL << MCCR1_ROMFAL_SHIFT) | MCCR1_MEMGO)
#else
- #define MCCR1VAL (CFG_ROMNAL << MCCR1_ROMNAL_SHIFT) | (CFG_ROMFAL << MCCR1_ROMFAL_SHIFT)
+ #define MCCR1VAL (CONFIG_SYS_ROMNAL << MCCR1_ROMNAL_SHIFT) | (CONFIG_SYS_ROMFAL << MCCR1_ROMFAL_SHIFT)
#endif
.text
/* Values to program into memory controller registers */
tbl: .long MCCR1, MCCR1VAL
- .long MCCR2, CFG_REFINT << MCCR2_REFINT_SHIFT
+ .long MCCR2, CONFIG_SYS_REFINT << MCCR2_REFINT_SHIFT
.long MCCR3
- .long (((CFG_BSTOPRE & 0x000000f0) >> 4) << MCCR3_BSTOPRE2TO5_SHIFT) | \
- (CFG_REFREC << MCCR3_REFREC_SHIFT) | \
- (CFG_RDLAT << MCCR3_RDLAT_SHIFT)
+ .long (((CONFIG_SYS_BSTOPRE & 0x000000f0) >> 4) << MCCR3_BSTOPRE2TO5_SHIFT) | \
+ (CONFIG_SYS_REFREC << MCCR3_REFREC_SHIFT) | \
+ (CONFIG_SYS_RDLAT << MCCR3_RDLAT_SHIFT)
.long MCCR4
- .long (CFG_PRETOACT << MCCR4_PRETOACT_SHIFT) | (CFG_ACTTOPRE << MCCR4_ACTTOPRE_SHIFT) | \
- (CFG_REGISTERD_TYPE_BUFFER << 20) | \
- (((CFG_BSTOPRE & 0x00000300) >> 8) << MCCR4_BSTOPRE0TO1_SHIFT ) | \
- ((CFG_SDMODE_CAS_LAT << 4) | (CFG_SDMODE_WRAP << 3) | \
- (CFG_SDMODE_BURSTLEN) << MCCR4_SDMODE_SHIFT) | \
- (CFG_ACTTORW << MCCR4_ACTTORW_SHIFT) | \
- ((CFG_BSTOPRE & 0x0000000f) << MCCR4_BSTOPRE6TO9_SHIFT )
+ .long (CONFIG_SYS_PRETOACT << MCCR4_PRETOACT_SHIFT) | (CONFIG_SYS_ACTTOPRE << MCCR4_ACTTOPRE_SHIFT) | \
+ (CONFIG_SYS_REGISTERD_TYPE_BUFFER << 20) | \
+ (((CONFIG_SYS_BSTOPRE & 0x00000300) >> 8) << MCCR4_BSTOPRE0TO1_SHIFT ) | \
+ ((CONFIG_SYS_SDMODE_CAS_LAT << 4) | (CONFIG_SYS_SDMODE_WRAP << 3) | \
+ (CONFIG_SYS_SDMODE_BURSTLEN) << MCCR4_SDMODE_SHIFT) | \
+ (CONFIG_SYS_ACTTORW << MCCR4_ACTTORW_SHIFT) | \
+ ((CONFIG_SYS_BSTOPRE & 0x0000000f) << MCCR4_BSTOPRE6TO9_SHIFT )
.long MSAR1
- .long (((CFG_BANK0_START & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT) << 0) | \
- (((CFG_BANK1_START & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT) << 8) | \
- (((CFG_BANK2_START & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT) << 16) | \
- (((CFG_BANK3_START & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT) << 24)
+ .long (((CONFIG_SYS_BANK0_START & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT) << 0) | \
+ (((CONFIG_SYS_BANK1_START & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT) << 8) | \
+ (((CONFIG_SYS_BANK2_START & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT) << 16) | \
+ (((CONFIG_SYS_BANK3_START & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT) << 24)
.long EMSAR1
- .long (((CFG_BANK0_START & MICR_EADDR_MASK) >> MICR_EADDR_SHIFT) << 0) | \
- (((CFG_BANK1_START & MICR_EADDR_MASK) >> MICR_EADDR_SHIFT) << 8) | \
- (((CFG_BANK2_START & MICR_EADDR_MASK) >> MICR_EADDR_SHIFT) << 16) | \
- (((CFG_BANK3_START & MICR_EADDR_MASK) >> MICR_EADDR_SHIFT) << 24)
+ .long (((CONFIG_SYS_BANK0_START & MICR_EADDR_MASK) >> MICR_EADDR_SHIFT) << 0) | \
+ (((CONFIG_SYS_BANK1_START & MICR_EADDR_MASK) >> MICR_EADDR_SHIFT) << 8) | \
+ (((CONFIG_SYS_BANK2_START & MICR_EADDR_MASK) >> MICR_EADDR_SHIFT) << 16) | \
+ (((CONFIG_SYS_BANK3_START & MICR_EADDR_MASK) >> MICR_EADDR_SHIFT) << 24)
.long MSAR2
- .long (((CFG_BANK4_START & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT) << 0) | \
- (((CFG_BANK5_START & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT) << 8) | \
- (((CFG_BANK6_START & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT) << 16) | \
- (((CFG_BANK7_START & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT) << 24)
+ .long (((CONFIG_SYS_BANK4_START & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT) << 0) | \
+ (((CONFIG_SYS_BANK5_START & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT) << 8) | \
+ (((CONFIG_SYS_BANK6_START & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT) << 16) | \
+ (((CONFIG_SYS_BANK7_START & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT) << 24)
.long EMSAR2
- .long (((CFG_BANK4_START & MICR_EADDR_MASK) >> MICR_EADDR_SHIFT) << 0) | \
- (((CFG_BANK5_START & MICR_EADDR_MASK) >> MICR_EADDR_SHIFT) << 8) | \
- (((CFG_BANK6_START & MICR_EADDR_MASK) >> MICR_EADDR_SHIFT) << 16) | \
- (((CFG_BANK7_START & MICR_EADDR_MASK) >> MICR_EADDR_SHIFT) << 24)
+ .long (((CONFIG_SYS_BANK4_START & MICR_EADDR_MASK) >> MICR_EADDR_SHIFT) << 0) | \
+ (((CONFIG_SYS_BANK5_START & MICR_EADDR_MASK) >> MICR_EADDR_SHIFT) << 8) | \
+ (((CONFIG_SYS_BANK6_START & MICR_EADDR_MASK) >> MICR_EADDR_SHIFT) << 16) | \
+ (((CONFIG_SYS_BANK7_START & MICR_EADDR_MASK) >> MICR_EADDR_SHIFT) << 24)
.long MEAR1
- .long (((CFG_BANK0_END & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT) << 0) | \
- (((CFG_BANK1_END & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT) << 8) | \
- (((CFG_BANK2_END & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT) << 16) | \
- (((CFG_BANK3_END & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT) << 24)
+ .long (((CONFIG_SYS_BANK0_END & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT) << 0) | \
+ (((CONFIG_SYS_BANK1_END & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT) << 8) | \
+ (((CONFIG_SYS_BANK2_END & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT) << 16) | \
+ (((CONFIG_SYS_BANK3_END & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT) << 24)
.long EMEAR1
- .long (((CFG_BANK0_END & MICR_EADDR_MASK) >> MICR_EADDR_SHIFT) << 0) | \
- (((CFG_BANK1_END & MICR_EADDR_MASK) >> MICR_EADDR_SHIFT) << 8) | \
- (((CFG_BANK2_END & MICR_EADDR_MASK) >> MICR_EADDR_SHIFT) << 16) | \
- (((CFG_BANK3_END & MICR_EADDR_MASK) >> MICR_EADDR_SHIFT) << 24)
+ .long (((CONFIG_SYS_BANK0_END & MICR_EADDR_MASK) >> MICR_EADDR_SHIFT) << 0) | \
+ (((CONFIG_SYS_BANK1_END & MICR_EADDR_MASK) >> MICR_EADDR_SHIFT) << 8) | \
+ (((CONFIG_SYS_BANK2_END & MICR_EADDR_MASK) >> MICR_EADDR_SHIFT) << 16) | \
+ (((CONFIG_SYS_BANK3_END & MICR_EADDR_MASK) >> MICR_EADDR_SHIFT) << 24)
.long MEAR2
- .long (((CFG_BANK4_END & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT) << 0) | \
- (((CFG_BANK5_END & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT) << 8) | \
- (((CFG_BANK6_END & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT) << 16) | \
- (((CFG_BANK7_END & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT) << 24)
+ .long (((CONFIG_SYS_BANK4_END & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT) << 0) | \
+ (((CONFIG_SYS_BANK5_END & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT) << 8) | \
+ (((CONFIG_SYS_BANK6_END & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT) << 16) | \
+ (((CONFIG_SYS_BANK7_END & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT) << 24)
.long EMEAR2
- .long (((CFG_BANK4_END & MICR_EADDR_MASK) >> MICR_EADDR_SHIFT) << 0) | \
- (((CFG_BANK5_END & MICR_EADDR_MASK) >> MICR_EADDR_SHIFT) << 8) | \
- (((CFG_BANK6_END & MICR_EADDR_MASK) >> MICR_EADDR_SHIFT) << 16) | \
- (((CFG_BANK7_END & MICR_EADDR_MASK) >> MICR_EADDR_SHIFT) << 24)
+ .long (((CONFIG_SYS_BANK4_END & MICR_EADDR_MASK) >> MICR_EADDR_SHIFT) << 0) | \
+ (((CONFIG_SYS_BANK5_END & MICR_EADDR_MASK) >> MICR_EADDR_SHIFT) << 8) | \
+ (((CONFIG_SYS_BANK6_END & MICR_EADDR_MASK) >> MICR_EADDR_SHIFT) << 16) | \
+ (((CONFIG_SYS_BANK7_END & MICR_EADDR_MASK) >> MICR_EADDR_SHIFT) << 24)
.long 0
@@ -123,7 +123,7 @@ loop: lwz r1, 4(r5)
/* set bank enable bits */
lis r0, MBER@h
ori r0, 0, MBER@l
- li r1, CFG_BANK_ENABLE
+ li r1, CONFIG_SYS_BANK_ENABLE
stwbrx r0, 0, r3
eieio
stb r1, 0(r4)
@@ -145,8 +145,8 @@ delay: bdnz delay
eieio
/* set up stack pointer */
- lis r1, CFG_INIT_SP_OFFSET@h
- ori r1, r1, CFG_INIT_SP_OFFSET@l
+ lis r1, CONFIG_SYS_INIT_SP_OFFSET@h
+ ori r1, r1, CONFIG_SYS_INIT_SP_OFFSET@l
mtlr r10
blr
diff --git a/board/sandpoint/flash.c b/board/sandpoint/flash.c
index a9f73ff..e366cc6 100644
--- a/board/sandpoint/flash.c
+++ b/board/sandpoint/flash.c
@@ -30,17 +30,17 @@
#define ROM_CS0_START 0xFF800000
#define ROM_CS1_START 0xFF000000
-flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */
+flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS]; /* info for FLASH chips */
-#if defined(CFG_ENV_IS_IN_FLASH)
-# ifndef CFG_ENV_ADDR
-# define CFG_ENV_ADDR (CFG_FLASH_BASE + CFG_ENV_OFFSET)
+#if defined(CONFIG_ENV_IS_IN_FLASH)
+# ifndef CONFIG_ENV_ADDR
+# define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + CONFIG_ENV_OFFSET)
# endif
-# ifndef CFG_ENV_SIZE
-# define CFG_ENV_SIZE CFG_ENV_SECT_SIZE
+# ifndef CONFIG_ENV_SIZE
+# define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE
# endif
-# ifndef CFG_ENV_SECT_SIZE
-# define CFG_ENV_SECT_SIZE CFG_ENV_SIZE
+# ifndef CONFIG_ENV_SECT_SIZE
+# define CONFIG_ENV_SECT_SIZE CONFIG_ENV_SIZE
# endif
#endif
@@ -140,10 +140,10 @@ flash_init(void)
{
unsigned long i;
unsigned char j;
- static const ulong flash_banks[] = CFG_FLASH_BANKS;
+ static const ulong flash_banks[] = CONFIG_SYS_FLASH_BANKS;
/* Init: no FLASHes known */
- for (i = 0; i < CFG_MAX_FLASH_BANKS; i++)
+ for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; i++)
{
flash_info_t * const pflinfo = &flash_info[i];
pflinfo->flash_id = FLASH_UNKNOWN;
@@ -154,9 +154,9 @@ flash_init(void)
/* Enable writes to Sandpoint flash */
{
register unsigned char temp;
- CONFIG_READ_BYTE(CFG_WINBOND_ISA_CFG_ADDR + WINBOND_CSCR, temp);
+ CONFIG_READ_BYTE(CONFIG_SYS_WINBOND_ISA_CFG_ADDR + WINBOND_CSCR, temp);
temp &= ~0x20; /* clear BIOSWP bit */
- CONFIG_WRITE_BYTE(CFG_WINBOND_ISA_CFG_ADDR + WINBOND_CSCR, temp);
+ CONFIG_WRITE_BYTE(CONFIG_SYS_WINBOND_ISA_CFG_ADDR + WINBOND_CSCR, temp);
}
for(i = 0; i < sizeof flash_banks / sizeof flash_banks[0]; i++)
@@ -223,17 +223,17 @@ flash_init(void)
}
/* Protect monitor and environment sectors
*/
-#if CFG_MONITOR_BASE >= CFG_FLASH_BASE
+#if CONFIG_SYS_MONITOR_BASE >= CONFIG_SYS_FLASH_BASE
flash_protect(FLAG_PROTECT_SET,
- CFG_MONITOR_BASE,
- CFG_MONITOR_BASE + monitor_flash_len - 1,
+ CONFIG_SYS_MONITOR_BASE,
+ CONFIG_SYS_MONITOR_BASE + monitor_flash_len - 1,
&flash_info[0]);
#endif
-#if (CFG_ENV_IS_IN_FLASH == 1) && defined(CFG_ENV_ADDR)
+#if defined(CONFIG_ENV_IS_IN_FLASH) && defined(CONFIG_ENV_ADDR)
flash_protect(FLAG_PROTECT_SET,
- CFG_ENV_ADDR,
- CFG_ENV_ADDR + CFG_ENV_SIZE - 1,
+ CONFIG_ENV_ADDR,
+ CONFIG_ENV_ADDR + CONFIG_ENV_SIZE - 1,
&flash_info[0]);
#endif
@@ -612,7 +612,7 @@ flash_erase(flash_info_t *info, int s_first, int s_last)
addr = (FLASH_WORD_SIZE *)(info->start[0] + (
(info->start[l_sect] - info->start[0]) << sh8b));
while ((addr[0] & (FLASH_WORD_SIZE)0x00800080) != (FLASH_WORD_SIZE)0x00800080) {
- if ((now = get_timer(start)) > CFG_FLASH_ERASE_TOUT) {
+ if ((now = get_timer(start)) > CONFIG_SYS_FLASH_ERASE_TOUT) {
printf ("Timeout\n");
return 1;
}
@@ -751,7 +751,7 @@ static int write_word (flash_info_t *info, ulong dest, ulong data)
start = get_timer (0);
while ((dest2[i << sh8b] & (FLASH_WORD_SIZE)0x00800080) !=
(data2[i] & (FLASH_WORD_SIZE)0x00800080)) {
- if (get_timer(start) > CFG_FLASH_WRITE_TOUT) {
+ if (get_timer(start) > CONFIG_SYS_FLASH_WRITE_TOUT) {
return (1);
}
}
diff --git a/board/sandpoint/sandpoint.c b/board/sandpoint/sandpoint.c
index 7429647..bb01d73 100644
--- a/board/sandpoint/sandpoint.c
+++ b/board/sandpoint/sandpoint.c
@@ -24,6 +24,7 @@
#include <common.h>
#include <mpc824x.h>
#include <pci.h>
+#include <netdev.h>
int checkboard (void)
{
@@ -57,7 +58,7 @@ phys_size_t initdram (int board_type)
long mear1;
long emear1;
- size = get_ram_size(CFG_SDRAM_BASE, CFG_MAX_RAM_SIZE);
+ size = get_ram_size(CONFIG_SYS_SDRAM_BASE, CONFIG_SYS_MAX_RAM_SIZE);
new_bank0_end = size - 1;
mear1 = mpc824x_mpc107_getreg(MEAR1);
@@ -99,3 +100,8 @@ void pci_init_board(void)
{
pci_mpc824x_init(&hose);
}
+
+int board_eth_init(bd_t *bis)
+{
+ return pci_eth_init(bis);
+}
generated by cgit v1.1 at 2024-11-22 20:37:08 +0000