summaryrefslogtreecommitdiff
path: root/board/rockchip/evb_rk3036
diff options
context:
space:
mode:
Diffstat (limited to 'board/rockchip/evb_rk3036')
-rw-r--r--board/rockchip/evb_rk3036/Kconfig15
-rw-r--r--board/rockchip/evb_rk3036/MAINTAINERS6
-rw-r--r--board/rockchip/evb_rk3036/Makefile7
-rw-r--r--board/rockchip/evb_rk3036/evb_rk3036.c49
4 files changed, 77 insertions, 0 deletions
diff --git a/board/rockchip/evb_rk3036/Kconfig b/board/rockchip/evb_rk3036/Kconfig
new file mode 100644
index 0000000..ef45f62
--- /dev/null
+++ b/board/rockchip/evb_rk3036/Kconfig
@@ -0,0 +1,15 @@
+if TARGET_EVB_RK3036
+
+config SYS_BOARD
+ default "evb_rk3036"
+
+config SYS_VENDOR
+ default "rockchip"
+
+config SYS_CONFIG_NAME
+ default "evb_rk3036"
+
+config BOARD_SPECIFIC_OPTIONS # dummy
+ def_bool y
+
+endif
diff --git a/board/rockchip/evb_rk3036/MAINTAINERS b/board/rockchip/evb_rk3036/MAINTAINERS
new file mode 100644
index 0000000..152d31c
--- /dev/null
+++ b/board/rockchip/evb_rk3036/MAINTAINERS
@@ -0,0 +1,6 @@
+EVB-RK3036
+M: huang lin <hl@rock-chips.com>
+S: Maintained
+F: board/evb/evb-rk3036
+F: include/configs/evb-rk3036.h
+F: configs/evb-rk3036_defconfig
diff --git a/board/rockchip/evb_rk3036/Makefile b/board/rockchip/evb_rk3036/Makefile
new file mode 100644
index 0000000..0403836
--- /dev/null
+++ b/board/rockchip/evb_rk3036/Makefile
@@ -0,0 +1,7 @@
+#
+# (C) Copyright 2015 Google, Inc
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+obj-y += evb_rk3036.o
diff --git a/board/rockchip/evb_rk3036/evb_rk3036.c b/board/rockchip/evb_rk3036/evb_rk3036.c
new file mode 100644
index 0000000..f5758b1
--- /dev/null
+++ b/board/rockchip/evb_rk3036/evb_rk3036.c
@@ -0,0 +1,49 @@
+/*
+ * (C) Copyright 2015 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <asm/io.h>
+#include <asm/arch/uart.h>
+#include <asm/arch/sdram_rk3036.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+void get_ddr_config(struct rk3036_ddr_config *config)
+{
+ /* K4B4G1646Q config */
+ config->ddr_type = 3;
+ config->rank = 2;
+ config->cs0_row = 15;
+ config->cs1_row = 15;
+
+ /* 8bank */
+ config->bank = 3;
+ config->col = 10;
+
+ /* 16bit bw */
+ config->bw = 1;
+}
+
+int board_init(void)
+{
+ return 0;
+}
+
+int dram_init(void)
+{
+ gd->ram_size = sdram_size();
+
+ return 0;
+}
+
+#ifndef CONFIG_SYS_DCACHE_OFF
+void enable_caches(void)
+{
+ /* Enable D-cache. I-cache is already enabled in start.S */
+ dcache_enable();
+}
+#endif