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-rw-r--r--board/renesas/ap325rxa/ap325rxa.c10
-rw-r--r--board/renesas/rsk7203/rsk7203.c17
2 files changed, 24 insertions, 3 deletions
diff --git a/board/renesas/ap325rxa/ap325rxa.c b/board/renesas/ap325rxa/ap325rxa.c
index 9f1112a..be919f5 100644
--- a/board/renesas/ap325rxa/ap325rxa.c
+++ b/board/renesas/ap325rxa/ap325rxa.c
@@ -19,6 +19,7 @@
*/
#include <common.h>
+#include <netdev.h>
#include <asm/io.h>
#include <asm/processor.h>
@@ -160,3 +161,12 @@ void ide_set_reset(int idereset)
udelay(FPGA_NAND_RST_WAIT);
outw(FPGA_NAND_INIT, FPGA_NAND_CTL);
}
+
+int board_eth_init(bd_t *bis)
+{
+ int rc = 0;
+#ifdef CONFIG_SMC911X
+ rc = smc911x_initialize(0, CONFIG_SMC911X_BASE);
+#endif
+ return rc;
+}
diff --git a/board/renesas/rsk7203/rsk7203.c b/board/renesas/rsk7203/rsk7203.c
index 2cbd45e..2b85799 100644
--- a/board/renesas/rsk7203/rsk7203.c
+++ b/board/renesas/rsk7203/rsk7203.c
@@ -21,6 +21,7 @@
*/
#include <common.h>
+#include <netdev.h>
#include <asm/io.h>
#include <asm/processor.h>
@@ -57,15 +58,25 @@ void led_set_state(unsigned short value)
* And this has problem by FIFO access only. pkt_data_pull/pkt_data_push
* functions necessary to solve this problem.
*/
-u32 pkt_data_pull(u32 addr)
+u32 pkt_data_pull(struct eth_device *dev, u32 addr)
{
- volatile u16 *addr_16 = (u16 *)addr;
+ volatile u16 *addr_16 = (u16 *)(dev->iobase + addr);
return (u32)((swab16(*addr_16) << 16) & 0xFFFF0000)\
| swab16(*(addr_16 + 1));
}
-void pkt_data_push(u32 addr, u32 val)
+void pkt_data_push(struct eth_device *dev, u32 addr, u32 val)
{
+ addr += dev->iobase;
*(volatile u16 *)(addr + 2) = swab16((u16)val);
*(volatile u16 *)(addr) = swab16((u16)(val >> 16));
}
+
+int board_eth_init(bd_t *bis)
+{
+ int rc = 0;
+#ifdef CONFIG_SMC911X
+ rc = smc911x_initialize(0, CONFIG_SMC911X_BASE);
+#endif
+ return rc;
+}