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-rw-r--r--board/renesas/sh7785lcr/config.mk4
-rw-r--r--board/renesas/sh7785lcr/lowlevel_init.S94
-rw-r--r--board/renesas/sh7785lcr/sh7785lcr.c32
-rw-r--r--board/renesas/sh7785lcr/u-boot.lds4
-rw-r--r--board/renesas/sh7785lcr/u-boot_29bit96
-rw-r--r--board/renesas/sh7785lcr/u-boot_32bit96
6 files changed, 324 insertions, 2 deletions
diff --git a/board/renesas/sh7785lcr/config.mk b/board/renesas/sh7785lcr/config.mk
index 20807df..66d35cb 100644
--- a/board/renesas/sh7785lcr/config.mk
+++ b/board/renesas/sh7785lcr/config.mk
@@ -22,4 +22,8 @@
#
# NOTE: Must match value used in u-boot.lds (in this directory).
#
+sinclude $(OBJTREE)/board/$(BOARDDIR)/config.tmp
+
+ifndef TEXT_BASE
TEXT_BASE = 0x0ff80000
+endif
diff --git a/board/renesas/sh7785lcr/lowlevel_init.S b/board/renesas/sh7785lcr/lowlevel_init.S
index f5ebeb9..97920df 100644
--- a/board/renesas/sh7785lcr/lowlevel_init.S
+++ b/board/renesas/sh7785lcr/lowlevel_init.S
@@ -130,6 +130,46 @@ lbsc_29bit:
write32 CS6WCR_A, CS_SD_WCR_D
lbsc_end:
+#if defined(CONFIG_SH_32BIT)
+ /*------- set PMB -------*/
+ write32 PASCR_A, PASCR_29BIT_D
+ write32 MMUCR_A, MMUCR_D
+
+ /*****************************************************************
+ * ent virt phys v sz c wt
+ * 0 0xa0000000 0x00000000 1 64M 0 0
+ * 1 0xa4000000 0x04000000 1 16M 0 0
+ * 2 0xa6000000 0x08000000 1 16M 0 0
+ * 9 0x88000000 0x48000000 1 128M 1 1
+ * 10 0x90000000 0x50000000 1 128M 1 1
+ * 11 0x98000000 0x58000000 1 128M 1 1
+ * 13 0xa8000000 0x48000000 1 128M 0 0
+ * 14 0xb0000000 0x50000000 1 128M 0 0
+ * 15 0xb8000000 0x58000000 1 128M 0 0
+ */
+ write32 PMB_ADDR_FLASH_A, PMB_ADDR_FLASH_D
+ write32 PMB_DATA_FLASH_A, PMB_DATA_FLASH_D
+ write32 PMB_ADDR_CPLD_A, PMB_ADDR_CPLD_D
+ write32 PMB_DATA_CPLD_A, PMB_DATA_CPLD_D
+ write32 PMB_ADDR_USB_A, PMB_ADDR_USB_D
+ write32 PMB_DATA_USB_A, PMB_DATA_USB_D
+ write32 PMB_ADDR_DDR_C1_A, PMB_ADDR_DDR_C1_D
+ write32 PMB_DATA_DDR_C1_A, PMB_DATA_DDR_C1_D
+ write32 PMB_ADDR_DDR_C2_A, PMB_ADDR_DDR_C2_D
+ write32 PMB_DATA_DDR_C2_A, PMB_DATA_DDR_C2_D
+ write32 PMB_ADDR_DDR_C3_A, PMB_ADDR_DDR_C3_D
+ write32 PMB_DATA_DDR_C3_A, PMB_DATA_DDR_C3_D
+ write32 PMB_ADDR_DDR_N1_A, PMB_ADDR_DDR_N1_D
+ write32 PMB_DATA_DDR_N1_A, PMB_DATA_DDR_N1_D
+ write32 PMB_ADDR_DDR_N2_A, PMB_ADDR_DDR_N2_D
+ write32 PMB_DATA_DDR_N2_A, PMB_DATA_DDR_N2_D
+ write32 PMB_ADDR_DDR_N3_A, PMB_ADDR_DDR_N3_D
+ write32 PMB_DATA_DDR_N3_A, PMB_DATA_DDR_N3_D
+
+ write32 PASCR_A, PASCR_INIT
+ mov.l DUMMY_ADDR, r0
+ icbi @r0
+#endif
write32 CCR_A, CCR_D
@@ -140,7 +180,11 @@ lbsc_end:
/*------- LBSC -------*/
MMSELR_A: .long 0xfc400020
+#if defined(CONFIG_SH_32BIT)
+MMSELR_D: .long 0xa5a50005
+#else
MMSELR_D: .long 0xa5a50002
+#endif
/*------- DBSC2 -------*/
#define DBSC2_BASE 0xfe800000
@@ -287,5 +331,55 @@ CS_SD_WCR_D: .long 0x00030108
CS_I2C_BCR_D: .long 0x11111100
CS_I2C_WCR_D: .long 0x00000003
+#if defined(CONFIG_SH_32BIT)
+/*------- set PMB -------*/
+PMB_ADDR_FLASH_A: .long PMB_ADDR_BASE(0)
+PMB_ADDR_CPLD_A: .long PMB_ADDR_BASE(1)
+PMB_ADDR_USB_A: .long PMB_ADDR_BASE(2)
+PMB_ADDR_DDR_C1_A: .long PMB_ADDR_BASE(9)
+PMB_ADDR_DDR_C2_A: .long PMB_ADDR_BASE(10)
+PMB_ADDR_DDR_C3_A: .long PMB_ADDR_BASE(11)
+PMB_ADDR_DDR_N1_A: .long PMB_ADDR_BASE(13)
+PMB_ADDR_DDR_N2_A: .long PMB_ADDR_BASE(14)
+PMB_ADDR_DDR_N3_A: .long PMB_ADDR_BASE(15)
+
+PMB_ADDR_FLASH_D: .long mk_pmb_addr_val(0xa0)
+PMB_ADDR_CPLD_D: .long mk_pmb_addr_val(0xa4)
+PMB_ADDR_USB_D: .long mk_pmb_addr_val(0xa6)
+PMB_ADDR_DDR_C1_D: .long mk_pmb_addr_val(0x88)
+PMB_ADDR_DDR_C2_D: .long mk_pmb_addr_val(0x90)
+PMB_ADDR_DDR_C3_D: .long mk_pmb_addr_val(0x98)
+PMB_ADDR_DDR_N1_D: .long mk_pmb_addr_val(0xa8)
+PMB_ADDR_DDR_N2_D: .long mk_pmb_addr_val(0xb0)
+PMB_ADDR_DDR_N3_D: .long mk_pmb_addr_val(0xb8)
+
+PMB_DATA_FLASH_A: .long PMB_DATA_BASE(0)
+PMB_DATA_CPLD_A: .long PMB_DATA_BASE(1)
+PMB_DATA_USB_A: .long PMB_DATA_BASE(2)
+PMB_DATA_DDR_C1_A: .long PMB_DATA_BASE(9)
+PMB_DATA_DDR_C2_A: .long PMB_DATA_BASE(10)
+PMB_DATA_DDR_C3_A: .long PMB_DATA_BASE(11)
+PMB_DATA_DDR_N1_A: .long PMB_DATA_BASE(13)
+PMB_DATA_DDR_N2_A: .long PMB_DATA_BASE(14)
+PMB_DATA_DDR_N3_A: .long PMB_DATA_BASE(15)
+
+/* ppn ub v s1 s0 c wt */
+PMB_DATA_FLASH_D: .long mk_pmb_data_val(0x00, 1, 1, 0, 1, 0, 1)
+PMB_DATA_CPLD_D: .long mk_pmb_data_val(0x04, 1, 1, 0, 0, 0, 1)
+PMB_DATA_USB_D: .long mk_pmb_data_val(0x08, 1, 1, 0, 0, 0, 1)
+PMB_DATA_DDR_C1_D: .long mk_pmb_data_val(0x48, 0, 1, 1, 0, 1, 1)
+PMB_DATA_DDR_C2_D: .long mk_pmb_data_val(0x50, 0, 1, 1, 0, 1, 1)
+PMB_DATA_DDR_C3_D: .long mk_pmb_data_val(0x58, 0, 1, 1, 0, 1, 1)
+PMB_DATA_DDR_N1_D: .long mk_pmb_data_val(0x48, 1, 1, 1, 0, 0, 1)
+PMB_DATA_DDR_N2_D: .long mk_pmb_data_val(0x50, 1, 1, 1, 0, 0, 1)
+PMB_DATA_DDR_N3_D: .long mk_pmb_data_val(0x58, 1, 1, 1, 0, 0, 1)
+
+DUMMY_ADDR: .long 0xa0000000
+PASCR_29BIT_D: .long 0x00000000
+PASCR_INIT: .long 0x80000080 /* check booting mode */
+MMUCR_A: .long 0xff000010
+MMUCR_D: .long 0x00000004 /* clear ITLB */
+#endif /* CONFIG_SH_32BIT */
+
CCR_A: .long 0xff00001c
CCR_D: .long 0x0000090b
diff --git a/board/renesas/sh7785lcr/sh7785lcr.c b/board/renesas/sh7785lcr/sh7785lcr.c
index 786c758..1d81688 100644
--- a/board/renesas/sh7785lcr/sh7785lcr.c
+++ b/board/renesas/sh7785lcr/sh7785lcr.c
@@ -54,3 +54,35 @@ int board_eth_init(bd_t *bis)
{
return pci_eth_init(bis);
}
+
+#if defined(CONFIG_SH_32BIT)
+int do_pmb(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+{
+ /* clear ITLB */
+ writel(0x00000004, 0xff000010);
+
+ /* delete PMB for peripheral */
+ writel(0, PMB_ADDR_BASE(0));
+ writel(0, PMB_DATA_BASE(0));
+ writel(0, PMB_ADDR_BASE(1));
+ writel(0, PMB_DATA_BASE(1));
+ writel(0, PMB_ADDR_BASE(2));
+ writel(0, PMB_DATA_BASE(2));
+
+ /* add PMB for SDRAM(0x40000000 - 0x47ffffff) */
+ writel(mk_pmb_addr_val(0x80), PMB_ADDR_BASE(8));
+ writel(mk_pmb_data_val(0x40, 0, 1, 1, 0, 1, 1), PMB_DATA_BASE(8));
+ writel(mk_pmb_addr_val(0xa0), PMB_ADDR_BASE(12));
+ writel(mk_pmb_data_val(0x40, 1, 1, 1, 0, 0, 1), PMB_DATA_BASE(12));
+
+ return 0;
+}
+
+U_BOOT_CMD(
+ pmb, 1, 1, do_pmb,
+ "pmb - PMB setting\n",
+ "\n"
+ " - PMB setting for all SDRAM mapping\n"
+);
+#endif
+
diff --git a/board/renesas/sh7785lcr/u-boot.lds b/board/renesas/sh7785lcr/u-boot.lds
index 231769f..446fb93 100644
--- a/board/renesas/sh7785lcr/u-boot.lds
+++ b/board/renesas/sh7785lcr/u-boot.lds
@@ -1,7 +1,7 @@
/*
* Copyrigth (c) 2007
* Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
- * Copyrigth (c) 2008 Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com>
+ * Copyrigth (c) 2008-2009 Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com>
*
* See file CREDITS for list of people who contributed to this
* project.
@@ -28,7 +28,7 @@ ENTRY(_start)
SECTIONS
{
- . = 0x08000000 + (128 * 1024 * 1024) - (512 * 1024);
+ . = 0x88000000 + (128 * 1024 * 1024) - (512 * 1024);
PROVIDE (reloc_dst = .);
diff --git a/board/renesas/sh7785lcr/u-boot_29bit b/board/renesas/sh7785lcr/u-boot_29bit
new file mode 100644
index 0000000..231769f
--- /dev/null
+++ b/board/renesas/sh7785lcr/u-boot_29bit
@@ -0,0 +1,96 @@
+/*
+ * Copyrigth (c) 2007
+ * Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
+ * Copyrigth (c) 2008 Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+OUTPUT_FORMAT("elf32-sh-linux", "elf32-sh-linux", "elf32-sh-linux")
+OUTPUT_ARCH(sh)
+ENTRY(_start)
+
+SECTIONS
+{
+ . = 0x08000000 + (128 * 1024 * 1024) - (512 * 1024);
+
+ PROVIDE (reloc_dst = .);
+
+ PROVIDE (_ftext = .);
+ PROVIDE (_fcode = .);
+ PROVIDE (_start = .);
+
+ .text :
+ {
+ cpu/sh4/start.o (.text)
+ . = ALIGN(8192);
+ common/env_embedded.o (.ppcenv)
+ . = ALIGN(8192);
+ common/env_embedded.o (.ppcenvr)
+ . = ALIGN(8192);
+ *(.text)
+ . = ALIGN(4);
+ } =0xFF
+ PROVIDE (_ecode = .);
+ .rodata :
+ {
+ *(.rodata)
+ . = ALIGN(4);
+ }
+ PROVIDE (_etext = .);
+
+
+ PROVIDE (_fdata = .);
+ .data :
+ {
+ *(.data)
+ . = ALIGN(4);
+ }
+ PROVIDE (_edata = .);
+
+ PROVIDE (_fgot = .);
+ .got :
+ {
+ *(.got)
+ . = ALIGN(4);
+ }
+ PROVIDE (_egot = .);
+
+ PROVIDE (__u_boot_cmd_start = .);
+ .u_boot_cmd :
+ {
+ *(.u_boot_cmd)
+ . = ALIGN(4);
+ }
+ PROVIDE (__u_boot_cmd_end = .);
+
+ PROVIDE (reloc_dst_end = .);
+ /* _reloc_dst_end = .; */
+
+ PROVIDE (bss_start = .);
+ PROVIDE (__bss_start = .);
+ .bss :
+ {
+ *(.bss)
+ . = ALIGN(4);
+ }
+ PROVIDE (bss_end = .);
+
+ PROVIDE (_end = .);
+}
diff --git a/board/renesas/sh7785lcr/u-boot_32bit b/board/renesas/sh7785lcr/u-boot_32bit
new file mode 100644
index 0000000..446fb93
--- /dev/null
+++ b/board/renesas/sh7785lcr/u-boot_32bit
@@ -0,0 +1,96 @@
+/*
+ * Copyrigth (c) 2007
+ * Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
+ * Copyrigth (c) 2008-2009 Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+OUTPUT_FORMAT("elf32-sh-linux", "elf32-sh-linux", "elf32-sh-linux")
+OUTPUT_ARCH(sh)
+ENTRY(_start)
+
+SECTIONS
+{
+ . = 0x88000000 + (128 * 1024 * 1024) - (512 * 1024);
+
+ PROVIDE (reloc_dst = .);
+
+ PROVIDE (_ftext = .);
+ PROVIDE (_fcode = .);
+ PROVIDE (_start = .);
+
+ .text :
+ {
+ cpu/sh4/start.o (.text)
+ . = ALIGN(8192);
+ common/env_embedded.o (.ppcenv)
+ . = ALIGN(8192);
+ common/env_embedded.o (.ppcenvr)
+ . = ALIGN(8192);
+ *(.text)
+ . = ALIGN(4);
+ } =0xFF
+ PROVIDE (_ecode = .);
+ .rodata :
+ {
+ *(.rodata)
+ . = ALIGN(4);
+ }
+ PROVIDE (_etext = .);
+
+
+ PROVIDE (_fdata = .);
+ .data :
+ {
+ *(.data)
+ . = ALIGN(4);
+ }
+ PROVIDE (_edata = .);
+
+ PROVIDE (_fgot = .);
+ .got :
+ {
+ *(.got)
+ . = ALIGN(4);
+ }
+ PROVIDE (_egot = .);
+
+ PROVIDE (__u_boot_cmd_start = .);
+ .u_boot_cmd :
+ {
+ *(.u_boot_cmd)
+ . = ALIGN(4);
+ }
+ PROVIDE (__u_boot_cmd_end = .);
+
+ PROVIDE (reloc_dst_end = .);
+ /* _reloc_dst_end = .; */
+
+ PROVIDE (bss_start = .);
+ PROVIDE (__bss_start = .);
+ .bss :
+ {
+ *(.bss)
+ . = ALIGN(4);
+ }
+ PROVIDE (bss_end = .);
+
+ PROVIDE (_end = .);
+}
generated by cgit v1.1 at 2024-11-23 10:43:33 +0000