diff options
Diffstat (limited to 'board/prodrive/p3p440/p3p440.c')
| -rw-r--r-- | board/prodrive/p3p440/p3p440.c | 72 |
1 files changed, 1 insertions, 71 deletions
diff --git a/board/prodrive/p3p440/p3p440.c b/board/prodrive/p3p440/p3p440.c index 9a07852..020f66d 100644 --- a/board/prodrive/p3p440/p3p440.c +++ b/board/prodrive/p3p440/p3p440.c @@ -165,77 +165,7 @@ int misc_init_r (void) } /************************************************************************* - * pci_pre_init - * - * This routine is called just prior to registering the hose and gives - * the board the opportunity to check things. Returning a value of zero - * indicates that things are bad & PCI initialization should be aborted. - * - * Different boards may wish to customize the pci controller structure - * (add regions, override default access routines, etc) or perform - * certain pre-initialization actions. - * - ************************************************************************/ -#if defined(CONFIG_PCI) -int pci_pre_init(struct pci_controller *hose) -{ - unsigned long strap; - - /*--------------------------------------------------------------------------+ - * The P3P440 board is always configured as the host & requires the - * PCI arbiter to be disabled because it's an PMC module. - *--------------------------------------------------------------------------*/ - strap = mfdcr(CPC0_STRP1); - if (strap & 0x00100000) { - printf("PCI: CPC0_STRP1[PAE] set.\n"); - return 0; - } - - return 1; -} -#endif /* defined(CONFIG_PCI) */ - -/************************************************************************* - * pci_target_init - * - * The bootstrap configuration provides default settings for the pci - * inbound map (PIM). But the bootstrap config choices are limited and - * may not be sufficient for a given board. - * - ************************************************************************/ -#if defined(CONFIG_PCI) && defined(CONFIG_SYS_PCI_TARGET_INIT) -void pci_target_init(struct pci_controller *hose) -{ - /*--------------------------------------------------------------------------+ - * Disable everything - *--------------------------------------------------------------------------*/ - out32r(PCIL0_PIM0SA, 0); /* disable */ - out32r(PCIL0_PIM1SA, 0); /* disable */ - out32r(PCIL0_PIM2SA, 0); /* disable */ - out32r(PCIL0_EROMBA, 0); /* disable expansion rom */ - - /*--------------------------------------------------------------------------+ - * Map all of SDRAM to PCI address 0x0000_0000. Note that the 440 strapping - * options to not support sizes such as 128/256 MB. - *--------------------------------------------------------------------------*/ - out32r(PCIL0_PIM0LAL, CONFIG_SYS_SDRAM_BASE); - out32r(PCIL0_PIM0LAH, 0); - out32r(PCIL0_PIM0SA, ~(gd->ram_size - 1) | 1); - - out32r(PCIL0_BAR0, 0); - - /*--------------------------------------------------------------------------+ - * Program the board's subsystem id/vendor id - *--------------------------------------------------------------------------*/ - out16r(PCIL0_SBSYSVID, CONFIG_SYS_PCI_SUBSYS_VENDORID); - out16r(PCIL0_SBSYSID, CONFIG_SYS_PCI_SUBSYS_DEVICEID); - - out16r(PCIL0_CMD, in16r(PCIL0_CMD) | PCI_COMMAND_MEMORY); -} -#endif /* defined(CONFIG_PCI) && defined(CONFIG_SYS_PCI_TARGET_INIT) */ - -/************************************************************************* - * is_pci_host + * Override weak is_pci_host() * * This routine is called to determine if a pci scan should be * performed. With various hardware environments (especially cPCI and |