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-rw-r--r--board/pm828/flash.c28
-rw-r--r--board/pm828/pm828.c35
2 files changed, 34 insertions, 29 deletions
diff --git a/board/pm828/flash.c b/board/pm828/flash.c
index 1f21b3e..4958a95 100644
--- a/board/pm828/flash.c
+++ b/board/pm828/flash.c
@@ -28,7 +28,7 @@
#include <mpc8xx.h>
-flash_info_t flash_info[CFG_MAX_FLASH_BANKS];
+flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS];
/*-----------------------------------------------------------------------
*/
@@ -116,13 +116,13 @@ unsigned long flash_init (void)
/* Init: no FLASHes known
*/
- for (i = 0; i < CFG_MAX_FLASH_BANKS; ++i) {
+ for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; ++i) {
flash_info[i].flash_id = FLASH_UNKNOWN;
}
/* Static FLASH Bank configuration here (only one bank) */
- size_b0 = flash_get_size ((ulong *) CFG_FLASH0_BASE, &flash_info[0]);
+ size_b0 = flash_get_size ((ulong *) CONFIG_SYS_FLASH0_BASE, &flash_info[0]);
if (flash_info[0].flash_id == FLASH_UNKNOWN || size_b0 == 0) {
printf ("## Unknown FLASH on Bank 0 - Size = 0x%08lx = %ld MB\n",
size_b0, size_b0 >> 20);
@@ -132,25 +132,25 @@ unsigned long flash_init (void)
*/
#ifndef CONFIG_BOOT_ROM
- /* If U-Boot is booted from ROM the CFG_MONITOR_BASE > CFG_FLASH0_BASE
+ /* If U-Boot is booted from ROM the CONFIG_SYS_MONITOR_BASE > CONFIG_SYS_FLASH0_BASE
* but we shouldn't protect it.
*/
-# if CFG_MONITOR_BASE >= CFG_FLASH0_BASE
+# if CONFIG_SYS_MONITOR_BASE >= CONFIG_SYS_FLASH0_BASE
flash_protect (FLAG_PROTECT_SET,
- CFG_MONITOR_BASE,
- CFG_MONITOR_BASE + monitor_flash_len - 1, &flash_info[0]
+ CONFIG_SYS_MONITOR_BASE,
+ CONFIG_SYS_MONITOR_BASE + monitor_flash_len - 1, &flash_info[0]
);
# endif
#endif /* CONFIG_BOOT_ROM */
-#if (CFG_ENV_IS_IN_FLASH == 1) && defined(CFG_ENV_ADDR)
-# ifndef CFG_ENV_SIZE
-# define CFG_ENV_SIZE CFG_ENV_SECT_SIZE
+#if defined(CONFIG_ENV_IS_IN_FLASH) && defined(CONFIG_ENV_ADDR)
+# ifndef CONFIG_ENV_SIZE
+# define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE
# endif
flash_protect (FLAG_PROTECT_SET,
- CFG_ENV_ADDR,
- CFG_ENV_ADDR + CFG_ENV_SIZE - 1, &flash_info[0]);
+ CONFIG_ENV_ADDR,
+ CONFIG_ENV_ADDR + CONFIG_ENV_SIZE - 1, &flash_info[0]);
#endif
return (size_b0);
@@ -267,7 +267,7 @@ int flash_erase (flash_info_t * info, int s_first, int s_last)
last = start;
while ((addr[0] & 0x00800080) != 0x00800080 ||
(addr[1] & 0x00800080) != 0x00800080) {
- if ((now = get_timer (start)) > CFG_FLASH_ERASE_TOUT) {
+ if ((now = get_timer (start)) > CONFIG_SYS_FLASH_ERASE_TOUT) {
printf ("Timeout (erase suspended!)\n");
/* Suspend erase
*/
@@ -362,7 +362,7 @@ static int write_word (flash_info_t * info, volatile unsigned long *addr,
start = get_timer (0);
while ((*addr & 0x00800080) != 0x00800080) {
- if (get_timer (start) > CFG_FLASH_WRITE_TOUT) {
+ if (get_timer (start) > CONFIG_SYS_FLASH_WRITE_TOUT) {
/* Suspend program
*/
*addr = 0x00B000B0;
diff --git a/board/pm828/pm828.c b/board/pm828/pm828.c
index 6038e97..4a3b2fd 100644
--- a/board/pm828/pm828.c
+++ b/board/pm828/pm828.c
@@ -25,6 +25,7 @@
#include <ioports.h>
#include <mpc8260.h>
#include <pci.h>
+#include <netdev.h>
/*
* I/O Port configuration table
@@ -258,7 +259,7 @@ static long int try_init (volatile memctl8260_t * memctl, ulong sdmr,
* accessing the SDRAM with a single-byte transaction."
*
* The appropriate BRx/ORx registers have already been set when we
- * get here. The SDRAM can be accessed at the address CFG_SDRAM_BASE.
+ * get here. The SDRAM can be accessed at the address CONFIG_SYS_SDRAM_BASE.
*/
*sdmr_ptr = sdmr | PSDMR_OP_PREA;
@@ -269,7 +270,7 @@ static long int try_init (volatile memctl8260_t * memctl, ulong sdmr,
*base = c;
*sdmr_ptr = sdmr | PSDMR_OP_MRW;
- *(base + CFG_MRS_OFFS) = c; /* setting MR on address lines */
+ *(base + CONFIG_SYS_MRS_OFFS) = c; /* setting MR on address lines */
*sdmr_ptr = sdmr | PSDMR_OP_NORM | PSDMR_RFEN;
*base = c;
@@ -314,29 +315,29 @@ static long int try_init (volatile memctl8260_t * memctl, ulong sdmr,
phys_size_t initdram (int board_type)
{
- volatile immap_t *immap = (immap_t *) CFG_IMMR;
+ volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR;
volatile memctl8260_t *memctl = &immap->im_memctl;
-#ifndef CFG_RAMBOOT
+#ifndef CONFIG_SYS_RAMBOOT
ulong size8, size9;
#endif
ulong psize = 32 * 1024 * 1024;
- memctl->memc_psrt = CFG_PSRT;
- memctl->memc_mptpr = CFG_MPTPR;
+ memctl->memc_psrt = CONFIG_SYS_PSRT;
+ memctl->memc_mptpr = CONFIG_SYS_MPTPR;
-#ifndef CFG_RAMBOOT
- size8 = try_init (memctl, CFG_PSDMR_8COL, CFG_OR2_8COL,
- (uchar *) CFG_SDRAM_BASE);
- size9 = try_init (memctl, CFG_PSDMR_9COL, CFG_OR2_9COL,
- (uchar *) CFG_SDRAM_BASE);
+#ifndef CONFIG_SYS_RAMBOOT
+ size8 = try_init (memctl, CONFIG_SYS_PSDMR_8COL, CONFIG_SYS_OR2_8COL,
+ (uchar *) CONFIG_SYS_SDRAM_BASE);
+ size9 = try_init (memctl, CONFIG_SYS_PSDMR_9COL, CONFIG_SYS_OR2_9COL,
+ (uchar *) CONFIG_SYS_SDRAM_BASE);
if (size8 < size9) {
psize = size9;
printf ("(60x:9COL) ");
} else {
- psize = try_init (memctl, CFG_PSDMR_8COL, CFG_OR2_8COL,
- (uchar *) CFG_SDRAM_BASE);
+ psize = try_init (memctl, CONFIG_SYS_PSDMR_8COL, CONFIG_SYS_OR2_8COL,
+ (uchar *) CONFIG_SYS_SDRAM_BASE);
printf ("(60x:8COL) ");
}
#endif
@@ -344,10 +345,9 @@ phys_size_t initdram (int board_type)
}
#if defined(CONFIG_CMD_DOC)
-extern void doc_probe (ulong physadr);
void doc_init (void)
{
- doc_probe (CFG_DOC_BASE);
+ doc_probe (CONFIG_SYS_DOC_BASE);
}
#endif
@@ -361,3 +361,8 @@ void pci_init_board(void)
pci_mpc8250_init(&hose);
}
#endif
+
+int board_eth_init(bd_t *bis)
+{
+ return pci_eth_init(bis);
+}
generated by cgit v1.1 at 2024-12-17 04:21:13 +0000