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Diffstat (limited to 'board/nokia/rx51/rx51.c')
-rw-r--r--board/nokia/rx51/rx51.c52
1 files changed, 26 insertions, 26 deletions
diff --git a/board/nokia/rx51/rx51.c b/board/nokia/rx51/rx51.c
index 48eb65f..42bf8b6 100644
--- a/board/nokia/rx51/rx51.c
+++ b/board/nokia/rx51/rx51.c
@@ -332,10 +332,10 @@ void *video_hw_init(void)
static void twl4030_regulator_set_mode(u8 id, u8 mode)
{
u16 msg = MSG_SINGULAR(DEV_GRP_P1, id, mode);
- twl4030_i2c_write_u8(TWL4030_CHIP_PM_MASTER, msg >> 8,
- TWL4030_PM_MASTER_PB_WORD_MSB);
- twl4030_i2c_write_u8(TWL4030_CHIP_PM_MASTER, msg & 0xff,
- TWL4030_PM_MASTER_PB_WORD_LSB);
+ twl4030_i2c_write_u8(TWL4030_CHIP_PM_MASTER,
+ TWL4030_PM_MASTER_PB_WORD_MSB, msg >> 8);
+ twl4030_i2c_write_u8(TWL4030_CHIP_PM_MASTER,
+ TWL4030_PM_MASTER_PB_WORD_LSB, msg & 0xff);
}
static void omap3_emu_romcode_call(u32 service_id, u32 *parameters)
@@ -406,12 +406,12 @@ int misc_init_r(void)
TWL4030_PM_RECEIVER_DEV_GRP_P1);
/* store I2C access state */
- twl4030_i2c_read_u8(TWL4030_CHIP_PM_MASTER, &state,
- TWL4030_PM_MASTER_PB_CFG);
+ twl4030_i2c_read_u8(TWL4030_CHIP_PM_MASTER, TWL4030_PM_MASTER_PB_CFG,
+ &state);
/* enable I2C access to powerbus (needed for twl4030 regulator) */
- twl4030_i2c_write_u8(TWL4030_CHIP_PM_MASTER, 0x02,
- TWL4030_PM_MASTER_PB_CFG);
+ twl4030_i2c_write_u8(TWL4030_CHIP_PM_MASTER, TWL4030_PM_MASTER_PB_CFG,
+ 0x02);
/* set VAUX3, VSIM and VMMC1 state to active - enable eMMC memory */
twl4030_regulator_set_mode(RES_VAUX3, RES_STATE_ACTIVE);
@@ -419,8 +419,8 @@ int misc_init_r(void)
twl4030_regulator_set_mode(RES_VMMC1, RES_STATE_ACTIVE);
/* restore I2C access state */
- twl4030_i2c_write_u8(TWL4030_CHIP_PM_MASTER, state,
- TWL4030_PM_MASTER_PB_CFG);
+ twl4030_i2c_write_u8(TWL4030_CHIP_PM_MASTER, TWL4030_PM_MASTER_PB_CFG,
+ state);
/* set env variable attkernaddr for relocated kernel */
sprintf(buf, "%#x", KERNEL_ADDRESS);
@@ -475,14 +475,14 @@ void hw_watchdog_reset(void)
return;
/* read actual watchdog timeout */
- twl4030_i2c_read_u8(TWL4030_CHIP_PM_RECEIVER, &timeout,
- TWL4030_PM_RECEIVER_WATCHDOG_CFG);
+ twl4030_i2c_read_u8(TWL4030_CHIP_PM_RECEIVER,
+ TWL4030_PM_RECEIVER_WATCHDOG_CFG, &timeout);
/* timeout 0 means watchdog is disabled */
/* reset watchdog timeout to 31s (maximum) */
if (timeout != 0)
- twl4030_i2c_write_u8(TWL4030_CHIP_PM_RECEIVER, 31,
- TWL4030_PM_RECEIVER_WATCHDOG_CFG);
+ twl4030_i2c_write_u8(TWL4030_CHIP_PM_RECEIVER,
+ TWL4030_PM_RECEIVER_WATCHDOG_CFG, 31);
/* store last watchdog reset time */
twl_wd_time = get_timer(0);
@@ -531,8 +531,8 @@ int rx51_kp_init(void)
{
int ret = 0;
u8 ctrl;
- ret = twl4030_i2c_read_u8(TWL4030_CHIP_KEYPAD, &ctrl,
- TWL4030_KEYPAD_KEYP_CTRL_REG);
+ ret = twl4030_i2c_read_u8(TWL4030_CHIP_KEYPAD,
+ TWL4030_KEYPAD_KEYP_CTRL_REG, &ctrl);
if (ret)
return ret;
@@ -541,18 +541,18 @@ int rx51_kp_init(void)
ctrl |= TWL4030_KEYPAD_CTRL_KBD_ON;
ctrl |= TWL4030_KEYPAD_CTRL_SOFT_NRST;
ctrl |= TWL4030_KEYPAD_CTRL_SOFTMODEN;
- ret |= twl4030_i2c_write_u8(TWL4030_CHIP_KEYPAD, ctrl,
- TWL4030_KEYPAD_KEYP_CTRL_REG);
+ ret |= twl4030_i2c_write_u8(TWL4030_CHIP_KEYPAD,
+ TWL4030_KEYPAD_KEYP_CTRL_REG, ctrl);
/* enable key event status */
- ret |= twl4030_i2c_write_u8(TWL4030_CHIP_KEYPAD, 0xfe,
- TWL4030_KEYPAD_KEYP_IMR1);
+ ret |= twl4030_i2c_write_u8(TWL4030_CHIP_KEYPAD,
+ TWL4030_KEYPAD_KEYP_IMR1, 0xfe);
/* enable interrupt generation on rising and falling */
/* this is a workaround for qemu twl4030 emulation */
- ret |= twl4030_i2c_write_u8(TWL4030_CHIP_KEYPAD, 0x57,
- TWL4030_KEYPAD_KEYP_EDR);
+ ret |= twl4030_i2c_write_u8(TWL4030_CHIP_KEYPAD,
+ TWL4030_KEYPAD_KEYP_EDR, 0x57);
/* enable ISR clear on read */
- ret |= twl4030_i2c_write_u8(TWL4030_CHIP_KEYPAD, 0x05,
- TWL4030_KEYPAD_KEYP_SIH_CTRL);
+ ret |= twl4030_i2c_write_u8(TWL4030_CHIP_KEYPAD,
+ TWL4030_KEYPAD_KEYP_SIH_CTRL, 0x05);
return 0;
}
@@ -615,8 +615,8 @@ int rx51_kp_tstc(void)
for (i = 0; i < 2; i++) {
/* check interrupt register for events */
- twl4030_i2c_read_u8(TWL4030_CHIP_KEYPAD, &intr,
- TWL4030_KEYPAD_KEYP_ISR1+(2*i));
+ twl4030_i2c_read_u8(TWL4030_CHIP_KEYPAD,
+ TWL4030_KEYPAD_KEYP_ISR1 + (2 * i), &intr);
/* no event */
if (!(intr&1))