diff options
Diffstat (limited to 'board/netta2')
-rw-r--r-- | board/netta2/Makefile | 8 | ||||
-rw-r--r-- | board/netta2/flash.c | 490 | ||||
-rw-r--r-- | board/netta2/netta2.c | 624 | ||||
-rw-r--r-- | board/netta2/u-boot.lds | 82 | ||||
-rw-r--r-- | board/netta2/u-boot.lds.debug | 121 |
5 files changed, 0 insertions, 1325 deletions
diff --git a/board/netta2/Makefile b/board/netta2/Makefile deleted file mode 100644 index c3bfb0d..0000000 --- a/board/netta2/Makefile +++ /dev/null @@ -1,8 +0,0 @@ -# -# (C) Copyright 2000-2006 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# SPDX-License-Identifier: GPL-2.0+ -# - -obj-y = netta2.o flash.o diff --git a/board/netta2/flash.c b/board/netta2/flash.c deleted file mode 100644 index 133f36d..0000000 --- a/board/netta2/flash.c +++ /dev/null @@ -1,490 +0,0 @@ -/* - * (C) Copyright 2000-2004 - * Wolfgang Denk, DENX Software Engineering, wd@denx.de. - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#include <common.h> -#include <mpc8xx.h> - -flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS]; /* info for FLASH chips */ - -/*----------------------------------------------------------------------- - * Functions - */ -static ulong flash_get_size(vu_long * addr, flash_info_t * info); -static int write_byte(flash_info_t * info, ulong dest, uchar data); -static void flash_get_offsets(ulong base, flash_info_t * info); - -/*----------------------------------------------------------------------- - */ - -unsigned long flash_init(void) -{ - volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR; - volatile memctl8xx_t *memctl = &immap->im_memctl; - unsigned long size; - int i; - - /* Init: no FLASHes known */ - for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; ++i) - flash_info[i].flash_id = FLASH_UNKNOWN; - - size = flash_get_size((vu_long *) FLASH_BASE0_PRELIM, &flash_info[0]); - - if (flash_info[0].flash_id == FLASH_UNKNOWN) { - printf ("## Unknown FLASH on Bank 0 - Size = 0x%08lx = %ld MB\n", - size, size << 20); - } - - /* Remap FLASH according to real size */ - memctl->memc_or0 = CONFIG_SYS_OR_TIMING_FLASH | (-size & 0xFFFF8000); - memctl->memc_br0 = (CONFIG_SYS_FLASH_BASE & BR_BA_MSK) | (memctl->memc_br0 & ~(BR_BA_MSK)); - - /* Re-do sizing to get full correct info */ - size = flash_get_size((vu_long *) CONFIG_SYS_FLASH_BASE, &flash_info[0]); - - flash_get_offsets(CONFIG_SYS_FLASH_BASE, &flash_info[0]); - - /* monitor protection ON by default */ - flash_protect(FLAG_PROTECT_SET, - CONFIG_SYS_FLASH_BASE, CONFIG_SYS_FLASH_BASE + monitor_flash_len - 1, - &flash_info[0]); - - flash_protect ( FLAG_PROTECT_SET, - CONFIG_ENV_ADDR, - CONFIG_ENV_ADDR + CONFIG_ENV_SECT_SIZE - 1, - &flash_info[0]); - -#ifdef CONFIG_ENV_ADDR_REDUND - flash_protect ( FLAG_PROTECT_SET, - CONFIG_ENV_ADDR_REDUND, - CONFIG_ENV_ADDR_REDUND + CONFIG_ENV_SECT_SIZE - 1, - &flash_info[0]); -#endif - - flash_info[0].size = size; - - return (size); -} - -/*----------------------------------------------------------------------- - */ -static void flash_get_offsets(ulong base, flash_info_t * info) -{ - int i; - - /* set up sector start address table */ - if ((info->flash_id & FLASH_TYPEMASK) == FLASH_AM040) { - for (i = 0; i < info->sector_count; i++) { - info->start[i] = base + (i * 0x00010000); - } - } else if (info->flash_id & FLASH_BTYPE) { - /* set sector offsets for bottom boot block type */ - info->start[0] = base + 0x00000000; - info->start[1] = base + 0x00004000; - info->start[2] = base + 0x00006000; - info->start[3] = base + 0x00008000; - for (i = 4; i < info->sector_count; i++) { - info->start[i] = base + (i * 0x00010000) - 0x00030000; - } - } else { - /* set sector offsets for top boot block type */ - i = info->sector_count - 1; - info->start[i--] = base + info->size - 0x00004000; - info->start[i--] = base + info->size - 0x00006000; - info->start[i--] = base + info->size - 0x00008000; - for (; i >= 0; i--) { - info->start[i] = base + i * 0x00010000; - } - } -} - -/*----------------------------------------------------------------------- - */ -void flash_print_info(flash_info_t * info) -{ - int i; - - if (info->flash_id == FLASH_UNKNOWN) { - printf("missing or unknown FLASH type\n"); - return; - } - - switch (info->flash_id & FLASH_VENDMASK) { - case FLASH_MAN_AMD: - printf("AMD "); - break; - case FLASH_MAN_FUJ: - printf("FUJITSU "); - break; - case FLASH_MAN_MX: - printf("MXIC "); - break; - default: - printf("Unknown Vendor "); - break; - } - - switch (info->flash_id & FLASH_TYPEMASK) { - case FLASH_AM040: - printf("AM29LV040B (4 Mbit, bottom boot sect)\n"); - break; - case FLASH_AM400B: - printf("AM29LV400B (4 Mbit, bottom boot sect)\n"); - break; - case FLASH_AM400T: - printf("AM29LV400T (4 Mbit, top boot sector)\n"); - break; - case FLASH_AM800B: - printf("AM29LV800B (8 Mbit, bottom boot sect)\n"); - break; - case FLASH_AM800T: - printf("AM29LV800T (8 Mbit, top boot sector)\n"); - break; - case FLASH_AM160B: - printf("AM29LV160B (16 Mbit, bottom boot sect)\n"); - break; - case FLASH_AM160T: - printf("AM29LV160T (16 Mbit, top boot sector)\n"); - break; - case FLASH_AM320B: - printf("AM29LV320B (32 Mbit, bottom boot sect)\n"); - break; - case FLASH_AM320T: - printf("AM29LV320T (32 Mbit, top boot sector)\n"); - break; - default: - printf("Unknown Chip Type\n"); - break; - } - - printf(" Size: %ld MB in %d Sectors\n", info->size >> 20, info->sector_count); - - printf(" Sector Start Addresses:"); - for (i = 0; i < info->sector_count; ++i) { - if ((i % 5) == 0) - printf("\n "); - printf(" %08lX%s", info->start[i], info->protect[i] ? " (RO)" : " "); - } - printf("\n"); -} - -/*----------------------------------------------------------------------- - */ - - -/*----------------------------------------------------------------------- - */ - -/* - * The following code cannot be run from FLASH! - */ - -static ulong flash_get_size(vu_long * addr, flash_info_t * info) -{ - short i; - uchar mid; - uchar pid; - vu_char *caddr = (vu_char *) addr; - ulong base = (ulong) addr; - - /* Write auto select command: read Manufacturer ID */ - caddr[0x0555] = 0xAA; - caddr[0x02AA] = 0x55; - caddr[0x0555] = 0x90; - - mid = caddr[0]; - switch (mid) { - case (AMD_MANUFACT & 0xFF): - info->flash_id = FLASH_MAN_AMD; - break; - case (FUJ_MANUFACT & 0xFF): - info->flash_id = FLASH_MAN_FUJ; - break; - case (MX_MANUFACT & 0xFF): - info->flash_id = FLASH_MAN_MX; - break; - case (STM_MANUFACT & 0xFF): - info->flash_id = FLASH_MAN_STM; - break; - default: - info->flash_id = FLASH_UNKNOWN; - info->sector_count = 0; - info->size = 0; - return (0); /* no or unknown flash */ - } - - pid = caddr[1]; /* device ID */ - switch (pid) { - case (AMD_ID_LV400T & 0xFF): - info->flash_id += FLASH_AM400T; - info->sector_count = 11; - info->size = 0x00080000; - break; /* => 512 kB */ - - case (AMD_ID_LV400B & 0xFF): - info->flash_id += FLASH_AM400B; - info->sector_count = 11; - info->size = 0x00080000; - break; /* => 512 kB */ - - case (AMD_ID_LV800T & 0xFF): - info->flash_id += FLASH_AM800T; - info->sector_count = 19; - info->size = 0x00100000; - break; /* => 1 MB */ - - case (AMD_ID_LV800B & 0xFF): - info->flash_id += FLASH_AM800B; - info->sector_count = 19; - info->size = 0x00100000; - break; /* => 1 MB */ - - case (AMD_ID_LV160T & 0xFF): - info->flash_id += FLASH_AM160T; - info->sector_count = 35; - info->size = 0x00200000; - break; /* => 2 MB */ - - case (AMD_ID_LV160B & 0xFF): - info->flash_id += FLASH_AM160B; - info->sector_count = 35; - info->size = 0x00200000; - break; /* => 2 MB */ - - case (AMD_ID_LV040B & 0xFF): - info->flash_id += FLASH_AM040; - info->sector_count = 8; - info->size = 0x00080000; - break; - - case (STM_ID_M29W040B & 0xFF): - info->flash_id += FLASH_AM040; - info->sector_count = 8; - info->size = 0x00080000; - break; - -#if 0 /* enable when device IDs are available */ - case (AMD_ID_LV320T & 0xFF): - info->flash_id += FLASH_AM320T; - info->sector_count = 67; - info->size = 0x00400000; - break; /* => 4 MB */ - - case (AMD_ID_LV320B & 0xFF): - info->flash_id += FLASH_AM320B; - info->sector_count = 67; - info->size = 0x00400000; - break; /* => 4 MB */ -#endif - default: - info->flash_id = FLASH_UNKNOWN; - return (0); /* => no or unknown flash */ - - } - - printf(" "); - /* set up sector start address table */ - if ((info->flash_id & FLASH_TYPEMASK) == FLASH_AM040) { - for (i = 0; i < info->sector_count; i++) { - info->start[i] = base + (i * 0x00010000); - } - } else if (info->flash_id & FLASH_BTYPE) { - /* set sector offsets for bottom boot block type */ - info->start[0] = base + 0x00000000; - info->start[1] = base + 0x00004000; - info->start[2] = base + 0x00006000; - info->start[3] = base + 0x00008000; - for (i = 4; i < info->sector_count; i++) { - info->start[i] = base + (i * 0x00010000) - 0x00030000; - } - } else { - /* set sector offsets for top boot block type */ - i = info->sector_count - 1; - info->start[i--] = base + info->size - 0x00004000; - info->start[i--] = base + info->size - 0x00006000; - info->start[i--] = base + info->size - 0x00008000; - for (; i >= 0; i--) { - info->start[i] = base + i * 0x00010000; - } - } - - /* check for protected sectors */ - for (i = 0; i < info->sector_count; i++) { - /* read sector protection: D0 = 1 if protected */ - caddr = (volatile unsigned char *)(info->start[i]); - info->protect[i] = caddr[2] & 1; - } - - /* - * Prevent writes to uninitialized FLASH. - */ - if (info->flash_id != FLASH_UNKNOWN) { - caddr = (vu_char *) info->start[0]; - - caddr[0x0555] = 0xAA; - caddr[0x02AA] = 0x55; - caddr[0x0555] = 0xF0; - - udelay(20000); - } - - return (info->size); -} - - -/*----------------------------------------------------------------------- - */ - -int flash_erase(flash_info_t * info, int s_first, int s_last) -{ - vu_char *addr = (vu_char *) (info->start[0]); - int flag, prot, sect, l_sect; - ulong start, now, last; - - if ((s_first < 0) || (s_first > s_last)) { - if (info->flash_id == FLASH_UNKNOWN) { - printf("- missing\n"); - } else { - printf("- no sectors to erase\n"); - } - return 1; - } - - if ((info->flash_id == FLASH_UNKNOWN) || - (info->flash_id > FLASH_AMD_COMP)) { - printf("Can't erase unknown flash type %08lx - aborted\n", info->flash_id); - return 1; - } - - prot = 0; - for (sect = s_first; sect <= s_last; ++sect) { - if (info->protect[sect]) { - prot++; - } - } - - if (prot) { - printf("- Warning: %d protected sectors will not be erased!\n", prot); - } else { - printf("\n"); - } - - l_sect = -1; - - /* Disable interrupts which might cause a timeout here */ - flag = disable_interrupts(); - - addr[0x0555] = 0xAA; - addr[0x02AA] = 0x55; - addr[0x0555] = 0x80; - addr[0x0555] = 0xAA; - addr[0x02AA] = 0x55; - - /* Start erase on unprotected sectors */ - for (sect = s_first; sect <= s_last; sect++) { - if (info->protect[sect] == 0) { /* not protected */ - addr = (vu_char *) (info->start[sect]); - addr[0] = 0x30; - l_sect = sect; - } - } - - /* re-enable interrupts if necessary */ - if (flag) - enable_interrupts(); - - /* wait at least 80us - let's wait 1 ms */ - udelay(1000); - - /* - * We wait for the last triggered sector - */ - if (l_sect < 0) - goto DONE; - - start = get_timer(0); - last = start; - addr = (vu_char *) (info->start[l_sect]); - while ((addr[0] & 0x80) != 0x80) { - if ((now = get_timer(start)) > CONFIG_SYS_FLASH_ERASE_TOUT) { - printf("Timeout\n"); - return 1; - } - /* show that we're waiting */ - if ((now - last) > 1000) { /* every second */ - putc('.'); - last = now; - } - } - -DONE: - /* reset to read mode */ - addr = (vu_char *) info->start[0]; - addr[0] = 0xF0; /* reset bank */ - - printf(" done\n"); - return 0; -} - -/*----------------------------------------------------------------------- - * Copy memory to flash, returns: - * 0 - OK - * 1 - write timeout - * 2 - Flash not erased - */ - -int write_buff(flash_info_t * info, uchar * src, ulong addr, ulong cnt) -{ - int rc; - - while (cnt > 0) { - if ((rc = write_byte(info, addr++, *src++)) != 0) { - return (rc); - } - --cnt; - } - - return (0); -} - -/*----------------------------------------------------------------------- - * Write a word to Flash, returns: - * 0 - OK - * 1 - write timeout - * 2 - Flash not erased - */ -static int write_byte(flash_info_t * info, ulong dest, uchar data) -{ - vu_char *addr = (vu_char *) (info->start[0]); - ulong start; - int flag; - - /* Check if Flash is (sufficiently) erased */ - if ((*((vu_char *) dest) & data) != data) { - return (2); - } - /* Disable interrupts which might cause a timeout here */ - flag = disable_interrupts(); - - addr[0x0555] = 0xAA; - addr[0x02AA] = 0x55; - addr[0x0555] = 0xA0; - - *((vu_char *) dest) = data; - - /* re-enable interrupts if necessary */ - if (flag) - enable_interrupts(); - - /* data polling for D7 */ - start = get_timer(0); - while ((*((vu_char *) dest) & 0x80) != (data & 0x80)) { - if (get_timer(start) > CONFIG_SYS_FLASH_WRITE_TOUT) { - return (1); - } - } - return (0); -} diff --git a/board/netta2/netta2.c b/board/netta2/netta2.c deleted file mode 100644 index 008ae67..0000000 --- a/board/netta2/netta2.c +++ /dev/null @@ -1,624 +0,0 @@ -/* - * (C) Copyright 2000-2004 - * Pantelis Antoniou, Intracom S.A., panto@intracom.gr - * Wolfgang Denk, DENX Software Engineering, wd@denx.de. - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -/* - * Pantelis Antoniou, Intracom S.A., panto@intracom.gr - * U-Boot port on NetTA4 board - */ - -#include <common.h> -#include <miiphy.h> - -#include "mpc8xx.h" - -#ifdef CONFIG_HW_WATCHDOG -#include <watchdog.h> -#endif - -int fec8xx_miiphy_read(char *devname, unsigned char addr, - unsigned char reg, unsigned short *value); -int fec8xx_miiphy_write(char *devname, unsigned char addr, - unsigned char reg, unsigned short value); - -/****************************************************************/ - -/* some sane bit macros */ -#define _BD(_b) (1U << (31-(_b))) -#define _BDR(_l, _h) (((((1U << (31-(_l))) - 1) << 1) | 1) & ~((1U << (31-(_h))) - 1)) - -#define _BW(_b) (1U << (15-(_b))) -#define _BWR(_l, _h) (((((1U << (15-(_l))) - 1) << 1) | 1) & ~((1U << (15-(_h))) - 1)) - -#define _BB(_b) (1U << (7-(_b))) -#define _BBR(_l, _h) (((((1U << (7-(_l))) - 1) << 1) | 1) & ~((1U << (7-(_h))) - 1)) - -#define _B(_b) _BD(_b) -#define _BR(_l, _h) _BDR(_l, _h) - -/****************************************************************/ - -/* - * Check Board Identity: - * - * Return 1 always. - */ - -int checkboard(void) -{ - printf ("Intracom NetTA2 V%d\n", CONFIG_NETTA2_VERSION); - return (0); -} - -/****************************************************************/ - -#define _NOT_USED_ 0xFFFFFFFF - -/****************************************************************/ - -#define CS_0000 0x00000000 -#define CS_0001 0x10000000 -#define CS_0010 0x20000000 -#define CS_0011 0x30000000 -#define CS_0100 0x40000000 -#define CS_0101 0x50000000 -#define CS_0110 0x60000000 -#define CS_0111 0x70000000 -#define CS_1000 0x80000000 -#define CS_1001 0x90000000 -#define CS_1010 0xA0000000 -#define CS_1011 0xB0000000 -#define CS_1100 0xC0000000 -#define CS_1101 0xD0000000 -#define CS_1110 0xE0000000 -#define CS_1111 0xF0000000 - -#define BS_0000 0x00000000 -#define BS_0001 0x01000000 -#define BS_0010 0x02000000 -#define BS_0011 0x03000000 -#define BS_0100 0x04000000 -#define BS_0101 0x05000000 -#define BS_0110 0x06000000 -#define BS_0111 0x07000000 -#define BS_1000 0x08000000 -#define BS_1001 0x09000000 -#define BS_1010 0x0A000000 -#define BS_1011 0x0B000000 -#define BS_1100 0x0C000000 -#define BS_1101 0x0D000000 -#define BS_1110 0x0E000000 -#define BS_1111 0x0F000000 - -#define GPL0_AAAA 0x00000000 -#define GPL0_AAA0 0x00200000 -#define GPL0_AAA1 0x00300000 -#define GPL0_000A 0x00800000 -#define GPL0_0000 0x00A00000 -#define GPL0_0001 0x00B00000 -#define GPL0_111A 0x00C00000 -#define GPL0_1110 0x00E00000 -#define GPL0_1111 0x00F00000 - -#define GPL1_0000 0x00000000 -#define GPL1_0001 0x00040000 -#define GPL1_1110 0x00080000 -#define GPL1_1111 0x000C0000 - -#define GPL2_0000 0x00000000 -#define GPL2_0001 0x00010000 -#define GPL2_1110 0x00020000 -#define GPL2_1111 0x00030000 - -#define GPL3_0000 0x00000000 -#define GPL3_0001 0x00004000 -#define GPL3_1110 0x00008000 -#define GPL3_1111 0x0000C000 - -#define GPL4_0000 0x00000000 -#define GPL4_0001 0x00001000 -#define GPL4_1110 0x00002000 -#define GPL4_1111 0x00003000 - -#define GPL5_0000 0x00000000 -#define GPL5_0001 0x00000400 -#define GPL5_1110 0x00000800 -#define GPL5_1111 0x00000C00 -#define LOOP 0x00000080 - -#define EXEN 0x00000040 - -#define AMX_COL 0x00000000 -#define AMX_ROW 0x00000020 -#define AMX_MAR 0x00000030 - -#define NA 0x00000008 - -#define UTA 0x00000004 - -#define TODT 0x00000002 - -#define LAST 0x00000001 - -#define A10_AAAA GPL0_AAAA -#define A10_AAA0 GPL0_AAA0 -#define A10_AAA1 GPL0_AAA1 -#define A10_000A GPL0_000A -#define A10_0000 GPL0_0000 -#define A10_0001 GPL0_0001 -#define A10_111A GPL0_111A -#define A10_1110 GPL0_1110 -#define A10_1111 GPL0_1111 - -#define RAS_0000 GPL1_0000 -#define RAS_0001 GPL1_0001 -#define RAS_1110 GPL1_1110 -#define RAS_1111 GPL1_1111 - -#define CAS_0000 GPL2_0000 -#define CAS_0001 GPL2_0001 -#define CAS_1110 GPL2_1110 -#define CAS_1111 GPL2_1111 - -#define WE_0000 GPL3_0000 -#define WE_0001 GPL3_0001 -#define WE_1110 GPL3_1110 -#define WE_1111 GPL3_1111 - -/* #define CAS_LATENCY 3 */ -#define CAS_LATENCY 2 - -const uint sdram_table[0x40] = { - -#if CAS_LATENCY == 3 - /* RSS */ - CS_0001 | BS_1111 | A10_AAAA | RAS_0001 | CAS_1111 | WE_1111 | AMX_COL | UTA, /* ACT */ - CS_1111 | BS_1111 | A10_0000 | RAS_1111 | CAS_1111 | WE_1111 | AMX_COL | UTA, /* NOP */ - CS_0000 | BS_1111 | A10_0001 | RAS_1111 | CAS_0001 | WE_1111 | AMX_COL | UTA, /* READ */ - CS_0001 | BS_0001 | A10_1111 | RAS_0001 | CAS_1111 | WE_0001 | AMX_COL | UTA, /* PALL */ - CS_1111 | BS_1111 | A10_1111 | RAS_1111 | CAS_1111 | WE_1111 | AMX_COL, /* NOP */ - CS_1111 | BS_1111 | A10_1111 | RAS_1111 | CAS_1111 | WE_1111 | AMX_COL | UTA | TODT | LAST, /* NOP */ - _NOT_USED_, _NOT_USED_, - - /* RBS */ - CS_0001 | BS_1111 | A10_AAAA | RAS_0001 | CAS_1111 | WE_1111 | AMX_COL | UTA, /* ACT */ - CS_1111 | BS_1111 | A10_0000 | RAS_1111 | CAS_1111 | WE_1111 | AMX_COL | UTA, /* NOP */ - CS_0001 | BS_1111 | A10_0001 | RAS_1111 | CAS_0001 | WE_1111 | AMX_COL | UTA, /* READ */ - CS_1111 | BS_0000 | A10_1111 | RAS_1111 | CAS_1111 | WE_1111 | AMX_COL | UTA, /* NOP */ - CS_1111 | BS_0000 | A10_1111 | RAS_1111 | CAS_1111 | WE_1111 | AMX_COL, /* NOP */ - CS_1111 | BS_0000 | A10_1111 | RAS_1111 | CAS_1111 | WE_1111 | AMX_COL, /* NOP */ - CS_0001 | BS_0001 | A10_1111 | RAS_0001 | CAS_1111 | WE_0001 | AMX_COL, /* PALL */ - CS_1111 | BS_1111 | A10_1111 | RAS_1111 | CAS_1111 | WE_1111 | AMX_COL | TODT | LAST, /* NOP */ - _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_, - _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_, - - /* WSS */ - CS_0001 | BS_1111 | A10_AAAA | RAS_0001 | CAS_1111 | WE_1111 | AMX_COL | UTA, /* ACT */ - CS_1111 | BS_1111 | A10_0000 | RAS_1111 | CAS_1111 | WE_1111 | AMX_COL, /* NOP */ - CS_0000 | BS_0001 | A10_0000 | RAS_1111 | CAS_0001 | WE_0000 | AMX_COL | UTA, /* WRITE */ - CS_0001 | BS_1111 | A10_1111 | RAS_0001 | CAS_1111 | WE_0001 | AMX_COL | UTA, /* PALL */ - CS_1111 | BS_1111 | A10_1111 | RAS_1111 | CAS_1111 | WE_1111 | AMX_COL | UTA | TODT | LAST, /* NOP */ - _NOT_USED_, _NOT_USED_, _NOT_USED_, - - /* WBS */ - CS_0001 | BS_1111 | A10_AAAA | RAS_0001 | CAS_1111 | WE_1111 | AMX_COL | UTA, /* ACT */ - CS_1111 | BS_1111 | A10_0000 | RAS_1111 | CAS_1111 | WE_1111 | AMX_COL, /* NOP */ - CS_0001 | BS_0000 | A10_0000 | RAS_1111 | CAS_0001 | WE_0000 | AMX_COL, /* WRITE */ - CS_1111 | BS_0000 | A10_1111 | RAS_1111 | CAS_1111 | WE_1111 | AMX_COL, /* NOP */ - CS_1111 | BS_0000 | A10_1111 | RAS_1111 | CAS_1111 | WE_1111 | AMX_COL, /* NOP */ - CS_1111 | BS_0001 | A10_1111 | RAS_1111 | CAS_1111 | WE_1111 | AMX_COL | UTA, /* NOP */ - CS_1111 | BS_1111 | A10_1111 | RAS_1111 | CAS_1111 | WE_1111 | AMX_COL | UTA, /* NOP */ - CS_0001 | BS_1111 | A10_1111 | RAS_0001 | CAS_1111 | WE_0001 | AMX_COL | UTA, /* PALL */ - CS_1111 | BS_1111 | A10_1111 | RAS_1111 | CAS_1111 | WE_1111 | AMX_COL | UTA | TODT | LAST, /* NOP */ - _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_, - _NOT_USED_, _NOT_USED_, _NOT_USED_, -#endif - -#if CAS_LATENCY == 2 - /* RSS */ - CS_0001 | BS_1111 | A10_AAAA | RAS_0001 | CAS_1111 | WE_1111 | AMX_COL | UTA, /* ACT */ - CS_1110 | BS_1110 | A10_0000 | RAS_1111 | CAS_1110 | WE_1111 | AMX_COL | UTA, /* NOP */ - CS_0001 | BS_0001 | A10_0000 | RAS_1111 | CAS_0001 | WE_1111 | AMX_COL | UTA, /* READ */ - CS_1110 | BS_1111 | A10_0001 | RAS_1110 | CAS_1111 | WE_1110 | AMX_COL, /* NOP */ - CS_0001 | BS_1111 | A10_1111 | RAS_0001 | CAS_1111 | WE_0001 | AMX_COL | UTA | TODT | LAST, /* PALL */ - _NOT_USED_, - _NOT_USED_, _NOT_USED_, - - /* RBS */ - CS_0001 | BS_1111 | A10_AAAA | RAS_0001 | CAS_1111 | WE_1111 | AMX_COL | UTA, /* ACT */ - CS_1110 | BS_1110 | A10_0000 | RAS_1111 | CAS_1110 | WE_1111 | AMX_COL | UTA, /* NOP */ - CS_0001 | BS_0000 | A10_0000 | RAS_1111 | CAS_0001 | WE_1111 | AMX_COL | UTA, /* READ */ - CS_1111 | BS_0000 | A10_0000 | RAS_1111 | CAS_1111 | WE_1111 | AMX_COL, /* NOP */ - CS_1111 | BS_0000 | A10_0000 | RAS_1111 | CAS_1111 | WE_1111 | AMX_COL, /* NOP */ - CS_1111 | BS_0001 | A10_0000 | RAS_1111 | CAS_1111 | WE_1111 | AMX_COL, /* NOP */ - CS_1110 | BS_1111 | A10_0001 | RAS_1110 | CAS_1111 | WE_1110 | AMX_COL, /* NOP */ - CS_0001 | BS_1111 | A10_1111 | RAS_0001 | CAS_1111 | WE_0001 | AMX_COL | UTA | TODT | LAST, /* PALL */ - _NOT_USED_, - _NOT_USED_, _NOT_USED_, _NOT_USED_, - _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_, - - /* WSS */ - CS_0001 | BS_1111 | A10_AAA0 | RAS_0001 | CAS_1111 | WE_1111 | AMX_COL | UTA, /* ACT */ - CS_1110 | BS_1110 | A10_0000 | RAS_1111 | CAS_1110 | WE_1110 | AMX_COL, /* NOP */ - CS_0000 | BS_0001 | A10_0001 | RAS_1110 | CAS_0001 | WE_0000 | AMX_COL | UTA, /* WRITE */ - CS_0001 | BS_1111 | A10_1111 | RAS_0001 | CAS_1111 | WE_0001 | AMX_COL | UTA | TODT | LAST, /* PALL */ - _NOT_USED_, - _NOT_USED_, _NOT_USED_, - _NOT_USED_, - - /* WBS */ - CS_0001 | BS_1111 | A10_AAAA | RAS_0001 | CAS_1111 | WE_1111 | AMX_COL | UTA, /* ACT */ - CS_1110 | BS_1110 | A10_0000 | RAS_1111 | CAS_1110 | WE_1110 | AMX_COL, /* NOP */ - CS_0001 | BS_0000 | A10_0000 | RAS_1111 | CAS_0001 | WE_0001 | AMX_COL, /* WRITE */ - CS_1111 | BS_0000 | A10_0000 | RAS_1111 | CAS_1111 | WE_1111 | AMX_COL, /* NOP */ - CS_1111 | BS_0000 | A10_0000 | RAS_1111 | CAS_1111 | WE_1111 | AMX_COL, /* NOP */ - CS_1110 | BS_0001 | A10_0001 | RAS_1110 | CAS_1111 | WE_1110 | AMX_COL | UTA, /* NOP */ - CS_0001 | BS_1111 | A10_1111 | RAS_0001 | CAS_1111 | WE_0001 | AMX_COL | UTA | TODT | LAST, /* PALL */ - _NOT_USED_, - _NOT_USED_, _NOT_USED_, _NOT_USED_, - _NOT_USED_, _NOT_USED_, _NOT_USED_, - _NOT_USED_, _NOT_USED_, - -#endif - - /* UPT */ - CS_0001 | BS_1111 | A10_1111 | RAS_0001 | CAS_0001 | WE_1111 | AMX_COL | UTA | LOOP, /* ATRFR */ - CS_1111 | BS_1111 | A10_1111 | RAS_1111 | CAS_1111 | WE_1111 | AMX_COL | UTA, /* NOP */ - CS_1111 | BS_1111 | A10_1111 | RAS_1111 | CAS_1111 | WE_1111 | AMX_COL | UTA, /* NOP */ - CS_1111 | BS_1111 | A10_1111 | RAS_1111 | CAS_1111 | WE_1111 | AMX_COL | UTA, /* NOP */ - CS_1111 | BS_1111 | A10_1111 | RAS_1111 | CAS_1111 | WE_1111 | AMX_COL | UTA | LOOP, /* NOP */ - CS_1111 | BS_1111 | A10_1111 | RAS_1111 | CAS_1111 | WE_1111 | AMX_COL | UTA | TODT | LAST, /* NOP */ - _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_, - _NOT_USED_, _NOT_USED_, - - /* EXC */ - CS_0001 | BS_1111 | A10_1111 | RAS_0001 | CAS_1111 | WE_0001 | AMX_COL | UTA | LAST, - _NOT_USED_, - - /* REG */ - CS_1110 | BS_1111 | A10_1110 | RAS_1110 | CAS_1110 | WE_1110 | AMX_MAR | UTA, - CS_0001 | BS_1111 | A10_0001 | RAS_0001 | CAS_0001 | WE_0001 | AMX_MAR | UTA | LAST, -}; - -#if CONFIG_NETTA2_VERSION == 2 -static const uint nandcs_table[0x40] = { - /* RSS */ - CS_1000 | GPL4_1111 | GPL5_1111 | UTA, - CS_0000 | GPL4_1110 | GPL5_1111 | UTA, - CS_0000 | GPL4_0000 | GPL5_1111 | UTA, - CS_0000 | GPL4_0000 | GPL5_1111 | UTA, - CS_0000 | GPL4_0000 | GPL5_1111, - CS_0000 | GPL4_0001 | GPL5_1111 | UTA, - CS_0000 | GPL4_1111 | GPL5_1111 | UTA, - CS_0011 | GPL4_1111 | GPL5_1111 | UTA | LAST, /* NOP */ - - /* RBS */ - _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_, - _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_, - _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_, - _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_, - - /* WSS */ - CS_1000 | GPL4_1111 | GPL5_1110 | UTA, - CS_0000 | GPL4_1111 | GPL5_0000 | UTA, - CS_0000 | GPL4_1111 | GPL5_0000 | UTA, - CS_0000 | GPL4_1111 | GPL5_0000 | UTA, - CS_0000 | GPL4_1111 | GPL5_0001 | UTA, - CS_0000 | GPL4_1111 | GPL5_1111 | UTA, - CS_0000 | GPL4_1111 | GPL5_1111, - CS_0011 | GPL4_1111 | GPL5_1111 | UTA | LAST, - - /* WBS */ - _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_, - _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_, - _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_, - _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_, - - /* UPT */ - _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_, - _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_, - _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_, - - /* EXC */ - CS_0001 | LAST, - _NOT_USED_, - - /* REG */ - CS_1110 , - CS_0001 | LAST, -}; -#endif - -/* 0xC8 = 0b11001000 , CAS3, >> 2 = 0b00 11 0 010 */ -/* 0x88 = 0b10001000 , CAS2, >> 2 = 0b00 10 0 010 */ -#define MAR_SDRAM_INIT ((CAS_LATENCY << 6) | 0x00000008LU) - -/* 8 */ -#define CONFIG_SYS_MAMR ((CONFIG_SYS_MAMR_PTA << MAMR_PTA_SHIFT) | MAMR_PTAE | \ - MAMR_AMA_TYPE_0 | MAMR_DSA_1_CYCL | MAMR_G0CLA_A11 | \ - MAMR_RLFA_1X | MAMR_WLFA_1X | MAMR_TLFA_4X) - -void check_ram(unsigned int addr, unsigned int size) -{ - unsigned int i, j, v, vv; - volatile unsigned int *p; - unsigned int pv; - - p = (unsigned int *)addr; - pv = (unsigned int)p; - for (i = 0; i < size / sizeof(unsigned int); i++, pv += sizeof(unsigned int)) - *p++ = pv; - - p = (unsigned int *)addr; - for (i = 0; i < size / sizeof(unsigned int); i++) { - v = (unsigned int)p; - vv = *p; - if (vv != v) { - printf("%p: read %08x instead of %08x\n", p, vv, v); - hang(); - } - p++; - } - - for (j = 0; j < 5; j++) { - switch (j) { - case 0: v = 0x00000000; break; - case 1: v = 0xffffffff; break; - case 2: v = 0x55555555; break; - case 3: v = 0xaaaaaaaa; break; - default:v = 0xdeadbeef; break; - } - p = (unsigned int *)addr; - for (i = 0; i < size / sizeof(unsigned int); i++) { - *p = v; - vv = *p; - if (vv != v) { - printf("%p: read %08x instead of %08x\n", p, vv, v); - hang(); - } - *p = ~v; - p++; - } - } -} - -phys_size_t initdram(int board_type) -{ - volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR; - volatile memctl8xx_t *memctl = &immap->im_memctl; - long int size; - - upmconfig(UPMB, (uint *) sdram_table, sizeof(sdram_table) / sizeof(sdram_table[0])); - - /* - * Preliminary prescaler for refresh - */ - memctl->memc_mptpr = MPTPR_PTP_DIV8; - - memctl->memc_mar = MAR_SDRAM_INIT; /* 32-bit address to be output on the address bus if AMX = 0b11 */ - - /* - * Map controller bank 3 to the SDRAM bank at preliminary address. - */ - memctl->memc_or3 = CONFIG_SYS_OR3_PRELIM; - memctl->memc_br3 = CONFIG_SYS_BR3_PRELIM; - - memctl->memc_mbmr = CONFIG_SYS_MAMR & ~MAMR_PTAE; /* no refresh yet */ - - udelay(200); - - /* perform SDRAM initialisation sequence */ - memctl->memc_mcr = MCR_OP_RUN | MCR_UPM_B | MCR_MB_CS3 | MCR_MLCF(1) | MCR_MAD(0x3C); /* precharge all */ - udelay(1); - - memctl->memc_mcr = MCR_OP_RUN | MCR_UPM_B | MCR_MB_CS3 | MCR_MLCF(2) | MCR_MAD(0x30); /* refresh 2 times(0) */ - udelay(1); - - memctl->memc_mcr = MCR_OP_RUN | MCR_UPM_B | MCR_MB_CS3 | MCR_MLCF(1) | MCR_MAD(0x3E); /* exception program (write mar)*/ - udelay(1); - - memctl->memc_mbmr |= MAMR_PTAE; /* enable refresh */ - - udelay(10000); - - { - u32 d1, d2; - - d1 = 0xAA55AA55; - *(volatile u32 *)0 = d1; - d2 = *(volatile u32 *)0; - if (d1 != d2) { - printf("DRAM fails: wrote 0x%08x read 0x%08x\n", d1, d2); - hang(); - } - - d1 = 0x55AA55AA; - *(volatile u32 *)0 = d1; - d2 = *(volatile u32 *)0; - if (d1 != d2) { - printf("DRAM fails: wrote 0x%08x read 0x%08x\n", d1, d2); - hang(); - } - } - - size = get_ram_size((long *)0, SDRAM_MAX_SIZE); - - if (size == 0) { - printf("SIZE is zero: LOOP on 0\n"); - for (;;) { - *(volatile u32 *)0 = 0; - (void)*(volatile u32 *)0; - } - } - - return size; -} - -/* ------------------------------------------------------------------------- */ - -void reset_phys(void) -{ - int phyno; - unsigned short v; - - udelay(10000); - /* reset the damn phys */ - mii_init(); - - for (phyno = 0; phyno < 32; ++phyno) { - fec8xx_miiphy_read(NULL, phyno, MII_PHYSID1, &v); - if (v == 0xFFFF) - continue; - fec8xx_miiphy_write(NULL, phyno, MII_BMCR, BMCR_PDOWN); - udelay(10000); - fec8xx_miiphy_write(NULL, phyno, MII_BMCR, - BMCR_RESET | BMCR_ANENABLE); - udelay(10000); - } -} - -/* ------------------------------------------------------------------------- */ - -/* GP = general purpose, SP = special purpose (on chip peripheral) */ - -/* bits that can have a special purpose or can be configured as inputs/outputs */ -#define PA_GP_INMASK 0 -#define PA_GP_OUTMASK (_BW(3) | _BW(7) | _BW(10) | _BW(14) | _BW(15)) -#define PA_SP_MASK 0 -#define PA_ODR_VAL 0 -#define PA_GP_OUTVAL (_BW(3) | _BW(14) | _BW(15)) -#define PA_SP_DIRVAL 0 - -#define PB_GP_INMASK _B(28) -#define PB_GP_OUTMASK (_B(19) | _B(23) | _B(26) | _B(27) | _B(29) | _B(30)) -#define PB_SP_MASK (_BR(22, 25)) -#define PB_ODR_VAL 0 -#define PB_GP_OUTVAL (_B(26) | _B(27) | _B(29) | _B(30)) -#define PB_SP_DIRVAL 0 - -#if CONFIG_NETTA2_VERSION == 1 -#define PC_GP_INMASK _BW(12) -#define PC_GP_OUTMASK (_BW(10) | _BW(11) | _BW(13) | _BW(15)) -#elif CONFIG_NETTA2_VERSION == 2 -#define PC_GP_INMASK (_BW(13) | _BW(15)) -#define PC_GP_OUTMASK (_BW(10) | _BW(11) | _BW(12)) -#endif -#define PC_SP_MASK 0 -#define PC_SOVAL 0 -#define PC_INTVAL 0 -#define PC_GP_OUTVAL (_BW(10) | _BW(11)) -#define PC_SP_DIRVAL 0 - -#if CONFIG_NETTA2_VERSION == 1 -#define PE_GP_INMASK _B(31) -#define PE_GP_OUTMASK (_B(17) | _B(18) |_B(20) | _B(24) | _B(27) | _B(28) | _B(29) | _B(30)) -#define PE_GP_OUTVAL (_B(20) | _B(24) | _B(27) | _B(28)) -#elif CONFIG_NETTA2_VERSION == 2 -#define PE_GP_INMASK _BR(28, 31) -#define PE_GP_OUTMASK (_B(17) | _B(18) |_B(20) | _B(24) | _B(27)) -#define PE_GP_OUTVAL (_B(20) | _B(24) | _B(27)) -#endif -#define PE_SP_MASK 0 -#define PE_ODR_VAL 0 -#define PE_SP_DIRVAL 0 - -int board_early_init_f(void) -{ - volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR; - volatile iop8xx_t *ioport = &immap->im_ioport; - volatile cpm8xx_t *cpm = &immap->im_cpm; - volatile memctl8xx_t *memctl = &immap->im_memctl; - - /* NAND chip select */ -#if CONFIG_NETTA2_VERSION == 1 - memctl->memc_or1 = ((0xFFFFFFFFLU & ~(NAND_SIZE - 1)) | OR_CSNT_SAM | OR_BI | OR_SCY_8_CLK | OR_EHTR | OR_TRLX); - memctl->memc_br1 = ((NAND_BASE & BR_BA_MSK) | BR_PS_8 | BR_V); -#elif CONFIG_NETTA2_VERSION == 2 - upmconfig(UPMA, (uint *) nandcs_table, sizeof(nandcs_table) / sizeof(nandcs_table[0])); - memctl->memc_or1 = ((0xFFFFFFFFLU & ~(NAND_SIZE - 1)) | OR_BI | OR_G5LS); - memctl->memc_br1 = ((NAND_BASE & BR_BA_MSK) | BR_PS_8 | BR_V | BR_MS_UPMA); - memctl->memc_mamr = 0; /* all clear */ -#endif - - /* DSP chip select */ - memctl->memc_or2 = ((0xFFFFFFFFLU & ~(DSP_SIZE - 1)) | OR_CSNT_SAM | OR_BI | OR_ACS_DIV2 | OR_SETA | OR_TRLX); - memctl->memc_br2 = ((DSP_BASE & BR_BA_MSK) | BR_PS_16 | BR_V); - -#if CONFIG_NETTA2_VERSION == 1 - memctl->memc_br4 &= ~BR_V; -#endif - memctl->memc_br5 &= ~BR_V; - memctl->memc_br6 &= ~BR_V; - memctl->memc_br7 &= ~BR_V; - - ioport->iop_padat = PA_GP_OUTVAL; - ioport->iop_paodr = PA_ODR_VAL; - ioport->iop_padir = PA_GP_OUTMASK | PA_SP_DIRVAL; - ioport->iop_papar = PA_SP_MASK; - - cpm->cp_pbdat = PB_GP_OUTVAL; - cpm->cp_pbodr = PB_ODR_VAL; - cpm->cp_pbdir = PB_GP_OUTMASK | PB_SP_DIRVAL; - cpm->cp_pbpar = PB_SP_MASK; - - ioport->iop_pcdat = PC_GP_OUTVAL; - ioport->iop_pcdir = PC_GP_OUTMASK | PC_SP_DIRVAL; - ioport->iop_pcso = PC_SOVAL; - ioport->iop_pcint = PC_INTVAL; - ioport->iop_pcpar = PC_SP_MASK; - - cpm->cp_pedat = PE_GP_OUTVAL; - cpm->cp_peodr = PE_ODR_VAL; - cpm->cp_pedir = PE_GP_OUTMASK | PE_SP_DIRVAL; - cpm->cp_pepar = PE_SP_MASK; - - return 0; -} - -#ifdef CONFIG_HW_WATCHDOG - -void hw_watchdog_reset(void) -{ - /* XXX add here the really funky stuff */ -} - -#endif - -#if defined(CONFIG_SYS_CONSOLE_IS_IN_ENV) && defined(CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE) -int overwrite_console(void) -{ - /* printf("overwrite_console called\n"); */ - return 0; -} -#endif - -extern int drv_phone_init(void); -extern int drv_phone_use_me(void); -extern int drv_phone_is_idle(void); - -int misc_init_r(void) -{ - return 0; -} - -int last_stage_init(void) -{ -#if CONFIG_NETTA2_VERSION == 2 - int i; -#endif - -#if CONFIG_NETTA2_VERSION == 2 - /* assert peripheral reset */ - ((volatile immap_t *)CONFIG_SYS_IMMR)->im_ioport.iop_pcdat &= ~_BW(12); - for (i = 0; i < 10; i++) - udelay(1000); - ((volatile immap_t *)CONFIG_SYS_IMMR)->im_ioport.iop_pcdat |= _BW(12); -#endif - reset_phys(); - - return 0; -} diff --git a/board/netta2/u-boot.lds b/board/netta2/u-boot.lds deleted file mode 100644 index 0dff5a4..0000000 --- a/board/netta2/u-boot.lds +++ /dev/null @@ -1,82 +0,0 @@ -/* - * (C) Copyright 2000-2010 - * Wolfgang Denk, DENX Software Engineering, wd@denx.de. - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -OUTPUT_ARCH(powerpc) - -SECTIONS -{ - /* Read-only sections, merged into text segment: */ - . = + SIZEOF_HEADERS; - .text : - { - arch/powerpc/cpu/mpc8xx/start.o (.text*) - arch/powerpc/cpu/mpc8xx/traps.o (.text*) - - *(.text*) - } - _etext = .; - PROVIDE (etext = .); - .rodata : - { - *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) - } - - /* Read-write section, merged into data segment: */ - . = (. + 0x00FF) & 0xFFFFFF00; - _erotext = .; - PROVIDE (erotext = .); - .reloc : - { - _GOT2_TABLE_ = .; - KEEP(*(.got2)) - KEEP(*(.got)) - PROVIDE(_GLOBAL_OFFSET_TABLE_ = . + 4); - _FIXUP_TABLE_ = .; - KEEP(*(.fixup)) - } - __got2_entries = ((_GLOBAL_OFFSET_TABLE_ - _GOT2_TABLE_) >> 2) - 1; - __fixup_entries = (. - _FIXUP_TABLE_)>>2; - - .data : - { - *(.data*) - *(.sdata*) - } - _edata = .; - PROVIDE (edata = .); - - . = .; - - . = ALIGN(4); - .u_boot_list : { - KEEP(*(SORT(.u_boot_list*))); - } - - - . = .; - __start___ex_table = .; - __ex_table : { *(__ex_table) } - __stop___ex_table = .; - - . = ALIGN(256); - __init_begin = .; - .text.init : { *(.text.init) } - .data.init : { *(.data.init) } - . = ALIGN(256); - __init_end = .; - - __bss_start = .; - .bss (NOLOAD) : - { - *(.bss*) - *(.sbss*) - *(COMMON) - . = ALIGN(4); - } - __bss_end = . ; - PROVIDE (end = .); -} diff --git a/board/netta2/u-boot.lds.debug b/board/netta2/u-boot.lds.debug deleted file mode 100644 index a198cf9..0000000 --- a/board/netta2/u-boot.lds.debug +++ /dev/null @@ -1,121 +0,0 @@ -/* - * (C) Copyright 2000-2004 - * Wolfgang Denk, DENX Software Engineering, wd@denx.de. - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -OUTPUT_ARCH(powerpc) -/* Do we need any of these for elf? - __DYNAMIC = 0; */ -SECTIONS -{ - /* Read-only sections, merged into text segment: */ - . = + SIZEOF_HEADERS; - .interp : { *(.interp) } - .hash : { *(.hash) } - .dynsym : { *(.dynsym) } - .dynstr : { *(.dynstr) } - .rel.text : { *(.rel.text) } - .rela.text : { *(.rela.text) } - .rel.data : { *(.rel.data) } - .rela.data : { *(.rela.data) } - .rel.rodata : { *(.rel.rodata) } - .rela.rodata : { *(.rela.rodata) } - .rel.got : { *(.rel.got) } - .rela.got : { *(.rela.got) } - .rel.ctors : { *(.rel.ctors) } - .rela.ctors : { *(.rela.ctors) } - .rel.dtors : { *(.rel.dtors) } - .rela.dtors : { *(.rela.dtors) } - .rel.bss : { *(.rel.bss) } - .rela.bss : { *(.rela.bss) } - .rel.plt : { *(.rel.plt) } - .rela.plt : { *(.rela.plt) } - .init : { *(.init) } - .plt : { *(.plt) } - .text : - { - /* WARNING - the following is hand-optimized to fit within */ - /* the sector layout of our flash chips! XXX FIXME XXX */ - - arch/powerpc/cpu/mpc8xx/start.o (.text) - common/dlmalloc.o (.text) - lib/vsprintf.o (.text) - lib/crc32.o (.text) - - . = env_offset; - common/env_embedded.o(.text) - - *(.text) - *(.got1) - } - _etext = .; - PROVIDE (etext = .); - .rodata : - { - *(.rodata) - *(.rodata1) - *(.rodata.str1.4) - *(.eh_frame) - } - .fini : { *(.fini) } =0 - .ctors : { *(.ctors) } - .dtors : { *(.dtors) } - - /* Read-write section, merged into data segment: */ - . = (. + 0x0FFF) & 0xFFFFF000; - _erotext = .; - PROVIDE (erotext = .); - .reloc : - { - *(.got) - _GOT2_TABLE_ = .; - *(.got2) - _FIXUP_TABLE_ = .; - *(.fixup) - } - __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2; - __fixup_entries = (. - _FIXUP_TABLE_)>>2; - - .data : - { - *(.data) - *(.data1) - *(.sdata) - *(.sdata2) - *(.dynamic) - CONSTRUCTORS - } - _edata = .; - PROVIDE (edata = .); - - - . = ALIGN(4); - .u_boot_list : { - KEEP(*(SORT(.u_boot_list*))); - } - - - __start___ex_table = .; - __ex_table : { *(__ex_table) } - __stop___ex_table = .; - - . = ALIGN(4096); - __init_begin = .; - .text.init : { *(.text.init) } - .data.init : { *(.data.init) } - . = ALIGN(4096); - __init_end = .; - - __bss_start = .; - .bss : - { - *(.sbss) *(.scommon) - *(.dynbss) - *(.bss) - *(COMMON) - } - __bss_end = . ; - PROVIDE (end = .); -} |