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-rw-r--r--board/netstar/netstar.c56
1 files changed, 56 insertions, 0 deletions
diff --git a/board/netstar/netstar.c b/board/netstar/netstar.c
index f52afe5..ee4f2cd 100644
--- a/board/netstar/netstar.c
+++ b/board/netstar/netstar.c
@@ -21,6 +21,11 @@
*/
#include <common.h>
+#include <i2c.h>
+#include <flash.h>
+#include <nand.h>
+
+#include <asm/io.h>
DECLARE_GLOBAL_DATA_PTR;
@@ -52,6 +57,10 @@ int dram_init(void)
int misc_init_r(void)
{
+#if defined(CONFIG_RTC_DS1307)
+ /* enable trickle charge */
+ i2c_reg_write(CONFIG_SYS_I2C_RTC_ADDR, 0x10, 0xaa);
+#endif
return 0;
}
@@ -59,3 +68,50 @@ int board_late_init(void)
{
return 0;
}
+
+#if defined(CONFIG_CMD_FLASH)
+ulong board_flash_get_legacy(ulong base, int banknum, flash_info_t * info)
+{
+ if (banknum == 0) { /* AM29LV800 boot flash */
+ info->portwidth = FLASH_CFI_16BIT;
+ info->chipwidth = FLASH_CFI_BY16;
+ info->interface = FLASH_CFI_X16;
+ return 1;
+ }
+
+ return 0;
+}
+#endif
+
+#if defined(CONFIG_CMD_NAND)
+/*
+ * hardware specific access to control-lines
+ *
+ * NAND_NCE: bit 0 - don't care
+ * NAND_CLE: bit 1 -> bit 1 (0x0002)
+ * NAND_ALE: bit 2 -> bit 2 (0x0004)
+ */
+static void netstar_nand_hwcontrol(struct mtd_info *mtd, int cmd,
+ unsigned int ctrl)
+{
+ struct nand_chip *chip = mtd->priv;
+ unsigned long mask;
+
+ if (cmd == NAND_CMD_NONE)
+ return;
+
+ mask = (ctrl & NAND_CLE) ? 0x02 : 0;
+ if (ctrl & NAND_ALE)
+ mask |= 0x04;
+ writeb(cmd, (unsigned long)chip->IO_ADDR_W | mask);
+}
+
+int board_nand_init(struct nand_chip *nand)
+{
+ nand->options = NAND_SAMSUNG_LP_OPTIONS;
+ nand->ecc.mode = NAND_ECC_SOFT;
+ nand->cmd_ctrl = netstar_nand_hwcontrol;
+ nand->chip_delay = 400;
+ return 0;
+}
+#endif