diff options
Diffstat (limited to 'board/ms7722se')
| -rw-r--r-- | board/ms7722se/Makefile | 48 | ||||
| -rw-r--r-- | board/ms7722se/config.mk | 31 | ||||
| -rw-r--r-- | board/ms7722se/lowlevel_init.S | 294 | ||||
| -rw-r--r-- | board/ms7722se/ms7722se.c | 59 | ||||
| -rw-r--r-- | board/ms7722se/u-boot.lds | 105 |
5 files changed, 537 insertions, 0 deletions
diff --git a/board/ms7722se/Makefile b/board/ms7722se/Makefile new file mode 100644 index 0000000..6dec013 --- /dev/null +++ b/board/ms7722se/Makefile @@ -0,0 +1,48 @@ +# +# Copyright (C) 2007 +# Nobuhiro Iwamatsu <iwamatsu@nigauri.org> +# +# Copyright (C) 2007 +# Kenati Technologies, Inc. +# +# board/ms7722se/Makefile +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA + +include $(TOPDIR)/config.mk + +LIB = lib$(BOARD).a + +OBJS := ms7722se.o +SOBJS := lowlevel_init.o + +$(LIB): $(OBJS) $(SOBJS) + $(AR) crv $@ $(OBJS) $(SOBJS) + +clean: + rm -f $(SOBJS) $(OBJS) + +distclean: clean + rm -f $(LIB) core *.bak .depend + +######################################################################### + +.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c) + $(CC) -M $(CPPFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@ + +-include .depend + +######################################################################### diff --git a/board/ms7722se/config.mk b/board/ms7722se/config.mk new file mode 100644 index 0000000..4797d6f --- /dev/null +++ b/board/ms7722se/config.mk @@ -0,0 +1,31 @@ +# +# Copyright (C) 2007 +# Nobuhiro Iwamatsu <iwamatsu@nigauri.org> +# +# Copyright (C) 2007 +# Kenati Technologies, Inc. +# +# board/ms7722se/config.mk +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA + +# +# TEXT_BASE refers to image _after_ relocation. +# +# NOTE: Must match value used in u-boot.lds (in this directory). +# + +TEXT_BASE = 0x8FFC0000 diff --git a/board/ms7722se/lowlevel_init.S b/board/ms7722se/lowlevel_init.S new file mode 100644 index 0000000..2024e27 --- /dev/null +++ b/board/ms7722se/lowlevel_init.S @@ -0,0 +1,294 @@ +/* + * Copyright (C) 2007 + * Nobuhiro Iwamatsu <iwamatsu@nigauri.org> + * + * Copyright (C) 2007 + * Kenati Technologies, Inc. + * + * board/ms7722se/lowlevel_init.S + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <config.h> +#include <version.h> + +#include <asm/processor.h> + +/* + * Board specific low level init code, called _very_ early in the + * startup sequence. Relocation to SDRAM has not happened yet, no + * stack is available, bss section has not been initialised, etc. + * + * (Note: As no stack is available, no subroutines can be called...). + */ + + .global lowlevel_init + + .text + .align 2 + +lowlevel_init: + + mov.l CCR_A, r1 ! Address of Cache Control Register + mov.l CCR_D, r0 ! Instruction Cache Invalidate + mov.l r0, @r1 + + mov.l MMUCR_A, r1 ! Address of MMU Control Register + mov.l MMUCR_D, r0 ! TI == TLB Invalidate bit + mov.l r0, @r1 + + mov.l MSTPCR0_A, r1 ! Address of Power Control Register 0 + mov.l MSTPCR0_D, r0 ! + mov.l r0, @r1 + + mov.l MSTPCR2_A, r1 ! Address of Power Control Register 2 + mov.l MSTPCR2_D, r0 ! + mov.l r0, @r1 + + mov.l SBSCR_A, r1 ! + mov.w SBSCR_D, r0 ! + mov.w r0, @r1 + + mov.l PSCR_A, r1 ! + mov.w PSCR_D, r0 ! + mov.w r0, @r1 + +! mov.l RWTCSR_A, r1 ! 0xA4520004 (Watchdog Control / Status Register) +! mov.w RWTCSR_D_1, r0 ! 0xA507 -> timer_STOP/WDT_CLK=max +! mov.w r0, @r1 + + mov.l RWTCNT_A, r1 ! 0xA4520000 (Watchdog Count Register) + mov.w RWTCNT_D, r0 ! 0x5A00 -> Clear + mov.w r0, @r1 + + mov.l RWTCSR_A, r1 ! 0xA4520004 (Watchdog Control / Status Register) + mov.w RWTCSR_D_2, r0 ! 0xA504 -> timer_STOP/CLK=500ms + mov.w r0, @r1 + + mov.l FRQCR_A, r1 ! 0xA4150000 Frequency control register + mov.l FRQCR_D, r0 ! + mov.l r0, @r1 + + mov.l CCR_A, r1 ! Address of Cache Control Register + mov.l CCR_D_2, r0 ! ?? + mov.l r0, @r1 + +bsc_init: + + mov.l PSELA_A, r1 + mov.w PSELA_D, r0 + mov.w r0, @r1 + + mov.l DRVCR_A, r1 + mov.w DRVCR_D, r0 + mov.w r0, @r1 + + mov.l PCCR_A, r1 + mov.w PCCR_D, r0 + mov.w r0, @r1 + + mov.l PECR_A, r1 + mov.w PECR_D, r0 + mov.w r0, @r1 + + mov.l PJCR_A, r1 + mov.w PJCR_D, r0 + mov.w r0, @r1 + + mov.l PXCR_A, r1 + mov.w PXCR_D, r0 + mov.w r0, @r1 + + mov.l CMNCR_A, r1 ! CMNCR address -> R1 + mov.l CMNCR_D, r0 ! CMNCR data -> R0 + mov.l r0, @r1 ! CMNCR set + + mov.l CS0BCR_A, r1 ! CS0BCR address -> R1 + mov.l CS0BCR_D, r0 ! CS0BCR data -> R0 + mov.l r0, @r1 ! CS0BCR set + + mov.l CS2BCR_A, r1 ! CS2BCR address -> R1 + mov.l CS2BCR_D, r0 ! CS2BCR data -> R0 + mov.l r0, @r1 ! CS2BCR set + + mov.l CS4BCR_A, r1 ! CS4BCR address -> R1 + mov.l CS4BCR_D, r0 ! CS4BCR data -> R0 + mov.l r0, @r1 ! CS4BCR set + + mov.l CS5ABCR_A, r1 ! CS5ABCR address -> R1 + mov.l CS5ABCR_D, r0 ! CS5ABCR data -> R0 + mov.l r0, @r1 ! CS5ABCR set + + mov.l CS5BBCR_A, r1 ! CS5BBCR address -> R1 + mov.l CS5BBCR_D, r0 ! CS5BBCR data -> R0 + mov.l r0, @r1 ! CS5BBCR set + + mov.l CS6ABCR_A, r1 ! CS6ABCR address -> R1 + mov.l CS6ABCR_D, r0 ! CS6ABCR data -> R0 + mov.l r0, @r1 ! CS6ABCR set + + mov.l CS0WCR_A, r1 ! CS0WCR address -> R1 + mov.l CS0WCR_D, r0 ! CS0WCR data -> R0 + mov.l r0, @r1 ! CS0WCR set + + mov.l CS2WCR_A, r1 ! CS2WCR address -> R1 + mov.l CS2WCR_D, r0 ! CS2WCR data -> R0 + mov.l r0, @r1 ! CS2WCR set + + mov.l CS4WCR_A, r1 ! CS4WCR address -> R1 + mov.l CS4WCR_D, r0 ! CS4WCR data -> R0 + mov.l r0, @r1 ! CS4WCR set + + mov.l CS5AWCR_A, r1 ! CS5AWCR address -> R1 + mov.l CS5AWCR_D, r0 ! CS5AWCR data -> R0 + mov.l r0, @r1 ! CS5AWCR set + + mov.l CS5BWCR_A, r1 ! CS5BWCR address -> R1 + mov.l CS5BWCR_D, r0 ! CS5BWCR data -> R0 + mov.l r0, @r1 ! CS5BWCR set + + mov.l CS6AWCR_A, r1 ! CS6AWCR address -> R1 + mov.l CS6AWCR_D, r0 ! CS6AWCR data -> R0 + mov.l r0, @r1 ! CS6AWCR set + + ! SDRAM initialization + mov.l SDCR_A, r1 ! SB_SDCR address -> R1 + mov.l SDCR_D, r0 ! SB_SDCR data -> R0 + mov.l r0, @r1 ! SB_SDCR set + + mov.l SDWCR_A, r1 ! SB_SDWCR address -> R1 + mov.l SDWCR_D, r0 ! SB_SDWCR data -> R0 + mov.l r0, @r1 ! SB_SDWCR set + + mov.l SDPCR_A, r1 ! SB_SDPCR address -> R1 + mov.l SDPCR_D, r0 ! SB_SDPCR data -> R0 + mov.l r0, @r1 ! SB_SDPCR set + + mov.l RTCOR_A, r1 ! SB_RTCOR address -> R1 + mov.l RTCOR_D, r0 ! SB_RTCOR data -> R0 + mov.l r0, @r1 ! SB_RTCOR set + + mov.l RTCSR_A, r1 ! SB_RTCSR address -> R1 + mov.l RTCSR_D, r0 ! SB_RTCSR data -> R0 + mov.l r0, @r1 ! SB_RTCSR set + + mov.l SDMR3_A, r1 ! SDMR3 address -> R1 + mov #0x00, r0 ! SDMR3 data -> R0 + mov.b r0, @r1 ! SDMR3 set + + ! BL bit off (init = ON) (?!?) + + stc sr, r0 ! BL bit off(init=ON) + mov.l SR_MASK_D, r1 + and r1, r0 + ldc r0, sr + + rts + mov #0, r0 + + .align 2 + +CCR_A: .long CCR +MMUCR_A: .long MMUCR +MSTPCR0_A: .long MSTPCR0 +MSTPCR2_A: .long MSTPCR2 +SBSCR_A: .long SBSCR +PSCR_A: .long PSCR +RWTCSR_A: .long RWTCSR +RWTCNT_A: .long RWTCNT +FRQCR_A: .long FRQCR + +CCR_D: .long 0x00000800 +CCR_D_2: .long 0x00000103 +MMUCR_D: .long 0x00000004 +MSTPCR0_D: .long 0x00001001 +MSTPCR2_D: .long 0xffffffff +FRQCR_D: .long 0x07022538 + +PSELA_A: .long 0xa405014E +PSELA_D: .word 0x0A10 + .align 2 + +DRVCR_A: .long 0xa405018A +DRVCR_D: .word 0x0554 + .align 2 + +PCCR_A: .long 0xa4050104 +PCCR_D: .word 0x8800 + .align 2 + +PECR_A: .long 0xa4050108 +PECR_D: .word 0x0000 + .align 2 + +PJCR_A: .long 0xa4050110 +PJCR_D: .word 0x1000 + .align 2 + +PXCR_A: .long 0xa4050148 +PXCR_D: .word 0x0AAA + .align 2 + +CMNCR_A: .long CMNCR +CMNCR_D: .long 0x00000013 +CS0BCR_A: .long CS0BCR ! Flash bank 1 +CS0BCR_D: .long 0x24920400 +CS2BCR_A: .long CS2BCR ! SRAM +CS2BCR_D: .long 0x24920400 +CS4BCR_A: .long CS4BCR ! FPGA, PCMCIA, USB, ext slot +CS4BCR_D: .long 0x24920400 +CS5ABCR_A: .long CS5ABCR ! Ext slot +CS5ABCR_D: .long 0x24920400 +CS5BBCR_A: .long CS5BBCR ! USB controller +CS5BBCR_D: .long 0x24920400 +CS6ABCR_A: .long CS6ABCR ! Ethernet +CS6ABCR_D: .long 0x24920400 + +CS0WCR_A: .long CS0WCR +CS0WCR_D: .long 0x00000300 +CS2WCR_A: .long CS2WCR +CS2WCR_D: .long 0x00000300 +CS4WCR_A: .long CS4WCR +CS4WCR_D: .long 0x00000300 +CS5AWCR_A: .long CS5AWCR +CS5AWCR_D: .long 0x00000300 +CS5BWCR_A: .long CS5BWCR +CS5BWCR_D: .long 0x00000300 +CS6AWCR_A: .long CS6AWCR +CS6AWCR_D: .long 0x00000300 + +SDCR_A: .long SBSC_SDCR +SDCR_D: .long 0x00020809 +SDWCR_A: .long SBSC_SDWCR +SDWCR_D: .long 0x00164d0d +SDPCR_A: .long SBSC_SDPCR +SDPCR_D: .long 0x00000087 +RTCOR_A: .long SBSC_RTCOR +RTCOR_D: .long 0xA55A0034 +RTCSR_A: .long SBSC_RTCSR +RTCSR_D: .long 0xA55A0010 +SDMR3_A: .long 0xFE500180 + + .align 1 + +SBSCR_D: .word 0x0040 +PSCR_D: .word 0x0000 +RWTCSR_D_1: .word 0xA507 +RWTCSR_D_2: .word 0xA507 +RWTCNT_D: .word 0x5A00 + +SR_MASK_D: .long 0xEFFFFF0F diff --git a/board/ms7722se/ms7722se.c b/board/ms7722se/ms7722se.c new file mode 100644 index 0000000..0d3d55c --- /dev/null +++ b/board/ms7722se/ms7722se.c @@ -0,0 +1,59 @@ +/* + * Copyright (C) 2007 + * Nobuhiro Iwamatsu <iwamatsu@nigauri.org> + * + * Copyright (C) 2007 + * Kenati Technologies, Inc. + * + * board/ms7722se/ms7722se.c + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <asm/io.h> +#include <asm/processor.h> + +#define LED_BASE 0xB0800000 + +int checkboard(void) +{ + puts("BOARD: Hitachi UL MS7722SE\n"); + return 0; +} + +int board_init(void) +{ + /* Setup PTXMD[1:0] for /CS6A */ + outw(inw(PXCR) & ~0xf000, PXCR); + + return 0; +} + +int dram_init (void) +{ + DECLARE_GLOBAL_DATA_PTR; + + gd->bd->bi_memstart = CFG_SDRAM_BASE; + gd->bd->bi_memsize = CFG_SDRAM_SIZE; + printf("DRAM: %dMB\n", CFG_SDRAM_SIZE / (1024 * 1024)); + return 0; +} + +void led_set_state (unsigned short value) +{ + *((volatile unsigned short *) LED_BASE) = (value & 0xFF); +} diff --git a/board/ms7722se/u-boot.lds b/board/ms7722se/u-boot.lds new file mode 100644 index 0000000..692bc62 --- /dev/null +++ b/board/ms7722se/u-boot.lds @@ -0,0 +1,105 @@ +/* + * Copyrigth (c) 2007 + * Nobuhiro Iwamatsu <iwamatsu@nigauri.org> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +OUTPUT_FORMAT("elf32-sh-linux", "elf32-sh-linux", "elf32-sh-linux") +OUTPUT_ARCH(sh) +ENTRY(_start) + +SECTIONS +{ + /* + Base address of internal SDRAM is 0x0C000000. + Although size of SDRAM can be either 16 or 32 MBytes, + we assume 16 MBytes (ie ignore upper half if the full + 32 MBytes is present). + + NOTE: This address must match with the definition of + TEXT_BASE in config.mk (in this directory). + + */ + . = 0x8C000000 + (64*1024*1024) - (256*1024); + + PROVIDE (reloc_dst = .); + + PROVIDE (_ftext = .); + PROVIDE (_fcode = .); + PROVIDE (_start = .); + + .text : + { + cpu/sh4/start.o (.text) + . = ALIGN(8192); + common/environment.o (.ppcenv) + . = ALIGN(8192); + common/environment.o (.ppcenvr) + . = ALIGN(8192); + *(.text) + . = ALIGN(4); + } =0xFF + PROVIDE (_ecode = .); + .rodata : + { + *(.rodata) + . = ALIGN(4); + } + PROVIDE (_etext = .); + + + PROVIDE (_fdata = .); + .data : + { + *(.data) + . = ALIGN(4); + } + PROVIDE (_edata = .); + + PROVIDE (_fgot = .); + .got : + { + *(.got) + . = ALIGN(4); + } + PROVIDE (_egot = .); + + PROVIDE (__u_boot_cmd_start = .); + .u_boot_cmd : + { + *(.u_boot_cmd) + . = ALIGN(4); + } + PROVIDE (__u_boot_cmd_end = .); + + PROVIDE (reloc_dst_end = .); + /* _reloc_dst_end = .; */ + + PROVIDE (bss_start = .); + PROVIDE (__bss_start = .); + .bss : + { + *(.bss) + . = ALIGN(4); + } + PROVIDE (bss_end = .); + + PROVIDE (_end = .); +} |