diff options
Diffstat (limited to 'board/mpl/vcma9')
| -rw-r--r-- | board/mpl/vcma9/cmd_vcma9.c | 4 | ||||
| -rw-r--r-- | board/mpl/vcma9/lowlevel_init.S | 142 |
2 files changed, 73 insertions, 73 deletions
diff --git a/board/mpl/vcma9/cmd_vcma9.c b/board/mpl/vcma9/cmd_vcma9.c index 90a1b08..d3629c5 100644 --- a/board/mpl/vcma9/cmd_vcma9.c +++ b/board/mpl/vcma9/cmd_vcma9.c @@ -58,8 +58,8 @@ int do_vcma9(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) if (strcmp(argv[1], "info") == 0) { print_vcma9_info(); - return 0; - } + return 0; + } #if defined(CONFIG_DRIVER_CS8900) if (strcmp(argv[1], "cs8900") == 0) { if (strcmp(argv[2], "read") == 0) { diff --git a/board/mpl/vcma9/lowlevel_init.S b/board/mpl/vcma9/lowlevel_init.S index a023353..e3af073 100644 --- a/board/mpl/vcma9/lowlevel_init.S +++ b/board/mpl/vcma9/lowlevel_init.S @@ -39,92 +39,92 @@ #define SDRAM_REG 0x2C000106 /* BWSCON */ -#define DW8 (0x0) -#define DW16 (0x1) -#define DW32 (0x2) -#define WAIT (0x1<<2) -#define UBLB (0x1<<3) +#define DW8 (0x0) +#define DW16 (0x1) +#define DW32 (0x2) +#define WAIT (0x1<<2) +#define UBLB (0x1<<3) /* BANKSIZE */ #define BURST_EN (0x1<<7) -#define B1_BWSCON (DW16) -#define B2_BWSCON (DW32) -#define B3_BWSCON (DW32) -#define B4_BWSCON (DW16 + WAIT + UBLB) -#define B5_BWSCON (DW8 + UBLB) -#define B6_BWSCON (DW32) -#define B7_BWSCON (DW32) +#define B1_BWSCON (DW16) +#define B2_BWSCON (DW32) +#define B3_BWSCON (DW32) +#define B4_BWSCON (DW16 + WAIT + UBLB) +#define B5_BWSCON (DW8 + UBLB) +#define B6_BWSCON (DW32) +#define B7_BWSCON (DW32) /* BANK0CON */ -#define B0_Tacs 0x0 /* 0clk */ -#define B0_Tcos 0x1 /* 1clk */ +#define B0_Tacs 0x0 /* 0clk */ +#define B0_Tcos 0x1 /* 1clk */ /*#define B0_Tcos 0x0 0clk */ -#define B0_Tacc 0x7 /* 14clk */ +#define B0_Tacc 0x7 /* 14clk */ /*#define B0_Tacc 0x5 8clk */ -#define B0_Tcoh 0x0 /* 0clk */ -#define B0_Tah 0x0 /* 0clk */ -#define B0_Tacp 0x0 /* page mode is not used */ -#define B0_PMC 0x0 /* page mode disabled */ +#define B0_Tcoh 0x0 /* 0clk */ +#define B0_Tah 0x0 /* 0clk */ +#define B0_Tacp 0x0 /* page mode is not used */ +#define B0_PMC 0x0 /* page mode disabled */ /* BANK1CON */ -#define B1_Tacs 0x0 /* 0clk */ -#define B1_Tcos 0x1 /* 1clk */ +#define B1_Tacs 0x0 /* 0clk */ +#define B1_Tcos 0x1 /* 1clk */ /*#define B1_Tcos 0x0 0clk */ #define B1_Tacc 0x7 /* 14clk */ /*#define B1_Tacc 0x5 8clk */ -#define B1_Tcoh 0x0 /* 0clk */ -#define B1_Tah 0x0 /* 0clk */ -#define B1_Tacp 0x0 /* page mode is not used */ -#define B1_PMC 0x0 /* page mode disabled */ - -#define B2_Tacs 0x3 /* 4clk */ -#define B2_Tcos 0x3 /* 4clk */ -#define B2_Tacc 0x7 /* 14clk */ -#define B2_Tcoh 0x3 /* 4clk */ -#define B2_Tah 0x3 /* 4clk */ -#define B2_Tacp 0x0 /* page mode is not used */ -#define B2_PMC 0x0 /* page mode disabled */ - -#define B3_Tacs 0x3 /* 4clk */ -#define B3_Tcos 0x3 /* 4clk */ -#define B3_Tacc 0x7 /* 14clk */ -#define B3_Tcoh 0x3 /* 4clk */ -#define B3_Tah 0x3 /* 4clk */ -#define B3_Tacp 0x0 /* page mode is not used */ -#define B3_PMC 0x0 /* page mode disabled */ - -#define B4_Tacs 0x3 /* 4clk */ -#define B4_Tcos 0x1 /* 1clk */ -#define B4_Tacc 0x7 /* 14clk */ -#define B4_Tcoh 0x1 /* 1clk */ -#define B4_Tah 0x0 /* 0clk */ -#define B4_Tacp 0x0 /* page mode is not used */ -#define B4_PMC 0x0 /* page mode disabled */ - -#define B5_Tacs 0x0 /* 0clk */ -#define B5_Tcos 0x3 /* 4clk */ -#define B5_Tacc 0x5 /* 8clk */ -#define B5_Tcoh 0x2 /* 2clk */ -#define B5_Tah 0x1 /* 1clk */ -#define B5_Tacp 0x0 /* page mode is not used */ -#define B5_PMC 0x0 /* page mode disabled */ - -#define B6_MT 0x3 /* SDRAM */ -#define B6_Trcd 0x1 /* 3clk */ -#define B6_SCAN 0x2 /* 10bit */ - -#define B7_MT 0x3 /* SDRAM */ -#define B7_Trcd 0x1 /* 3clk */ -#define B7_SCAN 0x2 /* 10bit */ +#define B1_Tcoh 0x0 /* 0clk */ +#define B1_Tah 0x0 /* 0clk */ +#define B1_Tacp 0x0 /* page mode is not used */ +#define B1_PMC 0x0 /* page mode disabled */ + +#define B2_Tacs 0x3 /* 4clk */ +#define B2_Tcos 0x3 /* 4clk */ +#define B2_Tacc 0x7 /* 14clk */ +#define B2_Tcoh 0x3 /* 4clk */ +#define B2_Tah 0x3 /* 4clk */ +#define B2_Tacp 0x0 /* page mode is not used */ +#define B2_PMC 0x0 /* page mode disabled */ + +#define B3_Tacs 0x3 /* 4clk */ +#define B3_Tcos 0x3 /* 4clk */ +#define B3_Tacc 0x7 /* 14clk */ +#define B3_Tcoh 0x3 /* 4clk */ +#define B3_Tah 0x3 /* 4clk */ +#define B3_Tacp 0x0 /* page mode is not used */ +#define B3_PMC 0x0 /* page mode disabled */ + +#define B4_Tacs 0x3 /* 4clk */ +#define B4_Tcos 0x1 /* 1clk */ +#define B4_Tacc 0x7 /* 14clk */ +#define B4_Tcoh 0x1 /* 1clk */ +#define B4_Tah 0x0 /* 0clk */ +#define B4_Tacp 0x0 /* page mode is not used */ +#define B4_PMC 0x0 /* page mode disabled */ + +#define B5_Tacs 0x0 /* 0clk */ +#define B5_Tcos 0x3 /* 4clk */ +#define B5_Tacc 0x5 /* 8clk */ +#define B5_Tcoh 0x2 /* 2clk */ +#define B5_Tah 0x1 /* 1clk */ +#define B5_Tacp 0x0 /* page mode is not used */ +#define B5_PMC 0x0 /* page mode disabled */ + +#define B6_MT 0x3 /* SDRAM */ +#define B6_Trcd 0x1 /* 3clk */ +#define B6_SCAN 0x2 /* 10bit */ + +#define B7_MT 0x3 /* SDRAM */ +#define B7_Trcd 0x1 /* 3clk */ +#define B7_SCAN 0x2 /* 10bit */ /* REFRESH parameter */ -#define REFEN 0x1 /* Refresh enable */ -#define TREFMD 0x0 /* CBR(CAS before RAS)/Auto refresh */ -#define Trp 0x0 /* 2clk */ -#define Trc 0x3 /* 7clk */ -#define Tchr 0x2 /* 3clk */ -#define REFCNT 1113 /* period=15.6us, HCLK=60Mhz, (2048+1-15.6*60) */ +#define REFEN 0x1 /* Refresh enable */ +#define TREFMD 0x0 /* CBR(CAS before RAS)/Auto refresh */ +#define Trp 0x0 /* 2clk */ +#define Trc 0x3 /* 7clk */ +#define Tchr 0x2 /* 3clk */ +#define REFCNT 1113 /* period=15.6us, HCLK=60Mhz, (2048+1-15.6*60) */ /**************************************/ _TEXT_BASE: |