diff options
Diffstat (limited to 'board/mpc8560ads/mpc8560ads.c')
-rw-r--r-- | board/mpc8560ads/mpc8560ads.c | 36 |
1 files changed, 15 insertions, 21 deletions
diff --git a/board/mpc8560ads/mpc8560ads.c b/board/mpc8560ads/mpc8560ads.c index 823ab0d..2fa96e0 100644 --- a/board/mpc8560ads/mpc8560ads.c +++ b/board/mpc8560ads/mpc8560ads.c @@ -1,4 +1,5 @@ /* + * Copyright 2004 Freescale Semiconductor. * (C) Copyright 2003,Motorola Inc. * Xianghua Xiao, (X.Xiao@motorola.com) * @@ -236,26 +237,11 @@ void reset_phy (void) #endif /* CONFIG_MII */ } + int checkboard (void) { - sys_info_t sysinfo; - - get_sys_info (&sysinfo); - - printf ("Board: Motorola MPC8560ADS Board\n"); - printf ("\tCPU: %lu MHz\n", sysinfo.freqProcessor / 1000000); - printf ("\tCCB: %lu MHz\n", sysinfo.freqSystemBus / 1000000); - printf ("\tDDR: %lu MHz\n", sysinfo.freqSystemBus / 2000000); - if((CFG_LBC_LCRR & 0x0f) == 2 || (CFG_LBC_LCRR & 0x0f) == 4 \ - || (CFG_LBC_LCRR & 0x0f) == 8) { - printf ("\tLBC: %lu MHz\n", sysinfo.freqSystemBus / 1000000 /(CFG_LBC_LCRR & 0x0f)); - } else { - printf("\tLBC: unknown\n"); - } - printf("\tCPM: %lu Mhz\n", sysinfo.freqSystemBus / 1000000); - printf("L1 D-cache 32KB, L1 I-cache 32KB enabled.\n"); - - return (0); + puts("Board: ADS\n"); + return 0; } @@ -272,6 +258,7 @@ long int initdram (int board_type) #if !defined(CONFIG_RAM_AS_FLASH) || defined(CONFIG_DDR_DLL) volatile ccsr_gur_t *gur= &immap->im_gur; #endif + #if defined(CONFIG_DDR_DLL) uint temp_ddrdll = 0; @@ -293,9 +280,16 @@ long int initdram (int board_type) if(sysinfo.freqSystemBus/(CFG_LBC_LCRR & 0x0f) < 66000000) { lbc->lcrr = (CFG_LBC_LCRR & 0x0fffffff)| 0x80000000; } else { -#if defined(CONFIG_MPC85xx_REV1) /* need change CLKDIV before enable DLL */ - lbc->lcrr = 0x10000004; /* default CLKDIV is 8, change it to 4 temporarily */ -#endif + uint pvr = get_pvr(); + + if (pvr == PVR_85xx_REV1) { + /* + * Need change CLKDIV before enable DLL. + * Default CLKDIV is 8, change it to 4 + * temporarily. + */ + lbc->lcrr = 0x10000004; + } lbc->lcrr = CFG_LBC_LCRR & 0x7fffffff; udelay(200); temp_lbcdll = gur->lbcdllcr; |