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-rw-r--r--board/mercury/mpq101/Makefile53
-rw-r--r--board/mercury/mpq101/law.c52
-rw-r--r--board/mercury/mpq101/mpq101.c129
-rw-r--r--board/mercury/mpq101/tlb.c82
-rw-r--r--board/mercury/mpq101/u-boot.lds132
5 files changed, 448 insertions, 0 deletions
diff --git a/board/mercury/mpq101/Makefile b/board/mercury/mpq101/Makefile
new file mode 100644
index 0000000..58bc1b3
--- /dev/null
+++ b/board/mercury/mpq101/Makefile
@@ -0,0 +1,53 @@
+#
+# Copyright 2007 Freescale Semiconductor, Inc.
+# (C) Copyright 2001-2006
+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB = $(obj)lib$(BOARD).o
+
+COBJS-y += $(BOARD).o
+COBJS-y += law.o
+COBJS-y += tlb.o
+
+SRCS := $(SOBJS:.o=.S) $(COBJS-y:.o=.c)
+OBJS := $(addprefix $(obj),$(COBJS-y))
+SOBJS := $(addprefix $(obj),$(SOBJS))
+
+$(LIB): $(obj).depend $(OBJS) $(SOBJS)
+ $(call cmd_link_o_target, $(OBJS))
+
+clean:
+ rm -f $(OBJS) $(SOBJS)
+
+distclean: clean
+ rm -f $(LIB) core *.bak .depend
+
+#########################################################################
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#########################################################################
diff --git a/board/mercury/mpq101/law.c b/board/mercury/mpq101/law.c
new file mode 100644
index 0000000..0e23a6a
--- /dev/null
+++ b/board/mercury/mpq101/law.c
@@ -0,0 +1,52 @@
+/*
+ * Copyright 2008 Freescale Semiconductor, Inc.
+ *
+ * (C) Copyright 2000
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <asm/fsl_law.h>
+#include <asm/mmu.h>
+
+/*
+ * LAW(Local Access Window) configuration:
+ *
+ * 0x0000_0000 0x1fff_ffff DDR SYS_SDRAM_SIZE
+ * 0xc000_0000 0xdfff_ffff RapidIO (set elsewhere) 512M
+ * 0xe000_0000 0xe000_ffff CCSR (set elsewhere) 1M
+ * 0xf000_0000 0xffff_ffff LBC options + FLASH 256M
+ *
+ * Notes:
+ * CCSRBAR and L2-as-SRAM don't need a configured Local Access Window.
+ * If flash is 8M at default position (last 8M), no LAW needed.
+ *
+ * LAW 0 is reserved for boot mapping
+ */
+
+struct law_entry law_table[] = {
+ SET_LAW(CONFIG_SYS_SDRAM_BASE, CONFIG_SYS_SDRAM_SIZE_LOG - 1,
+ LAW_TRGT_IF_DDR_1),
+ SET_LAW(CONFIG_SYS_LBC_OPTION_BASE_PHYS, LAW_SIZE_256M,
+ LAW_TRGT_IF_LBC)
+};
+
+int num_law_entries = ARRAY_SIZE(law_table);
diff --git a/board/mercury/mpq101/mpq101.c b/board/mercury/mpq101/mpq101.c
new file mode 100644
index 0000000..e02e87f
--- /dev/null
+++ b/board/mercury/mpq101/mpq101.c
@@ -0,0 +1,129 @@
+/*
+ * (C) Copyright 2011 Alex Dubov <oakad@yahoo.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <asm/processor.h>
+#include <asm/mmu.h>
+#include <asm/immap_85xx.h>
+#include <asm/fsl_law.h>
+#include <asm/io.h>
+#include <miiphy.h>
+#include <libfdt.h>
+#include <fdt_support.h>
+
+/*
+ * Initialize Local Bus
+ */
+void local_bus_init(void)
+{
+ fsl_lbc_t *lbc = LBC_BASE_ADDR;
+
+ out_be32(&lbc->ltesr, 0xffffffff); /* Clear LBC error interrupts */
+ out_be32(&lbc->lteir, 0xffffffff); /* Enable LBC error interrupts */
+}
+
+int checkboard(void)
+{
+ ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
+ ccsr_local_ecm_t *ecm = (void *)(CONFIG_SYS_MPC85xx_ECM_ADDR);
+
+ puts("Board: Mercury Computer Systems, Inc. MPQ-101 ");
+#ifdef CONFIG_PHYS_64BIT
+ puts("(36-bit addrmap) ");
+#endif
+ putc('\n');
+
+ /*
+ * Initialize local bus.
+ */
+ local_bus_init();
+
+ /*
+ * Hack TSEC 3 and 4 IO voltages.
+ */
+ out_be32(&gur->tsec34ioovcr, 0xe7e0); /* 1110 0111 1110 0xxx */
+
+ out_be32(&ecm->eedr, 0xffffffff); /* clear ecm errors */
+ out_be32(&ecm->eeer, 0xffffffff); /* enable ecm errors */
+ return 0;
+}
+
+phys_size_t fixed_sdram(void)
+{
+ ccsr_ddr_t *ddr = (void *)(CONFIG_SYS_MPC85xx_DDR_ADDR);
+ const char *p_mode = getenv("perf_mode");
+
+ puts("Initializing....");
+
+ out_be32(&ddr->cs0_bnds, CONFIG_SYS_DDR_CS0_BNDS);
+ out_be32(&ddr->cs0_config, CONFIG_SYS_DDR_CS0_CONFIG);
+
+ out_be32(&ddr->timing_cfg_3, CONFIG_SYS_DDR_TIMING_3);
+ out_be32(&ddr->timing_cfg_0, CONFIG_SYS_DDR_TIMING_0);
+
+ if (p_mode && !strcmp("performance", p_mode)) {
+ out_be32(&ddr->timing_cfg_1, CONFIG_SYS_DDR_TIMING_1_PERF);
+ out_be32(&ddr->timing_cfg_2, CONFIG_SYS_DDR_TIMING_2_PERF);
+ out_be32(&ddr->sdram_mode, CONFIG_SYS_DDR_MODE_1_PERF);
+ out_be32(&ddr->sdram_mode_2, CONFIG_SYS_DDR_MODE_2_PERF);
+ out_be32(&ddr->sdram_interval, CONFIG_SYS_DDR_INTERVAL_PERF);
+ } else {
+ out_be32(&ddr->timing_cfg_1, CONFIG_SYS_DDR_TIMING_1);
+ out_be32(&ddr->timing_cfg_2, CONFIG_SYS_DDR_TIMING_2);
+ out_be32(&ddr->sdram_mode, CONFIG_SYS_DDR_MODE_1);
+ out_be32(&ddr->sdram_mode_2, CONFIG_SYS_DDR_MODE_2);
+ out_be32(&ddr->sdram_interval, CONFIG_SYS_DDR_INTERVAL);
+ }
+
+ out_be32(&ddr->sdram_clk_cntl, CONFIG_SYS_DDR_CLK_CTRL);
+ out_be32(&ddr->sdram_cfg_2, CONFIG_SYS_DDR_CONTROL2);
+
+ asm("sync;isync");
+ udelay(500);
+
+ out_be32(&ddr->sdram_cfg, CONFIG_SYS_DDR_CONTROL);
+ asm("sync; isync");
+ udelay(500);
+
+ return ((phys_size_t)1) << CONFIG_SYS_SDRAM_SIZE_LOG;
+}
+
+void pci_init_board(void)
+{
+ ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
+
+ /* PCI is disabled */
+ out_be32(&gur->devdisr, in_be32(&gur->devdisr)
+ | MPC85xx_DEVDISR_PCI1
+ | MPC85xx_DEVDISR_PCI2
+ | MPC85xx_DEVDISR_PCIE);
+}
+
+
+#if defined(CONFIG_OF_BOARD_SETUP)
+
+void ft_board_setup(void *blob, bd_t *bd)
+{
+ ft_cpu_setup(blob, bd);
+}
+
+#endif
diff --git a/board/mercury/mpq101/tlb.c b/board/mercury/mpq101/tlb.c
new file mode 100644
index 0000000..fd2eaec
--- /dev/null
+++ b/board/mercury/mpq101/tlb.c
@@ -0,0 +1,82 @@
+/*
+ * (C) Copyright 2000
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <asm/mmu.h>
+
+struct fsl_e_tlb_entry tlb_table[] = {
+ /* TLB 0 - for temp stack in cache */
+ SET_TLB_ENTRY(0, CONFIG_SYS_INIT_RAM_ADDR, CONFIG_SYS_INIT_RAM_ADDR,
+ MAS3_SX|MAS3_SW|MAS3_SR, 0,
+ 0, 0, BOOKE_PAGESZ_4K, 0),
+ SET_TLB_ENTRY(0, CONFIG_SYS_INIT_RAM_ADDR + 4 * 1024,
+ CONFIG_SYS_INIT_RAM_ADDR + 4 * 1024,
+ MAS3_SX|MAS3_SW|MAS3_SR, 0,
+ 0, 0, BOOKE_PAGESZ_4K, 0),
+ SET_TLB_ENTRY(0, CONFIG_SYS_INIT_RAM_ADDR + 8 * 1024,
+ CONFIG_SYS_INIT_RAM_ADDR + 8 * 1024,
+ MAS3_SX|MAS3_SW|MAS3_SR, 0,
+ 0, 0, BOOKE_PAGESZ_4K, 0),
+ SET_TLB_ENTRY(0, CONFIG_SYS_INIT_RAM_ADDR + 12 * 1024,
+ CONFIG_SYS_INIT_RAM_ADDR + 12 * 1024,
+ MAS3_SX|MAS3_SW|MAS3_SR, 0,
+ 0, 0, BOOKE_PAGESZ_4K, 0),
+
+ /*
+ * TLB 0: 256M Non-cacheable, guarded
+ * 0xf0000000 256M LBC (FLASH included)
+ * Out of reset this entry is only 4K.
+ */
+ SET_TLB_ENTRY(1, CONFIG_SYS_LBC_OPTION_BASE,
+ CONFIG_SYS_LBC_OPTION_BASE_PHYS,
+ MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
+ 0, 0, BOOKE_PAGESZ_256M, 1),
+
+ /*
+ * TLB 1: 1M Non-cacheable, guarded
+ * 0xe000_0000 1M CCSRBAR
+ */
+ SET_TLB_ENTRY(1, CONFIG_SYS_CCSRBAR, CONFIG_SYS_CCSRBAR_PHYS,
+ MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
+ 0, 1, BOOKE_PAGESZ_1M, 1),
+
+#ifdef CONFIG_SYS_SRIO1_MEM_PHYS
+ /*
+ * TLB 2: 256M Non-cacheable, guarded
+ */
+ SET_TLB_ENTRY(1, CONFIG_SYS_SRIO1_MEM_VIRT, CONFIG_SYS_SRIO1_MEM_PHYS,
+ MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
+ 0, 2, BOOKE_PAGESZ_256M, 1),
+
+ /*
+ * TLB 3: 256M Non-cacheable, guarded
+ */
+ SET_TLB_ENTRY(1, CONFIG_SYS_SRIO1_MEM_VIRT + 0x10000000,
+ CONFIG_SYS_SRIO1_MEM_PHYS + 0x10000000,
+ MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
+ 0, 3, BOOKE_PAGESZ_256M, 1),
+
+#endif
+};
+
+int num_tlb_entries = ARRAY_SIZE(tlb_table);
diff --git a/board/mercury/mpq101/u-boot.lds b/board/mercury/mpq101/u-boot.lds
new file mode 100644
index 0000000..4f4dda5
--- /dev/null
+++ b/board/mercury/mpq101/u-boot.lds
@@ -0,0 +1,132 @@
+/*
+ * Copyright 2007-2009 Freescale Semiconductor, Inc.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef RESET_VECTOR_ADDRESS
+#define RESET_VECTOR_ADDRESS 0xfffffffc
+#endif
+
+#include <config.h>
+
+OUTPUT_ARCH(powerpc)
+
+PHDRS
+{
+ text PT_LOAD;
+ bss PT_LOAD;
+}
+
+SECTIONS
+{
+ /* Read-only sections, merged into text segment: */
+ . = + SIZEOF_HEADERS;
+ .interp : { *(.interp) }
+ /* To simplify mass deployment, environment precedes the monitor text in the
+ * same flash sector.
+ */
+ .ppcenv CONFIG_ENV_ADDR : { common/env_embedded.o (.ppcenv) }
+ .text :
+ {
+ *(.text*)
+ } :text
+ _etext = .;
+ PROVIDE (etext = .);
+ .rodata :
+ {
+ *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*)))
+ } :text
+
+ /* Read-write section, merged into data segment: */
+ . = (. + 0x00FF) & 0xFFFFFF00;
+ _erotext = .;
+ PROVIDE (erotext = .);
+ .reloc :
+ {
+ _GOT2_TABLE_ = .;
+ KEEP(*(.got2))
+ KEEP(*(.got))
+ PROVIDE(_GLOBAL_OFFSET_TABLE_ = . + 4);
+ _FIXUP_TABLE_ = .;
+ KEEP(*(.fixup))
+ }
+ __got2_entries = ((_GLOBAL_OFFSET_TABLE_ - _GOT2_TABLE_) >> 2) - 1;
+ __fixup_entries = (. - _FIXUP_TABLE_) >> 2;
+
+ .data :
+ {
+ *(.data*)
+ *(.sdata*)
+ }
+ _edata = .;
+ PROVIDE (edata = .);
+
+ . = .;
+ __u_boot_cmd_start = .;
+ .u_boot_cmd : { *(.u_boot_cmd) }
+ __u_boot_cmd_end = .;
+
+ . = .;
+ __start___ex_table = .;
+ __ex_table : { *(__ex_table) }
+ __stop___ex_table = .;
+
+ . = ALIGN(256);
+ __init_begin = .;
+ .text.init : { *(.text.init) }
+ .data.init : { *(.data.init) }
+ . = ALIGN(256);
+ __init_end = .;
+
+ .bootpg RESET_VECTOR_ADDRESS - 0xffc :
+ {
+ arch/powerpc/cpu/mpc85xx/start.o (.bootpg)
+ } :text = 0xffff
+
+ .resetvec RESET_VECTOR_ADDRESS :
+ {
+ KEEP(*(.resetvec))
+ } :text = 0xffff
+
+ . = RESET_VECTOR_ADDRESS + 0x4;
+
+ /*
+ * Make sure that the bss segment isn't linked at 0x0, otherwise its
+ * address won't be updated during relocation fixups. Note that
+ * this is a temporary fix. Code to dynamically the fixup the bss
+ * location will be added in the future. When the bss relocation
+ * fixup code is present this workaround should be removed.
+ */
+#if (RESET_VECTOR_ADDRESS == 0xfffffffc)
+ . |= 0x10;
+#endif
+
+ __bss_start = .;
+ .bss (NOLOAD) :
+ {
+ *(.sbss*)
+ *(.bss*)
+ *(COMMON)
+ } :bss
+
+ . = ALIGN(4);
+ _end = . ;
+ PROVIDE (end = .);
+}
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