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-rw-r--r--board/mcc200/Makefile18
-rw-r--r--board/mcc200/config.mk4
-rw-r--r--board/mcc200/lcd.c190
-rw-r--r--board/mcc200/mcc200.c30
4 files changed, 233 insertions, 9 deletions
diff --git a/board/mcc200/Makefile b/board/mcc200/Makefile
index 7fdc088..75808cb 100644
--- a/board/mcc200/Makefile
+++ b/board/mcc200/Makefile
@@ -23,12 +23,16 @@
include $(TOPDIR)/config.mk
-LIB = lib$(BOARD).a
+LIB = $(obj)lib$(BOARD).a
-OBJS := $(BOARD).o
+COBJS := $(BOARD).o lcd.o
-$(LIB): $(OBJS) $(SOBJS)
- $(AR) crv $@ $(OBJS)
+SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
+OBJS := $(addprefix $(obj),$(COBJS))
+SOBJS := $(addprefix $(obj),$(SOBJS))
+
+$(LIB): $(obj).depend $(OBJS)
+ $(AR) $(ARFLAGS) $@ $(OBJS)
clean:
rm -f $(SOBJS) $(OBJS)
@@ -38,9 +42,9 @@ distclean: clean
#########################################################################
-.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
- $(CC) -M $(CPPFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
--include .depend
+sinclude $(obj).depend
#########################################################################
diff --git a/board/mcc200/config.mk b/board/mcc200/config.mk
index a822559..d0f9289 100644
--- a/board/mcc200/config.mk
+++ b/board/mcc200/config.mk
@@ -22,7 +22,7 @@
#
#
-# MCC200 board:
+# MCC200, PRS200 boards:
#
# Valid values for TEXT_BASE are:
#
@@ -31,7 +31,7 @@
# 0x00100000 boot from RAM (for testing only)
#
-sinclude $(TOPDIR)/board/$(BOARDDIR)/config.tmp
+sinclude $(OBJTREE)/board/$(BOARDDIR)/config.tmp
ifndef TEXT_BASE
## Standard: boot low
diff --git a/board/mcc200/lcd.c b/board/mcc200/lcd.c
new file mode 100644
index 0000000..b262516
--- /dev/null
+++ b/board/mcc200/lcd.c
@@ -0,0 +1,190 @@
+/*
+ * (C) Copyright 2006
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <lcd.h>
+#include <mpc5xxx.h>
+
+#ifdef CONFIG_LCD
+
+#define SWAPPED_LCD
+/*
+ * The name of the device used for communication
+ * with the PSoC.
+ */
+#define PSOC_PSC MPC5XXX_PSC2
+#define PSOC_BAUD 500000UL
+
+#define RTS_ASSERT 1
+#define RTS_NEGATE 0
+#define CTS_ASSERT 1
+#define CTS_NEGATE 0
+
+/*
+ * Dimensions in pixels
+ */
+#define LCD_WIDTH 160
+#define LCD_HEIGHT 100
+
+/*
+ * Dimensions in bytes
+ */
+#define LCD_BUF_SIZE ((LCD_WIDTH*LCD_HEIGHT)>>3)
+
+#if LCD_BPP != LCD_MONOCHROME
+#error "MCC200 support only monochrome displays (1 bpp)!"
+#endif
+
+#define PSOC_RETRIES 10 /* each of PSOC_WAIT_TIME */
+#define PSOC_WAIT_TIME 10 /* usec */
+
+DECLARE_GLOBAL_DATA_PTR;
+
+/*
+ * LCD information
+ */
+vidinfo_t panel_info = {
+ LCD_WIDTH, LCD_HEIGHT, LCD_BPP
+};
+
+int lcd_line_length;
+
+int lcd_color_fg;
+int lcd_color_bg;
+
+/*
+ * Frame buffer memory information
+ */
+void *lcd_base; /* Start of framebuffer memory */
+void *lcd_console_address; /* Start of console buffer */
+
+short console_col = 0;
+short console_row = 0;
+
+/*
+ * The device we use to communicate with PSoC
+ */
+int serial_inited = 0;
+
+/*
+ * Exported functions
+ */
+void lcd_initcolregs (void);
+void lcd_ctrl_init (void *lcdbase);
+void lcd_enable (void);
+
+/*
+ * Imported functions to support the PSoC protocol
+ */
+extern int serial_init_dev (unsigned long dev_base);
+extern void serial_setrts_dev (unsigned long dev_base, int s);
+extern int serial_getcts_dev (unsigned long dev_base);
+extern void serial_putc_raw_dev(unsigned long dev_base, const char c);
+
+/*
+ * Just stubs for our driver, needed for compiling compabilty with
+ * the common LCD driver code.
+ */
+void lcd_initcolregs (void)
+{
+}
+
+void lcd_ctrl_init (void *lcdbase)
+{
+}
+
+/*
+ * Function sends the contents of the frame-buffer to the LCD
+ */
+void lcd_enable (void)
+{
+ int i, retries, fb_size;
+
+ if (!serial_inited) {
+ unsigned long baud;
+
+ baud = gd->baudrate;
+ gd->baudrate = PSOC_BAUD;
+ serial_init_dev(PSOC_PSC);
+ gd->baudrate = baud;
+ serial_setrts_dev (PSOC_PSC, RTS_ASSERT);
+ serial_inited = 1;
+ }
+
+ /*
+ * Implement PSoC communication protocol:
+ * 1. Assert RTS, wait CTS assertion
+ * 2. Transmit data
+ * 3. Negate RTS, wait CTS negation
+ */
+
+ /* 1 */
+ serial_setrts_dev (PSOC_PSC, RTS_ASSERT);
+ for (retries = PSOC_RETRIES; retries; retries--) {
+ if (serial_getcts_dev(PSOC_PSC) == CTS_ASSERT)
+ break;
+ udelay (PSOC_WAIT_TIME);
+ }
+ if (!retries) {
+ printf ("%s Error: PSoC doesn't respond on "
+ "RTS ASSERT\n", __FUNCTION__);
+ }
+
+ /* 2 */
+ fb_size = panel_info.vl_row * (panel_info.vl_col >> 3);
+
+#if !defined(SWAPPED_LCD)
+ for (i=0; i<fb_size; i++) {
+ serial_putc_raw_dev (PSOC_PSC, ((char *)lcd_base)[i]);
+ }
+#else
+ {
+ int x, y, pwidth;
+ char *p = (char *)lcd_base;
+
+ pwidth = ((panel_info.vl_col+7) >> 3);
+ for (y=0; y<panel_info.vl_row; y++) {
+ i = y * pwidth;
+ for (x=0; x<pwidth; x+=5) {
+ serial_putc_raw_dev (PSOC_PSC, (p[i+x+2]<<4 & 0xF0) | (p[i+x+3]>>4 & 0x0F));
+ serial_putc_raw_dev (PSOC_PSC, (p[i+x+3]<<4 & 0xF0) | (p[i+x+4]>>4 & 0x0F));
+ serial_putc_raw_dev (PSOC_PSC, (p[i+x+4]<<4 & 0xF0) | (p[i+x]>>4 & 0x0F));
+ serial_putc_raw_dev (PSOC_PSC, (p[i+x]<<4 & 0xF0) | (p[i+x+1]>>4 & 0x0F));
+ serial_putc_raw_dev (PSOC_PSC, (p[i+x+1]<<4 & 0xF0) | (p[i+x+2]>>4 & 0x0F));
+ }
+ }
+ }
+#endif
+
+ /* 3 */
+ serial_setrts_dev (PSOC_PSC, RTS_NEGATE);
+ for (retries = PSOC_RETRIES; retries; retries--) {
+ if (serial_getcts_dev(PSOC_PSC) == CTS_NEGATE)
+ break;
+ udelay (PSOC_WAIT_TIME);
+ }
+ if (!retries) {
+ printf ("%s Error: PSoC doesn't respond on "
+ "RTS NEGATE\n", __FUNCTION__);
+ }
+
+ return;
+}
+#endif /* CONFIG_LCD */
diff --git a/board/mcc200/mcc200.c b/board/mcc200/mcc200.c
index 167dc0f..5d74bde 100644
--- a/board/mcc200/mcc200.c
+++ b/board/mcc200/mcc200.c
@@ -27,6 +27,7 @@
#include <common.h>
#include <mpc5xxx.h>
#include <pci.h>
+#include <asm/processor.h>
/* Two MT48LC8M32B2 for 32 MB */
/* #include "mt48lc8m32b2-6-7.h" */
@@ -98,6 +99,7 @@ long int initdram (int board_type)
{
ulong dramsize = 0;
ulong dramsize2 = 0;
+ uint svr, pvr;
#ifndef CFG_RAMBOOT
ulong test1, test2;
@@ -192,17 +194,39 @@ long int initdram (int board_type)
#endif /* CFG_RAMBOOT */
+ /*
+ * On MPC5200B we need to set the special configuration delay in the
+ * DDR controller. Please refer to Freescale's AN3221 "MPC5200B SDRAM
+ * Initialization and Configuration", 3.3.1 SDelay--MBAR + 0x0190:
+ *
+ * "The SDelay should be written to a value of 0x00000004. It is
+ * required to account for changes caused by normal wafer processing
+ * parameters."
+ */
+ svr = get_svr();
+ pvr = get_pvr();
+ if ((SVR_MJREV(svr) >= 2) && (PVR_MAJ(pvr) == 1) && (PVR_MIN(pvr) == 4)) {
+ *(vu_long *)MPC5XXX_SDRAM_SDELAY = 0x04;
+ __asm__ volatile ("sync");
+ }
+
return dramsize + dramsize2;
}
int checkboard (void)
{
+#if defined(CONFIG_PRS200)
+ puts ("Board: PRS200\n");
+#else
puts ("Board: MCC200\n");
+#endif
return 0;
}
int misc_init_r (void)
{
+ ulong flash_sup_end, snum;
+
/*
* Adjust flash start and offset to detected values
*/
@@ -257,6 +281,12 @@ int misc_init_r (void)
(flash_info[0].start[0] - 1) + flash_info[0].size,
&flash_info[0]);
*(volatile int*)MPC5XXX_CS0_CFG &= ~(1 << 6);
+ printf ("Warning: Only 32 of 64 MB of Flash are accessible from U-Boot\n");
+ flash_info[0].size = 32 << 20;
+ for (snum = 0, flash_sup_end = gd->bd->bi_flashstart + (32<<20);
+ flash_info[0].start[snum] < flash_sup_end;
+ snum++);
+ flash_info[0].sector_count = snum;
}
return (0);