1 files changed, 15 insertions, 15 deletions

diff --git a/board/keymile/mgcoge/mgcoge.c b/board/keymile/mgcoge/mgcoge.c
index 31703ab..7d4d9e6 100644
--- a/board/keymile/mgcoge/mgcoge.c
+++ b/board/keymile/mgcoge/mgcoge.c
@@ -238,7 +238,7 @@ static long int try_init (volatile memctl8260_t * memctl, ulong sdmr,
 	 *  accessing the SDRAM with a single-byte transaction."
 	 *
 	 * The appropriate BRx/ORx registers have already been set when we
-	 * get here. The SDRAM can be accessed at the address CFG_SDRAM_BASE.
+	 * get here. The SDRAM can be accessed at the address CONFIG_SYS_SDRAM_BASE.
 	 */
 
 	*sdmr_ptr = sdmr | PSDMR_OP_PREA;
@@ -249,7 +249,7 @@ static long int try_init (volatile memctl8260_t * memctl, ulong sdmr,
 		*base = c;
 
 	*sdmr_ptr = sdmr | PSDMR_OP_MRW;
-	*(base + CFG_MRS_OFFS) = c;	/* setting MR on address lines */
+	*(base + CONFIG_SYS_MRS_OFFS) = c;	/* setting MR on address lines */
 
 	*sdmr_ptr = sdmr | PSDMR_OP_NORM | PSDMR_RFEN;
 	*base = c;
@@ -262,20 +262,20 @@ static long int try_init (volatile memctl8260_t * memctl, ulong sdmr,
 
 phys_size_t initdram (int board_type)
 {
-	volatile immap_t *immap = (immap_t *) CFG_IMMR;
+	volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR;
 	volatile memctl8260_t *memctl = &immap->im_memctl;
 
 	long psize;
 
-	memctl->memc_psrt = CFG_PSRT;
-	memctl->memc_mptpr = CFG_MPTPR;
+	memctl->memc_psrt = CONFIG_SYS_PSRT;
+	memctl->memc_mptpr = CONFIG_SYS_MPTPR;
 
-#ifndef CFG_RAMBOOT
+#ifndef CONFIG_SYS_RAMBOOT
 	/* 60x SDRAM setup:
 	 */
-	psize = try_init (memctl, CFG_PSDMR, CFG_OR1,
-						  (uchar *) CFG_SDRAM_BASE);
-#endif /* CFG_RAMBOOT */
+	psize = try_init (memctl, CONFIG_SYS_PSDMR, CONFIG_SYS_OR1,
+						  (uchar *) CONFIG_SYS_SDRAM_BASE);
+#endif /* CONFIG_SYS_RAMBOOT */
 
 	icache_enable ();
 
@@ -295,8 +295,8 @@ int checkboard(void)
 int board_early_init_r (void)
 {
 	/* setup the UPIOx */
-	*(char *)(CFG_PIGGY_BASE + 0x02) = 0xc0;
-	*(char *)(CFG_PIGGY_BASE + 0x03) = 0x15;
+	*(char *)(CONFIG_SYS_PIGGY_BASE + 0x02) = 0xc0;
+	*(char *)(CONFIG_SYS_PIGGY_BASE + 0x03) = 0x15;
 	return 0;
 }
 
@@ -332,12 +332,12 @@ void ft_blob_update (void *blob, bd_t *bd)
 			"err:%s\n", fdt_strerror (nodeoffset));
 	}
 	/* update Flash addr, size */
-	flash_data[2] = cpu_to_be32 (CFG_FLASH_BASE);
-	flash_data[3] = cpu_to_be32 (CFG_FLASH_SIZE);
+	flash_data[2] = cpu_to_be32 (CONFIG_SYS_FLASH_BASE);
+	flash_data[3] = cpu_to_be32 (CONFIG_SYS_FLASH_SIZE);
 	flash_data[4] = cpu_to_be32 (1);
 	flash_data[5] = cpu_to_be32 (0);
-	flash_data[6] = cpu_to_be32 (CFG_FLASH_BASE_1);
-	flash_data[7] = cpu_to_be32 (CFG_FLASH_SIZE_1);
+	flash_data[6] = cpu_to_be32 (CONFIG_SYS_FLASH_BASE_1);
+	flash_data[7] = cpu_to_be32 (CONFIG_SYS_FLASH_SIZE_1);
 	nodeoffset = fdt_path_offset (blob, "/localbus");
 	if (nodeoffset >= 0) {
 		ret = fdt_setprop (blob, nodeoffset, "ranges", flash_data,