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-rw-r--r--board/icu862/flash.c26
-rw-r--r--board/icu862/icu862.c26
-rw-r--r--board/icu862/pcmcia.c24
3 files changed, 38 insertions, 38 deletions
diff --git a/board/icu862/flash.c b/board/icu862/flash.c
index e6382f5..2afeff4 100644
--- a/board/icu862/flash.c
+++ b/board/icu862/flash.c
@@ -24,11 +24,11 @@
#include <common.h>
#include <mpc8xx.h>
-flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */
+flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS]; /* info for FLASH chips */
#if defined(CONFIG_ENV_IS_IN_FLASH)
# ifndef CONFIG_ENV_ADDR
-# define CONFIG_ENV_ADDR (CFG_FLASH_BASE + CONFIG_ENV_OFFSET)
+# define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + CONFIG_ENV_OFFSET)
# endif
# ifndef CONFIG_ENV_SIZE
# define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE
@@ -50,13 +50,13 @@ static void flash_get_offsets (ulong base, flash_info_t *info);
unsigned long flash_init (void)
{
- volatile immap_t *immap = (immap_t *)CFG_IMMR;
+ volatile immap_t *immap = (immap_t *)CONFIG_SYS_IMMR;
volatile memctl8xx_t *memctl = &immap->im_memctl;
unsigned long size_b0, size_b1;
int i;
/* Init: no FLASHes known */
- for (i=0; i < CFG_MAX_FLASH_BANKS; ++i) {
+ for (i=0; i < CONFIG_SYS_MAX_FLASH_BANKS; ++i) {
flash_info[i].flash_id = FLASH_UNKNOWN;
}
@@ -92,19 +92,19 @@ unsigned long flash_init (void)
}
/* Remap FLASH according to real size */
- memctl->memc_or0 = CFG_OR_TIMING_FLASH | (-size_b0 & OR_AM_MSK);
- memctl->memc_br0 = (CFG_FLASH_BASE & BR_BA_MSK) | BR_MS_GPCM | BR_V;
+ memctl->memc_or0 = CONFIG_SYS_OR_TIMING_FLASH | (-size_b0 & OR_AM_MSK);
+ memctl->memc_br0 = (CONFIG_SYS_FLASH_BASE & BR_BA_MSK) | BR_MS_GPCM | BR_V;
/* Re-do sizing to get full correct info */
- size_b0 = flash_get_size((vu_long *)CFG_FLASH_BASE, &flash_info[0]);
+ size_b0 = flash_get_size((vu_long *)CONFIG_SYS_FLASH_BASE, &flash_info[0]);
- flash_get_offsets (CFG_FLASH_BASE, &flash_info[0]);
+ flash_get_offsets (CONFIG_SYS_FLASH_BASE, &flash_info[0]);
-#if CFG_MONITOR_BASE >= CFG_FLASH_BASE
+#if CONFIG_SYS_MONITOR_BASE >= CONFIG_SYS_FLASH_BASE
/* monitor protection ON by default */
flash_protect(FLAG_PROTECT_SET,
- CFG_MONITOR_BASE,
- CFG_MONITOR_BASE+monitor_flash_len-1,
+ CONFIG_SYS_MONITOR_BASE,
+ CONFIG_SYS_MONITOR_BASE+monitor_flash_len-1,
&flash_info[0]);
#endif
@@ -468,7 +468,7 @@ int flash_erase (flash_info_t *info, int s_first, int s_last)
while ((addr[0] & 0xFFFFFFFF) != 0xFFFFFFFF)
#endif
{
- if ((now = get_timer(start)) > CFG_FLASH_ERASE_TOUT) {
+ if ((now = get_timer(start)) > CONFIG_SYS_FLASH_ERASE_TOUT) {
puts ("Timeout\n");
return 1;
}
@@ -606,7 +606,7 @@ static int write_word (flash_info_t *info, ulong dest, ulong data)
while ((*((vu_long *)dest) & 0x80808080) != (data & 0x80808080))
#endif
{
- if (get_timer(start) > CFG_FLASH_WRITE_TOUT) {
+ if (get_timer(start) > CONFIG_SYS_FLASH_WRITE_TOUT) {
return (1);
}
}
diff --git a/board/icu862/icu862.c b/board/icu862/icu862.c
index 18aa8bf..b99d256 100644
--- a/board/icu862/icu862.c
+++ b/board/icu862/icu862.c
@@ -96,7 +96,7 @@ static long int dram_size (long int, long int *, long int);
phys_size_t initdram (int board_type)
{
- volatile immap_t *immap = (immap_t *) CFG_IMMR;
+ volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR;
volatile memctl8xx_t *memctl = &immap->im_memctl;
long int size8, size9;
long int size_b0 = 0;
@@ -111,7 +111,7 @@ phys_size_t initdram (int board_type)
* with two SDRAM banks or four cycles every 31.2 us with one
* bank. It will be adjusted after memory sizing.
*/
- memctl->memc_mptpr = CFG_MPTPR_2BK_8K;
+ memctl->memc_mptpr = CONFIG_SYS_MPTPR_2BK_8K;
memctl->memc_mar = 0x00000088;
@@ -120,10 +120,10 @@ phys_size_t initdram (int board_type)
* preliminary address - these have to be modified after the
* SDRAM size has been determined.
*/
- memctl->memc_or1 = CFG_OR1_PRELIM;
- memctl->memc_br1 = CFG_BR1_PRELIM;
+ memctl->memc_or1 = CONFIG_SYS_OR1_PRELIM;
+ memctl->memc_br1 = CONFIG_SYS_BR1_PRELIM;
- memctl->memc_mamr = CFG_MAMR_8COL & (~(MAMR_PTAE)); /* no refresh yet */
+ memctl->memc_mamr = CONFIG_SYS_MAMR_8COL & (~(MAMR_PTAE)); /* no refresh yet */
udelay (200);
@@ -143,7 +143,7 @@ phys_size_t initdram (int board_type)
*
* try 8 column mode
*/
- size8 = dram_size (CFG_MAMR_8COL, SDRAM_BASE1_PRELIM,
+ size8 = dram_size (CONFIG_SYS_MAMR_8COL, SDRAM_BASE1_PRELIM,
SDRAM_MAX_SIZE);
udelay (1000);
@@ -151,7 +151,7 @@ phys_size_t initdram (int board_type)
/*
* try 9 column mode
*/
- size9 = dram_size (CFG_MAMR_9COL, SDRAM_BASE1_PRELIM,
+ size9 = dram_size (CONFIG_SYS_MAMR_9COL, SDRAM_BASE1_PRELIM,
SDRAM_MAX_SIZE);
if (size8 < size9) { /* leave configuration at 9 columns */
@@ -159,7 +159,7 @@ phys_size_t initdram (int board_type)
/* debug ("SDRAM Bank 0 in 9 column mode: %ld MB\n", size >> 20); */
} else { /* back to 8 columns */
size_b0 = size8;
- memctl->memc_mamr = CFG_MAMR_8COL;
+ memctl->memc_mamr = CONFIG_SYS_MAMR_8COL;
udelay (500);
/* debug ("SDRAM Bank 0 in 8 column mode: %ld MB\n", size >> 20); */
}
@@ -172,7 +172,7 @@ phys_size_t initdram (int board_type)
*/
if ((size_b0 < 0x02000000)) {
/* reduce to 15.6 us (62.4 us / quad) */
- memctl->memc_mptpr = CFG_MPTPR_2BK_4K;
+ memctl->memc_mptpr = CONFIG_SYS_MPTPR_2BK_4K;
udelay (1000);
}
@@ -180,12 +180,12 @@ phys_size_t initdram (int board_type)
* Final mapping
*/
- memctl->memc_or1 = ((-size_b0) & 0xFFFF0000) | CFG_OR_TIMING_SDRAM;
- memctl->memc_br1 = (CFG_SDRAM_BASE & BR_BA_MSK) | BR_MS_UPMA | BR_V;
+ memctl->memc_or1 = ((-size_b0) & 0xFFFF0000) | CONFIG_SYS_OR_TIMING_SDRAM;
+ memctl->memc_br1 = (CONFIG_SYS_SDRAM_BASE & BR_BA_MSK) | BR_MS_UPMA | BR_V;
/* adjust refresh rate depending on SDRAM type, one bank */
reg = memctl->memc_mptpr;
- reg >>= 1; /* reduce to CFG_MPTPR_1BK_8K / _4K */
+ reg >>= 1; /* reduce to CONFIG_SYS_MPTPR_1BK_8K / _4K */
memctl->memc_mptpr = reg;
udelay (10000);
@@ -206,7 +206,7 @@ phys_size_t initdram (int board_type)
static long int dram_size (long int mamr_value, long int *base,
long int maxsize)
{
- volatile immap_t *immap = (immap_t *) CFG_IMMR;
+ volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR;
volatile memctl8xx_t *memctl = &immap->im_memctl;
memctl->memc_mamr = mamr_value;
diff --git a/board/icu862/pcmcia.c b/board/icu862/pcmcia.c
index 20922d8..a4c0b54 100644
--- a/board/icu862/pcmcia.c
+++ b/board/icu862/pcmcia.c
@@ -22,8 +22,8 @@ static void cfg_port_B (void)
volatile cpm8xx_t *cp;
uint reg;
- immap = (immap_t *)CFG_IMMR;
- cp = (cpm8xx_t *)(&(((immap_t *)CFG_IMMR)->im_cpm));
+ immap = (immap_t *)CONFIG_SYS_IMMR;
+ cp = (cpm8xx_t *)(&(((immap_t *)CONFIG_SYS_IMMR)->im_cpm));
/*
* Configure Port B for TPS2205 PC-Card Power-Interface Switch
@@ -58,10 +58,10 @@ int pcmcia_hardware_enable(int slot)
udelay(10000);
- immap = (immap_t *)CFG_IMMR;
- sysp = (sysconf8xx_t *)(&(((immap_t *)CFG_IMMR)->im_siu_conf));
- pcmp = (pcmconf8xx_t *)(&(((immap_t *)CFG_IMMR)->im_pcmcia));
- cp = (cpm8xx_t *)(&(((immap_t *)CFG_IMMR)->im_cpm));
+ immap = (immap_t *)CONFIG_SYS_IMMR;
+ sysp = (sysconf8xx_t *)(&(((immap_t *)CONFIG_SYS_IMMR)->im_siu_conf));
+ pcmp = (pcmconf8xx_t *)(&(((immap_t *)CONFIG_SYS_IMMR)->im_pcmcia));
+ cp = (cpm8xx_t *)(&(((immap_t *)CONFIG_SYS_IMMR)->im_cpm));
/* Configure Port B for TPS2205 PC-Card Power-Interface Switch */
cfg_port_B ();
@@ -165,9 +165,9 @@ int pcmcia_hardware_disable(int slot)
debug ("hardware_disable: " PCMCIA_BOARD_MSG " Slot %c\n", 'A'+slot);
- immap = (immap_t *)CFG_IMMR;
- cp = (cpm8xx_t *)(&(((immap_t *)CFG_IMMR)->im_cpm));
- pcmp = (pcmconf8xx_t *)(&(((immap_t *)CFG_IMMR)->im_pcmcia));
+ immap = (immap_t *)CONFIG_SYS_IMMR;
+ cp = (cpm8xx_t *)(&(((immap_t *)CONFIG_SYS_IMMR)->im_cpm));
+ pcmp = (pcmconf8xx_t *)(&(((immap_t *)CONFIG_SYS_IMMR)->im_pcmcia));
/* Shut down */
cp->cp_pbdat &= ~(TPS2205_SHDN);
@@ -198,9 +198,9 @@ int pcmcia_voltage_set(int slot, int vcc, int vpp)
" Slot %c, Vcc=%d.%d, Vpp=%d.%d\n",
'A'+slot, vcc/10, vcc%10, vpp/10, vcc%10);
- immap = (immap_t *)CFG_IMMR;
- cp = (cpm8xx_t *)(&(((immap_t *)CFG_IMMR)->im_cpm));
- pcmp = (pcmconf8xx_t *)(&(((immap_t *)CFG_IMMR)->im_pcmcia));
+ immap = (immap_t *)CONFIG_SYS_IMMR;
+ cp = (cpm8xx_t *)(&(((immap_t *)CONFIG_SYS_IMMR)->im_cpm));
+ pcmp = (pcmconf8xx_t *)(&(((immap_t *)CONFIG_SYS_IMMR)->im_pcmcia));
/*
* Disable PCMCIA buffers (isolate the interface)
* and assert RESET signal
generated by cgit v1.1 at 2024-11-16 08:39:14 +0000