diff options
Diffstat (limited to 'board/gth2')
| -rw-r--r-- | board/gth2/config.mk | 1 | ||||
| -rw-r--r-- | board/gth2/ee_access.c | 82 | ||||
| -rw-r--r-- | board/gth2/ee_access.h | 2 | ||||
| -rw-r--r-- | board/gth2/ee_dev.h | 2 | ||||
| -rw-r--r-- | board/gth2/gth2.c | 18 | ||||
| -rw-r--r-- | board/gth2/lowlevel_init.S | 18 |
6 files changed, 61 insertions, 62 deletions
diff --git a/board/gth2/config.mk b/board/gth2/config.mk index 6d21ba1..2bc1338 100644 --- a/board/gth2/config.mk +++ b/board/gth2/config.mk @@ -39,4 +39,3 @@ TEXT_BASE = 0x90000000 endif endif endif - diff --git a/board/gth2/ee_access.c b/board/gth2/ee_access.c index e293139..d4798c4 100644 --- a/board/gth2/ee_access.c +++ b/board/gth2/ee_access.c @@ -8,7 +8,7 @@ For documentaion, see data sheet for DS2438, 2438.pdf By Thomas.Lange@corelatus.com 001025 - + Copyright (C) 2000-2005 Corelatus AB */ /* This program is free software; you can redistribute it and/or @@ -105,7 +105,7 @@ static u8 make_new_crc( u8 Old_crc, u8 New_value ){ /* Compute a new checksum with new byte, using previous checksum as input See DS app note 17, understanding and using cyclic redundancy checks... Also see DS2438, page 11 */ - return( crc_lookup[Old_crc ^ New_value ]); + return( crc_lookup[Old_crc ^ New_value ]); } int ee_crc_ok( u8 *Buffer, int Len, u8 Crc ){ @@ -119,16 +119,16 @@ int ee_crc_ok( u8 *Buffer, int Len, u8 Crc ){ Curr_byte++; } E_DEBUG("Calculated CRC = 0x%x, read = 0x%x\n", Curr_crc, Crc); - + if(Curr_crc == Crc){ - /* Good */ + /* Good */ return(TRUE); } printk(KERN_ERR"EE checksum error, Calculated CRC = 0x%x, read = 0x%x\n", Curr_crc, Crc); return(FALSE); } -static void +static void set_idle(void){ /* Send idle and keep start time Continous 1 is idle */ @@ -136,7 +136,7 @@ set_idle(void){ } -static int +static int do_cpu_reset(void){ /* Release reset and verify that chip responds with presence pulse */ int Retries=0; @@ -146,10 +146,10 @@ do_cpu_reset(void){ /* Send reset */ WRITE_PORT(0); udelay(RESET_LOW_TIME); - + /* Release reset */ WRITE_PORT(1); - + /* Wait for EEPROM to drive output */ udelay(PRESENCE_TIMEOUT); if(!READ_PORT){ @@ -166,17 +166,17 @@ do_cpu_reset(void){ } printk(KERN_ERR"eeprom did not respond when releasing reset\n"); - + /* Make sure chip releases pin */ udelay(PRESENCE_LOW_TIME); /* Set to idle again */ set_idle(); - + return(-EIO); } -static u8 +static u8 read_cpu_byte(void){ /* Read a single byte from EEPROM Read LSb first */ @@ -186,36 +186,36 @@ read_cpu_byte(void){ u32 Flags; E_DEBUG("Reading byte\n"); - + for(i=0;i<8;i++){ /* Small delay between pulses */ udelay(1); -#ifdef __KERNEL__ - /* Disable irq */ +#ifdef __KERNEL__ + /* Disable irq */ save_flags(Flags); cli(); -#endif +#endif /* Pull down pin short time to start read See page 26 in data sheet */ - + WRITE_PORT(0); udelay(READ_LOW); WRITE_PORT(1); - + /* Wait for chip to drive pin */ udelay(READ_TIMEOUT); - + Value = READ_PORT; if(Value) Value=1; #ifdef __KERNEL__ - /* Enable irq */ + /* Enable irq */ restore_flags(Flags); #endif - + /* Wait for chip to release pin */ udelay(TOTAL_READ_LOW-READ_TIMEOUT); @@ -230,30 +230,30 @@ read_cpu_byte(void){ return(Result); } -static void +static void write_cpu_byte(u8 Byte){ /* Write a single byte to EEPROM Write LSb first */ int i; int Value; u32 Flags; - + E_DEBUG("Writing byte 0x%x\n",Byte); - + for(i=0;i<8;i++){ /* Small delay between pulses */ udelay(1); Value = Byte&1; - + #ifdef __KERNEL__ - /* Disable irq */ + /* Disable irq */ save_flags(Flags); cli(); -#endif +#endif /* Pull down pin short time for a 1, long time for a 0 See page 26 in data sheet */ - + WRITE_PORT(0); if(Value){ /* Write a 1 */ @@ -267,54 +267,54 @@ write_cpu_byte(u8 Byte){ WRITE_PORT(1); #ifdef __KERNEL__ - /* Enable irq */ + /* Enable irq */ restore_flags(Flags); #endif if(Value) /* Wait for chip to read the 1 */ udelay(TOTAL_WRITE_LOW-WRITE_1_LOW); - + /* E_DEBUG("Wrote %d\n",Value); */ Byte>>=1; } } int ee_do_cpu_command( u8 *Tx, int Tx_len, u8 *Rx, int Rx_len, int Send_skip ){ - /* Execute this command string, including + /* Execute this command string, including giving reset and setting to idle after command - if Rx_len is set, we read out data from EEPROM */ + if Rx_len is set, we read out data from EEPROM */ int i; E_DEBUG("Command, Tx_len %d, Rx_len %d\n", Tx_len, Rx_len ); - + if(do_cpu_reset()){ /* Failed! */ return(-EIO); } if(Send_skip) - /* Always send SKIP_ROM first to tell chip we are sending a command, + /* Always send SKIP_ROM first to tell chip we are sending a command, except when we read out rom data for chip */ write_cpu_byte(SKIP_ROM); - + /* Always have Tx data */ for(i=0;i<Tx_len;i++){ write_cpu_byte(Tx[i]); } - + if(Rx_len){ for(i=0;i<Rx_len;i++){ Rx[i]=read_cpu_byte(); } } - + set_idle(); E_DEBUG("Command done\n"); return(0); -} +} int ee_init_cpu_data(void){ int i; @@ -323,7 +323,7 @@ int ee_init_cpu_data(void){ /* Leave it floting since altera is driving the same pin */ set_idle(); - /* Copy all User EEPROM data to scratchpad */ + /* Copy all User EEPROM data to scratchpad */ for(i=0;i<USER_PAGES;i++){ Tx[0]=RECALL_MEMORY; Tx[1]=EE_USER_PAGE_0+i; @@ -332,16 +332,16 @@ int ee_init_cpu_data(void){ /* Make sure chip doesnt store measurements in NVRAM */ Tx[0]=WRITE_SCRATCHPAD; - Tx[1]=0; /* Page */ + Tx[1]=0; /* Page */ Tx[2]=9; if(ee_do_cpu_command(Tx,3,NULL,0,TRUE)) return(-EIO); Tx[0]=COPY_SCRATCHPAD; if(ee_do_cpu_command(Tx,2,NULL,0,TRUE)) return(-EIO); - + for(i=0;i<10;i++){ udelay(1000); } - + return(0); } diff --git a/board/gth2/ee_access.h b/board/gth2/ee_access.h index c21730e..926199d 100644 --- a/board/gth2/ee_access.h +++ b/board/gth2/ee_access.h @@ -21,7 +21,7 @@ int ee_crc_ok( u8 *Buffer, int Len, u8 Crc ); #define EE_BUSY 0x40000000 #define EE_ERROR 0x20000000 -/* Commands */ +/* Commands */ #define EE_CMD_NOP 0 #define EE_CMD_INIT_RES 1 #define EE_CMD_WR_BYTE 2 diff --git a/board/gth2/ee_dev.h b/board/gth2/ee_dev.h index acc3418..89ef2f8 100644 --- a/board/gth2/ee_dev.h +++ b/board/gth2/ee_dev.h @@ -21,7 +21,7 @@ #ifndef INCeedevh #define INCeedevh -#define E_DEBUG(fmt,args...) if( Debug ) printk(KERN_DEBUG"EE: " fmt, ##args) +#define E_DEBUG(fmt,args...) if( Debug ) printk(KERN_DEBUG"EE: " fmt, ##args) /* MIPS */ #define WRITE_PORT(Value) write_gpio_data(Value) diff --git a/board/gth2/gth2.c b/board/gth2/gth2.c index 77fc5b4..ffeaf58 100644 --- a/board/gth2/gth2.c +++ b/board/gth2/gth2.c @@ -61,13 +61,13 @@ void init_log_serial(void){ u32 *serial_log_offsetp = (u32*)SERIAL_LOG_BUFFER; /* Copy buffer from last run */ - memcpy(serial_log_buffer + 4096, - serial_log_buffer, + memcpy(serial_log_buffer + 4096, + serial_log_buffer, 4096); memset(serial_log_buffer, 0, 4096); - *serial_log_offsetp = 4; + *serial_log_offsetp = 4; } @@ -118,7 +118,7 @@ void set_ledcard(u32 value){ udelay(1); *sys_outputclr = GPIO_LEDCLK; udelay(1); - + value<<=1; } /* Data is enable output */ @@ -228,7 +228,7 @@ static void write_bootdata (volatile u16 * addr, u8 System, u8 Count) printf ("Invalid boot count %u, setting 1\n", Count); Count = 1; } - + printf ("Boot attempt %d\n", Count); data = (System << 8) | Count; @@ -241,9 +241,9 @@ static void write_bootdata (volatile u16 * addr, u8 System, u8 Count) } static int random_system(void){ - /* EEPROM read failed. Just try to choose one + /* EEPROM read failed. Just try to choose one system release and hope it works */ - + /* FIXME */ return(SYSTEM_BOOT); } @@ -320,8 +320,8 @@ static void check_boot_tries (void) data = *addr; system = data >> 8; count = data & 0xFF; - if ((system != SYSTEM_BOOT) & - (system != SYSTEM2_BOOT) & + if ((system != SYSTEM_BOOT) & + (system != SYSTEM2_BOOT) & (system != FAILSAFE_BOOT)) { printf ("*** Wrong system %d\n", system); system = FAILSAFE_BOOT; diff --git a/board/gth2/lowlevel_init.S b/board/gth2/lowlevel_init.S index 62e3657..983ff70 100644 --- a/board/gth2/lowlevel_init.S +++ b/board/gth2/lowlevel_init.S @@ -197,11 +197,11 @@ noCacheJump: /* RCE2 CP Altera */ li t0, MEM_STCFG2 - li t1, 0x00000280 /* BE, EW */ + li t1, 0x00000280 /* BE, EW */ sw t1, 0(t0) li t0, MEM_STTIME2 - li t1, 0x0303000c + li t1, 0x0303000c sw t1, 0(t0) li t0, MEM_STADDR2 @@ -210,11 +210,11 @@ noCacheJump: /* RCE3 DP Altera */ li t0, MEM_STCFG3 - li t1, 0x00000280 /* BE, EW */ + li t1, 0x00000280 /* BE, EW */ sw t1, 0(t0) li t0, MEM_STTIME3 - li t1, 0x0303000c + li t1, 0x0303000c sw t1, 0(t0) li t0, MEM_STADDR3 @@ -428,14 +428,14 @@ mt0: sw t0, 0(t0) li t0, 0x80000000 li t1, 0xFFF000 /* 64 MB */ mt1: lw t2, 0(t0) - bne t0, t2, memhang + bne t0, t2, memhang add t1, -1 add t0, 4 bne t1, zero, mt1 nop nop .globl clearmem -clearmem: +clearmem: /* Clear memory */ li t0, 0x80000000 li t1, 0xFFF000 /* 64 MB */ @@ -445,10 +445,10 @@ mtc: sw zero, 0(t0) bne t1, zero, mtc nop nop -memtestend: +memtestend: j ra nop - -memhang: + +memhang: b memhang nop |