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-rw-r--r--board/gth2/flash.c2
-rw-r--r--board/gth2/gth2.c10
-rw-r--r--board/gth2/lowlevel_init.S2
3 files changed, 7 insertions, 7 deletions
diff --git a/board/gth2/flash.c b/board/gth2/flash.c
index f96edff..1b3c43c 100644
--- a/board/gth2/flash.c
+++ b/board/gth2/flash.c
@@ -23,7 +23,7 @@
#include <common.h>
-flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */
+flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS]; /* info for FLASH chips */
/*-----------------------------------------------------------------------
* flash_init()
diff --git a/board/gth2/gth2.c b/board/gth2/gth2.c
index cea65c6..59873d5 100644
--- a/board/gth2/gth2.c
+++ b/board/gth2/gth2.c
@@ -154,19 +154,19 @@ int checkboard (void)
We need to map it into a 32 bit addresses */
write_one_tlb(20, /* index */
0x01ffe000, /* Pagemask, 16 MB pages */
- CFG_PCMCIA_IO_BASE, /* Hi */
+ CONFIG_SYS_PCMCIA_IO_BASE, /* Hi */
0x3C000017, /* Lo0 */
0x3C200017); /* Lo1 */
write_one_tlb(21, /* index */
0x01ffe000, /* Pagemask, 16 MB pages */
- CFG_PCMCIA_ATTR_BASE, /* Hi */
+ CONFIG_SYS_PCMCIA_ATTR_BASE, /* Hi */
0x3D000017, /* Lo0 */
0x3D200017); /* Lo1 */
write_one_tlb(22, /* index */
0x01ffe000, /* Pagemask, 16 MB pages */
- CFG_PCMCIA_MEM_ADDR, /* Hi */
+ CONFIG_SYS_PCMCIA_MEM_ADDR, /* Hi */
0x3E000017, /* Lo0 */
0x3E200017); /* Lo1 */
@@ -209,7 +209,7 @@ do \
static void write_bootdata (volatile u16 * addr, u8 System, u8 Count)
{
u16 data;
- volatile u16 *flash = (u16 *) (CFG_FLASH_BASE);
+ volatile u16 *flash = (u16 *) (CONFIG_SYS_FLASH_BASE);
switch(System){
case FAILSAFE_BOOT:
@@ -302,7 +302,7 @@ static void check_boot_tries (void)
u8 system = FAILSAFE_BOOT;
u8 count;
- addr = (u16 *) (CFG_FLASH_BASE + BOOTDATA_OFFSET);
+ addr = (u16 *) (CONFIG_SYS_FLASH_BASE + BOOTDATA_OFFSET);
if (*addr == 0xFFFF) {
printf ("*** No bootdata exists. ***\n");
diff --git a/board/gth2/lowlevel_init.S b/board/gth2/lowlevel_init.S
index 4c4f0eb..bc31c00 100644
--- a/board/gth2/lowlevel_init.S
+++ b/board/gth2/lowlevel_init.S
@@ -6,7 +6,7 @@
#include <asm/mipsregs.h>
#define CP0_Config0 $16
-#define MEM_1MS ((CFG_MHZ) * 1000)
+#define MEM_1MS ((CONFIG_SYS_MHZ) * 1000)
#define GPIO_RJ1LY (1<<22)
#define GPIO_CFRESET (1<<10)