diff options
Diffstat (limited to 'board/freescale')
102 files changed, 1674 insertions, 324 deletions
diff --git a/board/freescale/b4860qds/Kconfig b/board/freescale/b4860qds/Kconfig index c5321d6..c7aab75 100644 --- a/board/freescale/b4860qds/Kconfig +++ b/board/freescale/b4860qds/Kconfig @@ -1,15 +1,12 @@ if TARGET_B4860QDS config SYS_BOARD - string default "b4860qds" config SYS_VENDOR - string default "freescale" config SYS_CONFIG_NAME - string default "B4860QDS" endif diff --git a/board/freescale/bsc9131rdb/Kconfig b/board/freescale/bsc9131rdb/Kconfig index 6099d4d..dd9f765 100644 --- a/board/freescale/bsc9131rdb/Kconfig +++ b/board/freescale/bsc9131rdb/Kconfig @@ -1,15 +1,12 @@ if TARGET_BSC9131RDB config SYS_BOARD - string default "bsc9131rdb" config SYS_VENDOR - string default "freescale" config SYS_CONFIG_NAME - string default "BSC9131RDB" endif diff --git a/board/freescale/bsc9132qds/Kconfig b/board/freescale/bsc9132qds/Kconfig index 955069b..db3a1f1 100644 --- a/board/freescale/bsc9132qds/Kconfig +++ b/board/freescale/bsc9132qds/Kconfig @@ -1,15 +1,12 @@ if TARGET_BSC9132QDS config SYS_BOARD - string default "bsc9132qds" config SYS_VENDOR - string default "freescale" config SYS_CONFIG_NAME - string default "BSC9132QDS" endif diff --git a/board/freescale/c29xpcie/Kconfig b/board/freescale/c29xpcie/Kconfig index be9c237..17369b8 100644 --- a/board/freescale/c29xpcie/Kconfig +++ b/board/freescale/c29xpcie/Kconfig @@ -1,15 +1,12 @@ if TARGET_C29XPCIE config SYS_BOARD - string default "c29xpcie" config SYS_VENDOR - string default "freescale" config SYS_CONFIG_NAME - string default "C29XPCIE" endif diff --git a/board/freescale/common/Makefile b/board/freescale/common/Makefile index 50d7731..32b5a3b 100644 --- a/board/freescale/common/Makefile +++ b/board/freescale/common/Makefile @@ -36,6 +36,8 @@ endif obj-$(CONFIG_FSL_DIU_CH7301) += diu_ch7301.o +obj-$(CONFIG_FSL_DCU_SII9022A) += dcu_sii9022a.o + obj-$(CONFIG_MPC8541CDS) += cds_pci_ft.o obj-$(CONFIG_MPC8548CDS) += cds_pci_ft.o obj-$(CONFIG_MPC8555CDS) += cds_pci_ft.o diff --git a/board/freescale/common/dcu_sii9022a.c b/board/freescale/common/dcu_sii9022a.c new file mode 100644 index 0000000..2da627e --- /dev/null +++ b/board/freescale/common/dcu_sii9022a.c @@ -0,0 +1,153 @@ +/* + * Copyright 2014 Freescale Semiconductor, Inc. + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <asm/io.h> +#include <common.h> +#include <fsl_dcu_fb.h> +#include <i2c.h> +#include <linux/fb.h> + +#define PIXEL_CLK_LSB_REG 0x00 +#define PIXEL_CLK_MSB_REG 0x01 +#define VERT_FREQ_LSB_REG 0x02 +#define VERT_FREQ_MSB_REG 0x03 +#define TOTAL_PIXELS_LSB_REG 0x04 +#define TOTAL_PIXELS_MSB_REG 0x05 +#define TOTAL_LINES_LSB_REG 0x06 +#define TOTAL_LINES_MSB_REG 0x07 +#define TPI_INBUS_FMT_REG 0x08 +#define TPI_INPUT_FMT_REG 0x09 +#define TPI_OUTPUT_FMT_REG 0x0A +#define TPI_SYS_CTRL_REG 0x1A +#define TPI_PWR_STAT_REG 0x1E +#define TPI_AUDIO_HANDING_REG 0x25 +#define TPI_AUDIO_INTF_REG 0x26 +#define TPI_AUDIO_FREQ_REG 0x27 +#define TPI_SET_PAGE_REG 0xBC +#define TPI_SET_OFFSET_REG 0xBD +#define TPI_RW_ACCESS_REG 0xBE +#define TPI_TRANS_MODE_REG 0xC7 + +#define TPI_INBUS_CLOCK_RATIO_1 (1 << 6) +#define TPI_INBUS_FULL_PIXEL_WIDE (1 << 5) +#define TPI_INBUS_RISING_EDGE (1 << 4) +#define TPI_INPUT_CLR_DEPTH_8BIT (0 << 6) +#define TPI_INPUT_VRANGE_EXPAN_AUTO (0 << 2) +#define TPI_INPUT_CLR_RGB (0 << 0) +#define TPI_OUTPUT_CLR_DEPTH_8BIT (0 << 6) +#define TPI_OUTPUT_VRANGE_COMPRE_AUTO (0 << 2) +#define TPI_OUTPUT_CLR_HDMI_RGB (0 << 0) +#define TPI_SYS_TMDS_OUTPUT (0 << 4) +#define TPI_SYS_AV_NORAML (0 << 3) +#define TPI_SYS_AV_MUTE (1 << 3) +#define TPI_SYS_DVI_MODE (0 << 0) +#define TPI_SYS_HDMI_MODE (1 << 0) +#define TPI_PWR_STAT_MASK (3 << 0) +#define TPI_PWR_STAT_D0 (0 << 0) +#define TPI_AUDIO_PASS_BASIC (0 << 0) +#define TPI_AUDIO_INTF_I2S (2 << 6) +#define TPI_AUDIO_INTF_NORMAL (0 << 4) +#define TPI_AUDIO_TYPE_PCM (1 << 0) +#define TPI_AUDIO_SAMP_SIZE_16BIT (1 << 6) +#define TPI_AUDIO_SAMP_FREQ_44K (2 << 3) +#define TPI_SET_PAGE_SII9022A 0x01 +#define TPI_SET_OFFSET_SII9022A 0x82 +#define TPI_RW_EN_SRC_TERMIN (1 << 0) +#define TPI_TRANS_MODE_ENABLE (0 << 7) + +/* Programming of Silicon SIi9022a HDMI Transmitter */ +int dcu_set_dvi_encoder(struct fb_videomode *videomode) +{ + u8 temp; + u16 temp1, temp2; + u32 temp3; + + i2c_set_bus_num(CONFIG_SYS_I2C_DVI_BUS_NUM); + + /* Enable TPI transmitter mode */ + temp = TPI_TRANS_MODE_ENABLE; + i2c_write(CONFIG_SYS_I2C_DVI_ADDR, TPI_TRANS_MODE_REG, 1, &temp, 1); + + /* Enter into D0 state, full operation */ + i2c_read(CONFIG_SYS_I2C_DVI_ADDR, TPI_PWR_STAT_REG, 1, &temp, 1); + temp &= ~TPI_PWR_STAT_MASK; + temp |= TPI_PWR_STAT_D0; + i2c_write(CONFIG_SYS_I2C_DVI_ADDR, TPI_PWR_STAT_REG, 1, &temp, 1); + + /* Enable source termination */ + temp = TPI_SET_PAGE_SII9022A; + i2c_write(CONFIG_SYS_I2C_DVI_ADDR, TPI_SET_PAGE_REG, 1, &temp, 1); + temp = TPI_SET_OFFSET_SII9022A; + i2c_write(CONFIG_SYS_I2C_DVI_ADDR, TPI_SET_OFFSET_REG, 1, &temp, 1); + + i2c_read(CONFIG_SYS_I2C_DVI_ADDR, TPI_RW_ACCESS_REG, 1, &temp, 1); + temp |= TPI_RW_EN_SRC_TERMIN; + i2c_write(CONFIG_SYS_I2C_DVI_ADDR, TPI_RW_ACCESS_REG, 1, &temp, 1); + + /* Set TPI system control */ + temp = TPI_SYS_TMDS_OUTPUT | TPI_SYS_AV_NORAML | TPI_SYS_DVI_MODE; + i2c_write(CONFIG_SYS_I2C_DVI_ADDR, TPI_SYS_CTRL_REG, 1, &temp, 1); + + /* Set pixel clock */ + temp1 = PICOS2KHZ(videomode->pixclock) / 10; + temp = (u8)(temp1 & 0xFF); + i2c_write(CONFIG_SYS_I2C_DVI_ADDR, PIXEL_CLK_LSB_REG, 1, &temp, 1); + temp = (u8)(temp1 >> 8); + i2c_write(CONFIG_SYS_I2C_DVI_ADDR, PIXEL_CLK_MSB_REG, 1, &temp, 1); + + /* Set total pixels per line */ + temp1 = videomode->hsync_len + videomode->left_margin + + videomode->xres + videomode->right_margin; + temp = (u8)(temp1 & 0xFF); + i2c_write(CONFIG_SYS_I2C_DVI_ADDR, TOTAL_PIXELS_LSB_REG, 1, &temp, 1); + temp = (u8)(temp1 >> 8); + i2c_write(CONFIG_SYS_I2C_DVI_ADDR, TOTAL_PIXELS_MSB_REG, 1, &temp, 1); + + /* Set total lines */ + temp2 = videomode->vsync_len + videomode->upper_margin + + videomode->yres + videomode->lower_margin; + temp = (u8)(temp2 & 0xFF); + i2c_write(CONFIG_SYS_I2C_DVI_ADDR, TOTAL_LINES_LSB_REG, 1, &temp, 1); + temp = (u8)(temp2 >> 8); + i2c_write(CONFIG_SYS_I2C_DVI_ADDR, TOTAL_LINES_MSB_REG, 1, &temp, 1); + + /* Set vertical frequency in Hz */ + temp3 = temp1 * temp2; + temp3 = (PICOS2KHZ(videomode->pixclock) * 1000) / temp3; + temp1 = (u16)temp3 * 100; + temp = (u8)(temp1 & 0xFF); + i2c_write(CONFIG_SYS_I2C_DVI_ADDR, VERT_FREQ_LSB_REG, 1, &temp, 1); + temp = (u8)(temp1 >> 8); + i2c_write(CONFIG_SYS_I2C_DVI_ADDR, VERT_FREQ_MSB_REG, 1, &temp, 1); + + /* Set TPI input bus and pixel repetition data */ + temp = TPI_INBUS_CLOCK_RATIO_1 | TPI_INBUS_FULL_PIXEL_WIDE | + TPI_INBUS_RISING_EDGE; + i2c_write(CONFIG_SYS_I2C_DVI_ADDR, TPI_INBUS_FMT_REG, 1, &temp, 1); + + /* Set TPI AVI Input format data */ + temp = TPI_INPUT_CLR_DEPTH_8BIT | TPI_INPUT_VRANGE_EXPAN_AUTO | + TPI_INPUT_CLR_RGB; + i2c_write(CONFIG_SYS_I2C_DVI_ADDR, TPI_INPUT_FMT_REG, 1, &temp, 1); + + /* Set TPI AVI Output format data */ + temp = TPI_OUTPUT_CLR_DEPTH_8BIT | TPI_OUTPUT_VRANGE_COMPRE_AUTO | + TPI_OUTPUT_CLR_HDMI_RGB; + i2c_write(CONFIG_SYS_I2C_DVI_ADDR, TPI_OUTPUT_FMT_REG, 1, &temp, 1); + + /* Set TPI audio configuration write data */ + temp = TPI_AUDIO_PASS_BASIC; + i2c_write(CONFIG_SYS_I2C_DVI_ADDR, TPI_AUDIO_HANDING_REG, 1, &temp, 1); + + temp = TPI_AUDIO_INTF_I2S | TPI_AUDIO_INTF_NORMAL | + TPI_AUDIO_TYPE_PCM; + i2c_write(CONFIG_SYS_I2C_DVI_ADDR, TPI_AUDIO_INTF_REG, 1, &temp, 1); + + temp = TPI_AUDIO_SAMP_SIZE_16BIT | TPI_AUDIO_SAMP_FREQ_44K; + i2c_write(CONFIG_SYS_I2C_DVI_ADDR, TPI_AUDIO_FREQ_REG, 1, &temp, 1); + + return 0; +} diff --git a/board/freescale/common/dcu_sii9022a.h b/board/freescale/common/dcu_sii9022a.h new file mode 100644 index 0000000..de76733 --- /dev/null +++ b/board/freescale/common/dcu_sii9022a.h @@ -0,0 +1,13 @@ +/* + * Copyright 2014 Freescale Semiconductor, Inc. + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __DCU_HDMI_SII9022A__ +#define __DCU_HDMI_SII9022A__ + +/* Programming of Silicon SII9022A connector HDMI Transmitter*/ +int dcu_set_dvi_encoder(struct fb_videomode *videomode); + +#endif diff --git a/board/freescale/corenet_ds/Kconfig b/board/freescale/corenet_ds/Kconfig index 8c3bd9c..433f539 100644 --- a/board/freescale/corenet_ds/Kconfig +++ b/board/freescale/corenet_ds/Kconfig @@ -1,15 +1,12 @@ if TARGET_P3041DS config SYS_BOARD - string default "corenet_ds" config SYS_VENDOR - string default "freescale" config SYS_CONFIG_NAME - string default "P3041DS" endif @@ -17,15 +14,12 @@ endif if TARGET_P4080DS config SYS_BOARD - string default "corenet_ds" config SYS_VENDOR - string default "freescale" config SYS_CONFIG_NAME - string default "P4080DS" endif @@ -33,15 +27,12 @@ endif if TARGET_P5020DS config SYS_BOARD - string default "corenet_ds" config SYS_VENDOR - string default "freescale" config SYS_CONFIG_NAME - string default "P5020DS" endif @@ -49,15 +40,12 @@ endif if TARGET_P5040DS config SYS_BOARD - string default "corenet_ds" config SYS_VENDOR - string default "freescale" config SYS_CONFIG_NAME - string default "P5040DS" endif diff --git a/board/freescale/ls1021aqds/Kconfig b/board/freescale/ls1021aqds/Kconfig new file mode 100644 index 0000000..3cee468 --- /dev/null +++ b/board/freescale/ls1021aqds/Kconfig @@ -0,0 +1,18 @@ +if TARGET_LS1021AQDS + +config SYS_CPU + default "armv7" + +config SYS_BOARD + default "ls1021aqds" + +config SYS_VENDOR + default "freescale" + +config SYS_SOC + default "ls102xa" + +config SYS_CONFIG_NAME + default "ls1021aqds" + +endif diff --git a/board/freescale/ls1021aqds/MAINTAINERS b/board/freescale/ls1021aqds/MAINTAINERS new file mode 100644 index 0000000..021d82b --- /dev/null +++ b/board/freescale/ls1021aqds/MAINTAINERS @@ -0,0 +1,6 @@ +LS1021AQDS BOARD +M: Alison Wang <alison.wang@freescale.com> +S: Maintained +F: board/freescale/ls1021aqds/ +F: include/configs/ls1021aqds.h +F: configs/ls1021aqds_nor_defconfig diff --git a/board/freescale/ls1021aqds/Makefile b/board/freescale/ls1021aqds/Makefile new file mode 100644 index 0000000..3b6903c --- /dev/null +++ b/board/freescale/ls1021aqds/Makefile @@ -0,0 +1,9 @@ +# +# Copyright 2014 Freescale Semiconductor, Inc. +# +# SPDX-License-Identifier: GPL-2.0+ +# + +obj-y += ls1021aqds.o +obj-y += ddr.o +obj-y += eth.o diff --git a/board/freescale/ls1021aqds/README b/board/freescale/ls1021aqds/README new file mode 100644 index 0000000..c561776 --- /dev/null +++ b/board/freescale/ls1021aqds/README @@ -0,0 +1,112 @@ +Overview +-------- +The LS1021AQDS is a Freescale reference board that hosts the LS1021A SoC. + +LS1021A SoC Overview +------------------ +The QorIQ LS1 family, which includes the LS1021A communications processor, +is built on Layerscape architecture, the industry's first software-aware, +core-agnostic networking architecture to offer unprecedented efficiency +and scale. + +A member of the value-performance tier, the QorIQ LS1021A processor provides +extensive integration and power efficiency for fanless, small form factor +enterprise networking applications. Incorporating dual ARM Cortex-A7 cores +running up to 1.0 GHz, the LS1021A processor delivers pre-silicon CoreMark +performance of over 6,000, as well as virtualization support, advanced +security features and the broadest array of high-speed interconnects and +optimized peripheral features ever offered in a sub-3 W processor. + +The QorIQ LS1021A processor features an integrated LCD controller, +CAN controller for implementing industrial protocols, DDR3L/4 running +up to 1600 MHz, integrated security engine and QUICC Engine, and ECC +protection on both L1 and L2 caches. The LS1021A processor is pin- and +software-compatible with the QorIQ LS1020A and LS1022A processors. + +The LS1021A SoC includes the following function and features: + + - ARM Cortex-A7 MPCore compliant with ARMv7-A architecture + - Dual high-preformance ARM Cortex-A7 cores, each core includes: + - 32 Kbyte L1 Instruction Cache and Data Cache for each core (ECC protection) + - 512 Kbyte shared coherent L2 Cache (with ECC protection) + - NEON Co-processor (per core) + - 40-bit physical addressing + - Vector floating-point support + - ARM Core-Link CCI-400 Cache Coherent Interconnect + - One DDR3L/DDR4 SDRAM memory controller with x8/x16/x32-bit configuration + supporting speeds up to 1600Mtps + - ECC and interleaving support + - VeTSEC Ethernet complex + - Up to 3x virtualized 10/100/1000 Ethernet controllers + - MII, RMII, RGMII, and SGMII support + - QoS, lossless flow control, and IEEE 1588 support + - 4-lane 6GHz SerDes + - High speed interconnect (4 SerDes lanes with are muxed for these protocol) + - Two PCI Express Gen2 controllers running at up to 5 GHz + - One Serial ATA 3.0 supporting 6 GT/s operation + - Two SGMII interfaces supporting 1000 Mbps + - Additional peripheral interfaces + - One high-speed USB 3.0 controller with integrated PHY and one high-speed + USB 2.00 controller with ULPI + - Integrated flash controller (IFC) with 16-bit interface + - Quad SPI NOR Flash + - One enhanced Secure digital host controller + - Display controller unit (DCU) 24-bit RGB (12-bit DDR pin interface) + - Ten UARTs comprised of two 16550 compliant DUARTs, and six low power + UARTs + - Three I2C controllers + - Eight FlexTimers four supporting PWM and four FlexCAN ports + - Four GPIO controllers supporting up to 109 general purpose I/O signals + - Integrated advanced audio block: + - Four synchronous audio interfaces (SAI) + - Sony/Philips Digital Interconnect Format (SPDIF) + - Asynchronous Sample Rate Converter (ASRC) + - Hardware based crypto offload engine + - IPSec forwarding at up to 1Gbps + - QorIQ Trust Architecture, Secure Boot, and ARM TrustZone supported + - Public key hardware accelerator + - True Random Number Generator (NIST Certified) + - Advanced Encryption Standard Accelerators (AESA) + - Data Encryption Standard Accelerators + - QUICC Engine ULite block + - Two universal communication controllers (TDM and HDLC) supporting 64 + multichannels, each running at 64 Kbps + - Support for 256 channels of HDLC + - QorIQ TrustArchitecture with Secure Boot, as well as ARM TrustZone supported + +LS1021AQDS board Overview +------------------------- + - DDR Controller + - Supports rates of up to 1600 MHz data-rate + - Supports one DDR3LP UDIMM, of single-, dual- types. + - IFC/Local Bus + - NAND flash: 512M 8-bit NAND flash + - NOR: 128MB 16-bit NOR Flash + - Ethernet + - Three on-board RGMII 10/100/1G ethernet ports. + - FPGA + - Clocks + - System and DDR clock (SYSCLK, DDRCLK) + - SERDES clocks + - Power Supplies + - SDHC + - SDHC/SDXC connector + - Other IO + - Two Serial ports + - Three I2C ports + +Memory map +----------- +The addresses in brackets are physical addresses. + +Start Address End Address Description Size +0x00_0000_0000 0x00_000F_FFFF Secure Boot ROM 1MB +0x00_0100_0000 0x00_0FFF_FFFF CCSRBAR 240MB +0x00_1000_0000 0x00_1000_FFFF OCRAM0 64KB +0x00_1001_0000 0x00_1001_FFFF OCRAM1 64KB +0x00_2000_0000 0x00_20FF_FFFF DCSR 16MB +0x00_4000_0000 0x00_5FFF_FFFF QSPI 512MB +0x00_6000_0000 0x00_67FF_FFFF IFC - NOR Flash 128MB +0x00_7E80_0000 0x00_7E80_FFFF IFC - NAND Flash 64KB +0x00_7FB0_0000 0x00_7FB0_0FFF IFC - FPGA 4KB +0x00_8000_0000 0x00_FFFF_FFFF DRAM1 2GB diff --git a/board/freescale/ls1021aqds/ddr.c b/board/freescale/ls1021aqds/ddr.c new file mode 100644 index 0000000..679c654 --- /dev/null +++ b/board/freescale/ls1021aqds/ddr.c @@ -0,0 +1,159 @@ +/* + * Copyright 2014 Freescale Semiconductor, Inc. + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <common.h> +#include <fsl_ddr_sdram.h> +#include <fsl_ddr_dimm_params.h> +#include "ddr.h" + +DECLARE_GLOBAL_DATA_PTR; + +void fsl_ddr_board_options(memctl_options_t *popts, + dimm_params_t *pdimm, + unsigned int ctrl_num) +{ + const struct board_specific_parameters *pbsp, *pbsp_highest = NULL; + ulong ddr_freq; + + if (ctrl_num > 3) { + printf("Not supported controller number %d\n", ctrl_num); + return; + } + if (!pdimm->n_ranks) + return; + + pbsp = udimms[0]; + + /* Get clk_adjust, wrlvl_start, wrlvl_ctl, according to the board ddr + * freqency and n_banks specified in board_specific_parameters table. + */ + ddr_freq = get_ddr_freq(0) / 1000000; + while (pbsp->datarate_mhz_high) { + if (pbsp->n_ranks == pdimm->n_ranks) { + if (ddr_freq <= pbsp->datarate_mhz_high) { + popts->clk_adjust = pbsp->clk_adjust; + popts->wrlvl_start = pbsp->wrlvl_start; + popts->wrlvl_ctl_2 = pbsp->wrlvl_ctl_2; + popts->wrlvl_ctl_3 = pbsp->wrlvl_ctl_3; + popts->cpo_override = pbsp->cpo_override; + popts->write_data_delay = + pbsp->write_data_delay; + goto found; + } + pbsp_highest = pbsp; + } + pbsp++; + } + + if (pbsp_highest) { + printf("Error: board specific timing not found for %lu MT/s\n", + ddr_freq); + printf("Trying to use the highest speed (%u) parameters\n", + pbsp_highest->datarate_mhz_high); + popts->clk_adjust = pbsp_highest->clk_adjust; + popts->wrlvl_start = pbsp_highest->wrlvl_start; + popts->wrlvl_ctl_2 = pbsp->wrlvl_ctl_2; + popts->wrlvl_ctl_3 = pbsp->wrlvl_ctl_3; + } else { + panic("DIMM is not supported by this board"); + } +found: + debug("Found timing match: n_ranks %d, data rate %d, rank_gb %d\n", + pbsp->n_ranks, pbsp->datarate_mhz_high, pbsp->rank_gb); + + /* force DDR bus width to 32 bits */ + popts->data_bus_width = 1; + popts->otf_burst_chop_en = 0; + popts->burst_length = DDR_BL8; + + /* + * Factors to consider for half-strength driver enable: + * - number of DIMMs installed + */ + popts->half_strength_driver_enable = 1; + /* + * Write leveling override + */ + popts->wrlvl_override = 1; + popts->wrlvl_sample = 0xf; + popts->cswl_override = DDR_CSWL_CS0; + + /* + * Rtt and Rtt_WR override + */ + popts->rtt_override = 0; + + /* Enable ZQ calibration */ + popts->zq_en = 1; + + /* DHC_EN =1, ODT = 75 Ohm */ + popts->ddr_cdr1 = DDR_CDR1_DHC_EN | DDR_CDR1_ODT(DDR_CDR_ODT_75ohm); + popts->ddr_cdr2 = DDR_CDR2_ODT(DDR_CDR_ODT_75ohm); +} + +#ifdef CONFIG_SYS_DDR_RAW_TIMING +dimm_params_t ddr_raw_timing = { + .n_ranks = 1, + .rank_density = 1073741824u, + .capacity = 1073741824u, + .primary_sdram_width = 32, + .ec_sdram_width = 0, + .registered_dimm = 0, + .mirrored_dimm = 0, + .n_row_addr = 15, + .n_col_addr = 10, + .n_banks_per_sdram_device = 8, + .edc_config = 0, + .burst_lengths_bitmask = 0x0c, + + .tckmin_x_ps = 1071, + .caslat_x = 0xfe << 4, /* 5,6,7,8 */ + .taa_ps = 13125, + .twr_ps = 15000, + .trcd_ps = 13125, + .trrd_ps = 7500, + .trp_ps = 13125, + .tras_ps = 37500, + .trc_ps = 50625, + .trfc_ps = 160000, + .twtr_ps = 7500, + .trtp_ps = 7500, + .refresh_rate_ps = 7800000, + .tfaw_ps = 37500, +}; + +int fsl_ddr_get_dimm_params(dimm_params_t *pdimm, + unsigned int controller_number, + unsigned int dimm_number) +{ + static const char dimm_model[] = "Fixed DDR on board"; + + if (((controller_number == 0) && (dimm_number == 0)) || + ((controller_number == 1) && (dimm_number == 0))) { + memcpy(pdimm, &ddr_raw_timing, sizeof(dimm_params_t)); + memset(pdimm->mpart, 0, sizeof(pdimm->mpart)); + memcpy(pdimm->mpart, dimm_model, sizeof(dimm_model) - 1); + } + + return 0; +} +#endif + +phys_size_t initdram(int board_type) +{ + phys_size_t dram_size; + + puts("Initializing DDR....using SPD\n"); + dram_size = fsl_ddr_sdram(); + + return dram_size; +} + +void dram_init_banksize(void) +{ + gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE; + gd->bd->bi_dram[0].size = gd->ram_size; +} diff --git a/board/freescale/ls1021aqds/ddr.h b/board/freescale/ls1021aqds/ddr.h new file mode 100644 index 0000000..16d87cb --- /dev/null +++ b/board/freescale/ls1021aqds/ddr.h @@ -0,0 +1,49 @@ +/* + * Copyright 2014 Freescale Semiconductor, Inc. + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __DDR_H__ +#define __DDR_H__ +struct board_specific_parameters { + u32 n_ranks; + u32 datarate_mhz_high; + u32 rank_gb; + u32 clk_adjust; + u32 wrlvl_start; + u32 wrlvl_ctl_2; + u32 wrlvl_ctl_3; + u32 cpo_override; + u32 write_data_delay; + u32 force_2t; +}; + +/* + * These tables contain all valid speeds we want to override with board + * specific parameters. datarate_mhz_high values need to be in ascending order + * for each n_ranks group. + */ +static const struct board_specific_parameters udimm0[] = { + /* + * memory controller 0 + * num| hi| rank| clk| wrlvl | wrlvl | wrlvl | cpo |wrdata|2T + * ranks| mhz| GB |adjst| start | ctl2 | ctl3 | |delay | + */ + {1, 833, 1, 6, 8, 0x06060607, 0x08080807, 0x1f, 2, 0}, + {1, 1350, 1, 6, 8, 0x0708080A, 0x0A0B0C09, 0x1f, 2, 0}, + {1, 833, 2, 6, 8, 0x06060607, 0x08080807, 0x1f, 2, 0}, + {1, 1350, 2, 6, 8, 0x0708080A, 0x0A0B0C09, 0x1f, 2, 0}, + {2, 833, 4, 6, 8, 0x06060607, 0x08080807, 0x1f, 2, 0}, + {2, 1350, 4, 6, 8, 0x0708080A, 0x0A0B0C09, 0x1f, 2, 0}, + {2, 1350, 0, 6, 8, 0x0708080A, 0x0A0B0C09, 0x1f, 2, 0}, + {2, 1666, 4, 4, 0xa, 0x0B08090C, 0x0B0E0D0A, 0x1f, 2, 0}, + {2, 1666, 0, 4, 0xa, 0x0B08090C, 0x0B0E0D0A, 0x1f, 2, 0}, + {} +}; + +static const struct board_specific_parameters *udimms[] = { + udimm0, +}; + +#endif diff --git a/board/freescale/ls1021aqds/eth.c b/board/freescale/ls1021aqds/eth.c new file mode 100644 index 0000000..be351be --- /dev/null +++ b/board/freescale/ls1021aqds/eth.c @@ -0,0 +1,186 @@ +/* + * Copyright 2014 Freescale Semiconductor, Inc. + * + * SPDX-License-Identifier: GPL-2.0+ + * + * This file handles the board muxing between the RGMII/SGMII PHYs on + * Freescale LS1021AQDS board. The RGMII PHYs are the three on-board 1Gb + * ports. The SGMII PHYs are provided by the standard Freescale four-port + * SGMII riser card. + * + * Muxing is handled via the PIXIS BRDCFG4 register. The EMI1 bits control + * muxing among the RGMII PHYs and the SGMII PHYs. The value for RGMII depends + * on which port is used. The value for SGMII depends on which slot the riser + * is inserted in. + */ + +#include <common.h> +#include <netdev.h> +#include <asm/arch/fsl_serdes.h> +#include <fsl_mdio.h> +#include <tsec.h> +#include <malloc.h> + +#include "../common/sgmii_riser.h" +#include "../common/qixis.h" + +#define EMI1_MASK 0x1f +#define EMI1_RGMII0 1 +#define EMI1_RGMII1 2 +#define EMI1_RGMII2 3 +#define EMI1_SGMII1 0x1c +#define EMI1_SGMII2 0x1d + +struct ls1021a_mdio { + struct mii_dev *realbus; +}; + +static void ls1021a_mux_mdio(int addr) +{ + u8 brdcfg4; + + brdcfg4 = QIXIS_READ(brdcfg[4]); + brdcfg4 &= EMI1_MASK; + + switch (addr) { + case EMI1_RGMII0: + brdcfg4 |= 0; + break; + case EMI1_RGMII1: + brdcfg4 |= 0x20; + break; + case EMI1_RGMII2: + brdcfg4 |= 0x40; + break; + case EMI1_SGMII1: + brdcfg4 |= 0x60; + break; + case EMI1_SGMII2: + brdcfg4 |= 0x80; + break; + default: + brdcfg4 |= 0xa0; + break; + } + + QIXIS_WRITE(brdcfg[4], brdcfg4); +} + +static int ls1021a_mdio_read(struct mii_dev *bus, int addr, int devad, + int regnum) +{ + struct ls1021a_mdio *priv = bus->priv; + + ls1021a_mux_mdio(addr); + + return priv->realbus->read(priv->realbus, addr, devad, regnum); +} + +static int ls1021a_mdio_write(struct mii_dev *bus, int addr, int devad, + int regnum, u16 value) +{ + struct ls1021a_mdio *priv = bus->priv; + + ls1021a_mux_mdio(addr); + + return priv->realbus->write(priv->realbus, addr, devad, regnum, value); +} + +static int ls1021a_mdio_reset(struct mii_dev *bus) +{ + struct ls1021a_mdio *priv = bus->priv; + + return priv->realbus->reset(priv->realbus); +} + +static int ls1021a_mdio_init(char *realbusname, char *fakebusname) +{ + struct ls1021a_mdio *lsmdio; + struct mii_dev *bus = mdio_alloc(); + + if (!bus) { + printf("Failed to allocate LS102xA MDIO bus\n"); + return -1; + } + + lsmdio = malloc(sizeof(*lsmdio)); + if (!lsmdio) { + printf("Failed to allocate LS102xA private data\n"); + free(bus); + return -1; + } + + bus->read = ls1021a_mdio_read; + bus->write = ls1021a_mdio_write; + bus->reset = ls1021a_mdio_reset; + sprintf(bus->name, fakebusname); + + lsmdio->realbus = miiphy_get_dev_by_name(realbusname); + + if (!lsmdio->realbus) { + printf("No bus with name %s\n", realbusname); + free(bus); + free(lsmdio); + return -1; + } + + bus->priv = lsmdio; + + return mdio_register(bus); +} + +int board_eth_init(bd_t *bis) +{ + struct fsl_pq_mdio_info mdio_info; + struct tsec_info_struct tsec_info[3]; + int num = 0; + +#ifdef CONFIG_TSEC1 + SET_STD_TSEC_INFO(tsec_info[num], 1); + if (is_serdes_configured(SGMII_TSEC1)) { + puts("eTSEC1 is in sgmii mode\n"); + tsec_info[num].flags |= TSEC_SGMII; + tsec_info[num].mii_devname = "LS1021A_SGMII_MDIO"; + } else { + tsec_info[num].mii_devname = "LS1021A_RGMII_MDIO"; + } + num++; +#endif +#ifdef CONFIG_TSEC2 + SET_STD_TSEC_INFO(tsec_info[num], 2); + if (is_serdes_configured(SGMII_TSEC2)) { + puts("eTSEC2 is in sgmii mode\n"); + tsec_info[num].flags |= TSEC_SGMII; + tsec_info[num].mii_devname = "LS1021A_SGMII_MDIO"; + } else { + tsec_info[num].mii_devname = "LS1021A_RGMII_MDIO"; + } + num++; +#endif +#ifdef CONFIG_TSEC3 + SET_STD_TSEC_INFO(tsec_info[num], 3); + tsec_info[num].mii_devname = "LS1021A_RGMII_MDIO"; + num++; +#endif + if (!num) { + printf("No TSECs initialized\n"); + return 0; + } + +#ifdef CONFIG_FSL_SGMII_RISER + fsl_sgmii_riser_init(tsec_info, num); +#endif + + mdio_info.regs = (struct tsec_mii_mng *)CONFIG_SYS_MDIO_BASE_ADDR; + mdio_info.name = DEFAULT_MII_NAME; + + fsl_pq_mdio_init(bis, &mdio_info); + + /* Register the virtual MDIO front-ends */ + ls1021a_mdio_init(DEFAULT_MII_NAME, "LS1021A_RGMII_MDIO"); + ls1021a_mdio_init(DEFAULT_MII_NAME, "LS1021A_SGMII_MDIO"); + + tsec_eth_init(bis, tsec_info, num); + + return pci_eth_init(bis); +} diff --git a/board/freescale/ls1021aqds/ls1021aqds.c b/board/freescale/ls1021aqds/ls1021aqds.c new file mode 100644 index 0000000..12e83f7 --- /dev/null +++ b/board/freescale/ls1021aqds/ls1021aqds.c @@ -0,0 +1,255 @@ +/* + * Copyright 2014 Freescale Semiconductor, Inc. + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <common.h> +#include <i2c.h> +#include <asm/io.h> +#include <asm/arch/immap_ls102xa.h> +#include <asm/arch/clock.h> +#include <asm/arch/fsl_serdes.h> +#include <mmc.h> +#include <fsl_esdhc.h> +#include <fsl_ifc.h> + +#include "../common/qixis.h" +#include "ls1021aqds_qixis.h" + +DECLARE_GLOBAL_DATA_PTR; + +enum { + MUX_TYPE_SD_PCI4, + MUX_TYPE_SD_PC_SA_SG_SG, + MUX_TYPE_SD_PC_SA_PC_SG, + MUX_TYPE_SD_PC_SG_SG, +}; + +int checkboard(void) +{ + char buf[64]; + u8 sw; + + puts("Board: LS1021AQDS\n"); + + sw = QIXIS_READ(brdcfg[0]); + sw = (sw & QIXIS_LBMAP_MASK) >> QIXIS_LBMAP_SHIFT; + + if (sw < 0x8) + printf("vBank: %d\n", sw); + else if (sw == 0x8) + puts("PromJet\n"); + else if (sw == 0x9) + puts("NAND\n"); + else if (sw == 0x15) + printf("IFCCard\n"); + else + printf("invalid setting of SW%u\n", QIXIS_LBMAP_SWITCH); + + printf("Sys ID:0x%02x, Sys Ver: 0x%02x\n", + QIXIS_READ(id), QIXIS_READ(arch)); + + printf("FPGA: v%d (%s), build %d\n", + (int)QIXIS_READ(scver), qixis_read_tag(buf), + (int)qixis_read_minor()); + + return 0; +} + +unsigned long get_board_sys_clk(void) +{ + u8 sysclk_conf = QIXIS_READ(brdcfg[1]); + + switch (sysclk_conf & 0x0f) { + case QIXIS_SYSCLK_64: + return 64000000; + case QIXIS_SYSCLK_83: + return 83333333; + case QIXIS_SYSCLK_100: + return 100000000; + case QIXIS_SYSCLK_125: + return 125000000; + case QIXIS_SYSCLK_133: + return 133333333; + case QIXIS_SYSCLK_150: + return 150000000; + case QIXIS_SYSCLK_160: + return 160000000; + case QIXIS_SYSCLK_166: + return 166666666; + } + return 66666666; +} + +unsigned long get_board_ddr_clk(void) +{ + u8 ddrclk_conf = QIXIS_READ(brdcfg[1]); + + switch ((ddrclk_conf & 0x30) >> 4) { + case QIXIS_DDRCLK_100: + return 100000000; + case QIXIS_DDRCLK_125: + return 125000000; + case QIXIS_DDRCLK_133: + return 133333333; + } + return 66666666; +} + +int dram_init(void) +{ + gd->ram_size = initdram(0); + + return 0; +} + +#ifdef CONFIG_FSL_ESDHC +struct fsl_esdhc_cfg esdhc_cfg[1] = { + {CONFIG_SYS_FSL_ESDHC_ADDR}, +}; + +int board_mmc_init(bd_t *bis) +{ + esdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC_CLK); + + return fsl_esdhc_initialize(bis, &esdhc_cfg[0]); +} +#endif + +int select_i2c_ch_pca9547(u8 ch) +{ + int ret; + + ret = i2c_write(I2C_MUX_PCA_ADDR_PRI, 0, 1, &ch, 1); + if (ret) { + puts("PCA: failed to select proper channel\n"); + return ret; + } + + return 0; +} + +int board_early_init_f(void) +{ + struct ccsr_scfg *scfg = (struct ccsr_scfg *)CONFIG_SYS_FSL_SCFG_ADDR; + struct ccsr_cci400 *cci = (struct ccsr_cci400 *)CONFIG_SYS_CCI400_ADDR; + +#ifdef CONFIG_TSEC_ENET + out_be32(&scfg->scfgrevcr, SCFG_SCFGREVCR_REV); + out_be32(&scfg->etsecdmamcr, SCFG_ETSECDMAMCR_LE_BD_FR); + out_be32(&scfg->scfgrevcr, SCFG_SCFGREVCR_NOREV); +#endif + +#ifdef CONFIG_FSL_IFC + init_early_memctl_regs(); +#endif + + /* Workaround for the issue that DDR could not respond to + * barrier transaction which is generated by executing DSB/ISB + * instruction. Set CCI-400 control override register to + * terminate the barrier transaction. After DDR is initialized, + * allow barrier transaction to DDR again */ + out_le32(&cci->ctrl_ord, CCI400_CTRLORD_TERM_BARRIER); + + return 0; +} + +int config_board_mux(int ctrl_type) +{ + u8 reg12; + + reg12 = QIXIS_READ(brdcfg[12]); + + switch (ctrl_type) { + case MUX_TYPE_SD_PCI4: + reg12 = 0x38; + break; + case MUX_TYPE_SD_PC_SA_SG_SG: + reg12 = 0x01; + break; + case MUX_TYPE_SD_PC_SA_PC_SG: + reg12 = 0x01; + break; + case MUX_TYPE_SD_PC_SG_SG: + reg12 = 0x21; + break; + default: + printf("Wrong mux interface type\n"); + return -1; + } + + QIXIS_WRITE(brdcfg[12], reg12); + + return 0; +} + +int config_serdes_mux(void) +{ + struct ccsr_gur *gur = (struct ccsr_gur *)CONFIG_SYS_FSL_GUTS_ADDR; + u32 cfg; + + cfg = in_be32(&gur->rcwsr[4]) & RCWSR4_SRDS1_PRTCL_MASK; + cfg >>= RCWSR4_SRDS1_PRTCL_SHIFT; + + switch (cfg) { + case 0x0: + config_board_mux(MUX_TYPE_SD_PCI4); + break; + case 0x30: + config_board_mux(MUX_TYPE_SD_PC_SA_SG_SG); + break; + case 0x60: + config_board_mux(MUX_TYPE_SD_PC_SG_SG); + break; + case 0x70: + config_board_mux(MUX_TYPE_SD_PC_SA_PC_SG); + break; + default: + printf("SRDS1 prtcl:0x%x\n", cfg); + break; + } + + return 0; +} + +int board_init(void) +{ + struct ccsr_cci400 *cci = (struct ccsr_cci400 *)CONFIG_SYS_CCI400_ADDR; + + /* Set CCI-400 control override register to + * enable barrier transaction */ + out_le32(&cci->ctrl_ord, CCI400_CTRLORD_EN_BARRIER); + + select_i2c_ch_pca9547(I2C_MUX_CH_DEFAULT); + +#ifndef CONFIG_SYS_FSL_NO_SERDES + fsl_serdes_init(); + config_serdes_mux(); +#endif + return 0; +} + +void ft_board_setup(void *blob, bd_t *bd) +{ + ft_cpu_setup(blob, bd); +} + +u8 flash_read8(void *addr) +{ + return __raw_readb(addr + 1); +} + +void flash_write16(u16 val, void *addr) +{ + u16 shftval = (((val >> 8) & 0xff) | ((val << 8) & 0xff00)); + + __raw_writew(shftval, addr); +} + +u16 flash_read16(void *addr) +{ + u16 val = __raw_readw(addr); + + return (((val) >> 8) & 0x00ff) | (((val) << 8) & 0xff00); +} diff --git a/board/freescale/ls1021aqds/ls1021aqds_qixis.h b/board/freescale/ls1021aqds/ls1021aqds_qixis.h new file mode 100644 index 0000000..09b3be2 --- /dev/null +++ b/board/freescale/ls1021aqds/ls1021aqds_qixis.h @@ -0,0 +1,35 @@ +/* + * Copyright 2014 Freescale Semiconductor, Inc. + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __LS1021AQDS_QIXIS_H__ +#define __LS1021AQDS_QIXIS_H__ + +/* Definitions of QIXIS Registers for LS1021AQDS */ + +/* BRDCFG4[4:7]] select EC1 and EC2 as a pair */ +#define BRDCFG4_EMISEL_MASK 0xe0 +#define BRDCFG4_EMISEL_SHIFT 5 + +/* SYSCLK */ +#define QIXIS_SYSCLK_66 0x0 +#define QIXIS_SYSCLK_83 0x1 +#define QIXIS_SYSCLK_100 0x2 +#define QIXIS_SYSCLK_125 0x3 +#define QIXIS_SYSCLK_133 0x4 +#define QIXIS_SYSCLK_150 0x5 +#define QIXIS_SYSCLK_160 0x6 +#define QIXIS_SYSCLK_166 0x7 +#define QIXIS_SYSCLK_64 0x8 + +/* DDRCLK */ +#define QIXIS_DDRCLK_66 0x0 +#define QIXIS_DDRCLK_100 0x1 +#define QIXIS_DDRCLK_125 0x2 +#define QIXIS_DDRCLK_133 0x3 + +#define QIXIS_SRDS1CLK_100 0x0 + +#endif diff --git a/board/freescale/ls1021atwr/Kconfig b/board/freescale/ls1021atwr/Kconfig new file mode 100644 index 0000000..312f938 --- /dev/null +++ b/board/freescale/ls1021atwr/Kconfig @@ -0,0 +1,18 @@ +if TARGET_LS1021ATWR + +config SYS_CPU + default "armv7" + +config SYS_BOARD + default "ls1021atwr" + +config SYS_VENDOR + default "freescale" + +config SYS_SOC + default "ls102xa" + +config SYS_CONFIG_NAME + default "ls1021atwr" + +endif diff --git a/board/freescale/ls1021atwr/MAINTAINERS b/board/freescale/ls1021atwr/MAINTAINERS new file mode 100644 index 0000000..4e5bc15 --- /dev/null +++ b/board/freescale/ls1021atwr/MAINTAINERS @@ -0,0 +1,6 @@ +LS1021ATWR BOARD +M: Alison Wang <alison.wang@freescale.com> +S: Maintained +F: board/freescale/ls1021atwr/ +F: include/configs/ls1021atwr.h +F: configs/ls1021atwr_nor_defconfig diff --git a/board/freescale/ls1021atwr/Makefile b/board/freescale/ls1021atwr/Makefile new file mode 100644 index 0000000..01296c0 --- /dev/null +++ b/board/freescale/ls1021atwr/Makefile @@ -0,0 +1,8 @@ +# +# Copyright 2014 Freescale Semiconductor, Inc. +# +# SPDX-License-Identifier: GPL-2.0+ +# + +obj-y += ls1021atwr.o +obj-$(CONFIG_FSL_DCU_FB) += dcu.o diff --git a/board/freescale/ls1021atwr/README b/board/freescale/ls1021atwr/README new file mode 100644 index 0000000..d2821cb --- /dev/null +++ b/board/freescale/ls1021atwr/README @@ -0,0 +1,109 @@ +Overview +-------- +The LS1021ATWR is a Freescale reference board that hosts the LS1021A SoC. + +LS1021A SoC Overview +------------------ +The QorIQ LS1 family, which includes the LS1021A communications processor, +is built on Layerscape architecture, the industry's first software-aware, +core-agnostic networking architecture to offer unprecedented efficiency +and scale. + +A member of the value-performance tier, the QorIQ LS1021A processor provides +extensive integration and power efficiency for fanless, small form factor +enterprise networking applications. Incorporating dual ARM Cortex-A7 cores +running up to 1.0 GHz, the LS1021A processor delivers pre-silicon CoreMark +performance of over 6,000, as well as virtualization support, advanced +security features and the broadest array of high-speed interconnects and +optimized peripheral features ever offered in a sub-3 W processor. + +The QorIQ LS1021A processor features an integrated LCD controller, +CAN controller for implementing industrial protocols, DDR3L/4 running +up to 1600 MHz, integrated security engine and QUICC Engine, and ECC +protection on both L1 and L2 caches. The LS1021A processor is pin- and +software-compatible with the QorIQ LS1020A and LS1022A processors. + +The LS1021A SoC includes the following function and features: + + - ARM Cortex-A7 MPCore compliant with ARMv7-A architecture + - Dual high-preformance ARM Cortex-A7 cores, each core includes: + - 32 Kbyte L1 Instruction Cache and Data Cache for each core (ECC protection) + - 512 Kbyte shared coherent L2 Cache (with ECC protection) + - NEON Co-processor (per core) + - 40-bit physical addressing + - Vector floating-point support + - ARM Core-Link CCI-400 Cache Coherent Interconnect + - One DDR3L/DDR4 SDRAM memory controller with x8/x16/x32-bit configuration + supporting speeds up to 1600Mtps + - ECC and interleaving support + - VeTSEC Ethernet complex + - Up to 3x virtualized 10/100/1000 Ethernet controllers + - MII, RMII, RGMII, and SGMII support + - QoS, lossless flow control, and IEEE 1588 support + - 4-lane 6GHz SerDes + - High speed interconnect (4 SerDes lanes with are muxed for these protocol) + - Two PCI Express Gen2 controllers running at up to 5 GHz + - One Serial ATA 3.0 supporting 6 GT/s operation + - Two SGMII interfaces supporting 1000 Mbps + - Additional peripheral interfaces + - One high-speed USB 3.0 controller with integrated PHY and one high-speed + USB 2.00 controller with ULPI + - Integrated flash controller (IFC) with 16-bit interface + - Quad SPI NOR Flash + - One enhanced Secure digital host controller + - Display controller unit (DCU) 24-bit RGB (12-bit DDR pin interface) + - Ten UARTs comprised of two 16550 compliant DUARTs, and six low power + UARTs + - Three I2C controllers + - Eight FlexTimers four supporting PWM and four FlexCAN ports + - Four GPIO controllers supporting up to 109 general purpose I/O signals + - Integrated advanced audio block: + - Four synchronous audio interfaces (SAI) + - Sony/Philips Digital Interconnect Format (SPDIF) + - Asynchronous Sample Rate Converter (ASRC) + - Hardware based crypto offload engine + - IPSec forwarding at up to 1Gbps + - QorIQ Trust Architecture, Secure Boot, and ARM TrustZone supported + - Public key hardware accelerator + - True Random Number Generator (NIST Certified) + - Advanced Encryption Standard Accelerators (AESA) + - Data Encryption Standard Accelerators + - QUICC Engine ULite block + - Two universal communication controllers (TDM and HDLC) supporting 64 + multichannels, each running at 64 Kbps + - Support for 256 channels of HDLC + - QorIQ TrustArchitecture with Secure Boot, as well as ARM TrustZone supported + +LS1021ATWR board Overview +------------------------- + - DDR Controller + - Supports rates of up to 1600 MHz data-rate + - Supports one DDR3LP SDRAM. + - IFC/Local Bus + - NOR: 128MB 16-bit NOR Flash + - Ethernet + - Three on-board RGMII 10/100/1G ethernet ports. + - CPLD + - Clocks + - System and DDR clock (SYSCLK, DDRCLK) + - SERDES clocks + - Power Supplies + - SDHC + - SDHC/SDXC connector + - Other IO + - One Serial port + - Three I2C ports + +Memory map +----------- +The addresses in brackets are physical addresses. + +Start Address End Address Description Size +0x00_0000_0000 0x00_000F_FFFF Secure Boot ROM 1MB +0x00_0100_0000 0x00_0FFF_FFFF CCSRBAR 240MB +0x00_1000_0000 0x00_1000_FFFF OCRAM0 64KB +0x00_1001_0000 0x00_1001_FFFF OCRAM1 64KB +0x00_2000_0000 0x00_20FF_FFFF DCSR 16MB +0x00_4000_0000 0x00_5FFF_FFFF QSPI 512MB +0x00_6000_0000 0x00_67FF_FFFF IFC - NOR Flash 128MB +0x00_8000_0000 0x00_FFFF_FFFF DRAM1 2GB diff --git a/board/freescale/ls1021atwr/dcu.c b/board/freescale/ls1021atwr/dcu.c new file mode 100644 index 0000000..8fe4ccb --- /dev/null +++ b/board/freescale/ls1021atwr/dcu.c @@ -0,0 +1,47 @@ +/* + * Copyright 2014 Freescale Semiconductor, Inc. + * + * FSL DCU Framebuffer driver + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <common.h> +#include <fsl_dcu_fb.h> +#include "div64.h" +#include "../common/dcu_sii9022a.h" + +DECLARE_GLOBAL_DATA_PTR; + +unsigned int dcu_set_pixel_clock(unsigned int pixclock) +{ + unsigned long long div; + + div = (unsigned long long)(gd->bus_clk / 1000); + div *= (unsigned long long)pixclock; + do_div(div, 1000000000); + + return div; +} + +int platform_dcu_init(unsigned int xres, unsigned int yres, + const char *port, + struct fb_videomode *dcu_fb_videomode) +{ + const char *name; + unsigned int pixel_format; + + if (strncmp(port, "twr_lcd", 4) == 0) { + name = "TWR_LCD_RGB card"; + } else { + name = "HDMI"; + dcu_set_dvi_encoder(dcu_fb_videomode); + } + + printf("DCU: Switching to %s monitor @ %ux%u\n", name, xres, yres); + + pixel_format = 32; + fsl_dcu_init(xres, yres, pixel_format); + + return 0; +} diff --git a/board/freescale/ls1021atwr/ls1021atwr.c b/board/freescale/ls1021atwr/ls1021atwr.c new file mode 100644 index 0000000..b522ff2 --- /dev/null +++ b/board/freescale/ls1021atwr/ls1021atwr.c @@ -0,0 +1,488 @@ +/* + * Copyright 2014 Freescale Semiconductor, Inc. + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <common.h> +#include <i2c.h> +#include <asm/io.h> +#include <asm/arch/immap_ls102xa.h> +#include <asm/arch/clock.h> +#include <asm/arch/fsl_serdes.h> +#include <mmc.h> +#include <fsl_esdhc.h> +#include <fsl_ifc.h> +#include <netdev.h> +#include <fsl_mdio.h> +#include <tsec.h> + +DECLARE_GLOBAL_DATA_PTR; + +#define VERSION_MASK 0x00FF +#define BANK_MASK 0x0001 +#define CONFIG_RESET 0x1 +#define INIT_RESET 0x1 + +#define CPLD_SET_MUX_SERDES 0x20 +#define CPLD_SET_BOOT_BANK 0x40 + +#define BOOT_FROM_UPPER_BANK 0x0 +#define BOOT_FROM_LOWER_BANK 0x1 + +#define LANEB_SATA (0x01) +#define LANEB_SGMII1 (0x02) +#define LANEC_SGMII1 (0x04) +#define LANEC_PCIEX1 (0x08) +#define LANED_PCIEX2 (0x10) +#define LANED_SGMII2 (0x20) + +#define MASK_LANE_B 0x1 +#define MASK_LANE_C 0x2 +#define MASK_LANE_D 0x4 +#define MASK_SGMII 0x8 + +#define KEEP_STATUS 0x0 +#define NEED_RESET 0x1 + +struct cpld_data { + u8 cpld_ver; /* cpld revision */ + u8 cpld_ver_sub; /* cpld sub revision */ + u8 pcba_ver; /* pcb revision number */ + u8 system_rst; /* reset system by cpld */ + u8 soft_mux_on; /* CPLD override physical switches Enable */ + u8 cfg_rcw_src1; /* Reset config word 1 */ + u8 cfg_rcw_src2; /* Reset config word 2 */ + u8 vbank; /* Flash bank selection Control */ + u8 gpio; /* GPIO for TWR-ELEV */ + u8 i2c3_ifc_mux; + u8 mux_spi2; + u8 can3_usb2_mux; /* CAN3 and USB2 Selection */ + u8 qe_lcd_mux; /* QE and LCD Selection */ + u8 serdes_mux; /* Multiplexed pins for SerDes Lanes */ + u8 global_rst; /* reset with init CPLD reg to default */ + u8 rev1; /* Reserved */ + u8 rev2; /* Reserved */ +}; + +static void convert_serdes_mux(int type, int need_reset); + +void cpld_show(void) +{ + struct cpld_data *cpld_data = (void *)(CONFIG_SYS_CPLD_BASE); + + printf("CPLD: V%x.%x\nPCBA: V%x.0\nVBank: %d\n", + in_8(&cpld_data->cpld_ver) & VERSION_MASK, + in_8(&cpld_data->cpld_ver_sub) & VERSION_MASK, + in_8(&cpld_data->pcba_ver) & VERSION_MASK, + in_8(&cpld_data->vbank) & BANK_MASK); + +#ifdef CONFIG_DEBUG + printf("soft_mux_on =%x\n", + in_8(&cpld_data->soft_mux_on)); + printf("cfg_rcw_src1 =%x\n", + in_8(&cpld_data->cfg_rcw_src1)); + printf("cfg_rcw_src2 =%x\n", + in_8(&cpld_data->cfg_rcw_src2)); + printf("vbank =%x\n", + in_8(&cpld_data->vbank)); + printf("gpio =%x\n", + in_8(&cpld_data->gpio)); + printf("i2c3_ifc_mux =%x\n", + in_8(&cpld_data->i2c3_ifc_mux)); + printf("mux_spi2 =%x\n", + in_8(&cpld_data->mux_spi2)); + printf("can3_usb2_mux =%x\n", + in_8(&cpld_data->can3_usb2_mux)); + printf("qe_lcd_mux =%x\n", + in_8(&cpld_data->qe_lcd_mux)); + printf("serdes_mux =%x\n", + in_8(&cpld_data->serdes_mux)); +#endif +} + +int checkboard(void) +{ + puts("Board: LS1021ATWR\n"); + cpld_show(); + + return 0; +} + +void ddrmc_init(void) +{ + struct ccsr_ddr *ddr = (struct ccsr_ddr *)CONFIG_SYS_FSL_DDR_ADDR; + + out_be32(&ddr->sdram_cfg, DDR_SDRAM_CFG); + + out_be32(&ddr->cs0_bnds, DDR_CS0_BNDS); + out_be32(&ddr->cs0_config, DDR_CS0_CONFIG); + + out_be32(&ddr->timing_cfg_0, DDR_TIMING_CFG_0); + out_be32(&ddr->timing_cfg_1, DDR_TIMING_CFG_1); + out_be32(&ddr->timing_cfg_2, DDR_TIMING_CFG_2); + out_be32(&ddr->timing_cfg_3, DDR_TIMING_CFG_3); + out_be32(&ddr->timing_cfg_4, DDR_TIMING_CFG_4); + out_be32(&ddr->timing_cfg_5, DDR_TIMING_CFG_5); + + out_be32(&ddr->sdram_cfg_2, DDR_SDRAM_CFG_2); + + out_be32(&ddr->sdram_mode, DDR_SDRAM_MODE); + out_be32(&ddr->sdram_mode_2, DDR_SDRAM_MODE_2); + + out_be32(&ddr->sdram_interval, DDR_SDRAM_INTERVAL); + + out_be32(&ddr->ddr_wrlvl_cntl, DDR_DDR_WRLVL_CNTL); + + out_be32(&ddr->ddr_wrlvl_cntl_2, DDR_DDR_WRLVL_CNTL_2); + out_be32(&ddr->ddr_wrlvl_cntl_3, DDR_DDR_WRLVL_CNTL_3); + + out_be32(&ddr->ddr_cdr1, DDR_DDR_CDR1); + out_be32(&ddr->ddr_cdr2, DDR_DDR_CDR2); + + out_be32(&ddr->sdram_clk_cntl, DDR_SDRAM_CLK_CNTL); + out_be32(&ddr->ddr_zq_cntl, DDR_DDR_ZQ_CNTL); + + out_be32(&ddr->cs0_config_2, DDR_CS0_CONFIG_2); + udelay(1); + out_be32(&ddr->sdram_cfg, DDR_SDRAM_CFG | DDR_SDRAM_CFG_MEM_EN); +} + +int dram_init(void) +{ +#if (!defined(CONFIG_SPL) || defined(CONFIG_SPL_BUILD)) + ddrmc_init(); +#endif + + gd->ram_size = get_ram_size((void *)PHYS_SDRAM, PHYS_SDRAM_SIZE); + return 0; +} + +#ifdef CONFIG_FSL_ESDHC +struct fsl_esdhc_cfg esdhc_cfg[1] = { + {CONFIG_SYS_FSL_ESDHC_ADDR}, +}; + +int board_mmc_init(bd_t *bis) +{ + esdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC_CLK); + + return fsl_esdhc_initialize(bis, &esdhc_cfg[0]); +} +#endif + +#ifdef CONFIG_TSEC_ENET +int board_eth_init(bd_t *bis) +{ + struct fsl_pq_mdio_info mdio_info; + struct tsec_info_struct tsec_info[4]; + int num = 0; + +#ifdef CONFIG_TSEC1 + SET_STD_TSEC_INFO(tsec_info[num], 1); + if (is_serdes_configured(SGMII_TSEC1)) { + puts("eTSEC1 is in sgmii mode.\n"); + tsec_info[num].flags |= TSEC_SGMII; + } + num++; +#endif +#ifdef CONFIG_TSEC2 + SET_STD_TSEC_INFO(tsec_info[num], 2); + if (is_serdes_configured(SGMII_TSEC2)) { + puts("eTSEC2 is in sgmii mode.\n"); + tsec_info[num].flags |= TSEC_SGMII; + } + num++; +#endif +#ifdef CONFIG_TSEC3 + SET_STD_TSEC_INFO(tsec_info[num], 3); + num++; +#endif + if (!num) { + printf("No TSECs initialized\n"); + return 0; + } + + mdio_info.regs = (struct tsec_mii_mng *)CONFIG_SYS_MDIO_BASE_ADDR; + mdio_info.name = DEFAULT_MII_NAME; + fsl_pq_mdio_init(bis, &mdio_info); + + tsec_eth_init(bis, tsec_info, num); + + return pci_eth_init(bis); +} +#endif + +int config_serdes_mux(void) +{ + struct ccsr_gur __iomem *gur = (void *)(CONFIG_SYS_FSL_GUTS_ADDR); + u32 protocol = in_be32(&gur->rcwsr[4]) & RCWSR4_SRDS1_PRTCL_MASK; + + protocol >>= RCWSR4_SRDS1_PRTCL_SHIFT; + switch (protocol) { + case 0x10: + convert_serdes_mux(LANEB_SATA, KEEP_STATUS); + convert_serdes_mux(LANED_PCIEX2 | + LANEC_PCIEX1, KEEP_STATUS); + break; + case 0x20: + convert_serdes_mux(LANEB_SGMII1, KEEP_STATUS); + convert_serdes_mux(LANEC_PCIEX1, KEEP_STATUS); + convert_serdes_mux(LANED_SGMII2, KEEP_STATUS); + break; + case 0x30: + convert_serdes_mux(LANEB_SATA, KEEP_STATUS); + convert_serdes_mux(LANEC_SGMII1, KEEP_STATUS); + convert_serdes_mux(LANED_SGMII2, KEEP_STATUS); + break; + case 0x70: + convert_serdes_mux(LANEB_SATA, KEEP_STATUS); + convert_serdes_mux(LANEC_PCIEX1, KEEP_STATUS); + convert_serdes_mux(LANED_SGMII2, KEEP_STATUS); + break; + } + + return 0; +} + +int board_early_init_f(void) +{ + struct ccsr_scfg *scfg = (struct ccsr_scfg *)CONFIG_SYS_FSL_SCFG_ADDR; + +#ifdef CONFIG_TSEC_ENET + out_be32(&scfg->scfgrevcr, SCFG_SCFGREVCR_REV); + out_be32(&scfg->etsecdmamcr, SCFG_ETSECDMAMCR_LE_BD_FR); + out_be32(&scfg->etsecmcr, SCFG_ETSECCMCR_GE2_CLK125); + udelay(10); + out_be32(&scfg->scfgrevcr, SCFG_SCFGREVCR_NOREV); +#endif + +#ifdef CONFIG_FSL_IFC + init_early_memctl_regs(); +#endif + +#ifdef CONFIG_FSL_DCU_FB + out_be32(&scfg->scfgrevcr, SCFG_SCFGREVCR_REV); + out_be32(&scfg->pixclkcr, SCFG_PIXCLKCR_PXCKEN); + out_be32(&scfg->scfgrevcr, SCFG_SCFGREVCR_NOREV); +#endif + + return 0; +} + +int board_init(void) +{ +#ifndef CONFIG_SYS_FSL_NO_SERDES + fsl_serdes_init(); + config_serdes_mux(); +#endif + + return 0; +} + +void ft_board_setup(void *blob, bd_t *bd) +{ + ft_cpu_setup(blob, bd); +} + +u8 flash_read8(void *addr) +{ + return __raw_readb(addr + 1); +} + +void flash_write16(u16 val, void *addr) +{ + u16 shftval = (((val >> 8) & 0xff) | ((val << 8) & 0xff00)); + + __raw_writew(shftval, addr); +} + +u16 flash_read16(void *addr) +{ + u16 val = __raw_readw(addr); + + return (((val) >> 8) & 0x00ff) | (((val) << 8) & 0xff00); +} + +static void convert_flash_bank(char bank) +{ + struct cpld_data *cpld_data = (void *)(CONFIG_SYS_CPLD_BASE); + + printf("Now switch to boot from flash bank %d.\n", bank); + cpld_data->soft_mux_on = CPLD_SET_BOOT_BANK; + cpld_data->vbank = bank; + + printf("Reset board to enable configuration.\n"); + cpld_data->system_rst = CONFIG_RESET; +} + +static int flash_bank_cmd(cmd_tbl_t *cmdtp, int flag, int argc, + char * const argv[]) +{ + if (argc != 2) + return CMD_RET_USAGE; + if (strcmp(argv[1], "0") == 0) + convert_flash_bank(BOOT_FROM_UPPER_BANK); + else if (strcmp(argv[1], "1") == 0) + convert_flash_bank(BOOT_FROM_LOWER_BANK); + else + return CMD_RET_USAGE; + + return 0; +} + +U_BOOT_CMD( + boot_bank, 2, 0, flash_bank_cmd, + "Flash bank Selection Control", + "bank[0-upper bank/1-lower bank] (e.g. boot_bank 0)" +); + +static int cpld_reset_cmd(cmd_tbl_t *cmdtp, int flag, int argc, + char * const argv[]) +{ + struct cpld_data *cpld_data = (void *)(CONFIG_SYS_CPLD_BASE); + + if (argc > 2) + return CMD_RET_USAGE; + if ((argc == 1) || (strcmp(argv[1], "conf") == 0)) + cpld_data->system_rst = CONFIG_RESET; + else if (strcmp(argv[1], "init") == 0) + cpld_data->global_rst = INIT_RESET; + else + return CMD_RET_USAGE; + + return 0; +} + +U_BOOT_CMD( + cpld_reset, 2, 0, cpld_reset_cmd, + "Reset via CPLD", + "conf\n" + " -reset with current CPLD configuration\n" + "init\n" + " -reset and initial CPLD configuration with default value" + +); + +static void convert_serdes_mux(int type, int need_reset) +{ + char current_serdes; + struct cpld_data *cpld_data = (void *)(CONFIG_SYS_CPLD_BASE); + + current_serdes = cpld_data->serdes_mux; + + switch (type) { + case LANEB_SATA: + current_serdes &= ~MASK_LANE_B; + break; + case LANEB_SGMII1: + current_serdes |= (MASK_LANE_B | MASK_SGMII | MASK_LANE_C); + break; + case LANEC_SGMII1: + current_serdes &= ~(MASK_LANE_B | MASK_SGMII | MASK_LANE_C); + break; + case LANED_SGMII2: + current_serdes |= MASK_LANE_D; + break; + case LANEC_PCIEX1: + current_serdes |= MASK_LANE_C; + break; + case (LANED_PCIEX2 | LANEC_PCIEX1): + current_serdes |= MASK_LANE_C; + current_serdes &= ~MASK_LANE_D; + break; + default: + printf("CPLD serdes MUX: unsupported MUX type 0x%x\n", type); + return; + } + + cpld_data->soft_mux_on |= CPLD_SET_MUX_SERDES; + cpld_data->serdes_mux = current_serdes; + + if (need_reset == 1) { + printf("Reset board to enable configuration\n"); + cpld_data->system_rst = CONFIG_RESET; + } +} + +void print_serdes_mux(void) +{ + char current_serdes; + struct cpld_data *cpld_data = (void *)(CONFIG_SYS_CPLD_BASE); + + current_serdes = cpld_data->serdes_mux; + + printf("Serdes Lane B: "); + if ((current_serdes & MASK_LANE_B) == 0) + printf("SATA,\n"); + else + printf("SGMII 1,\n"); + + printf("Serdes Lane C: "); + if ((current_serdes & MASK_LANE_C) == 0) + printf("SGMII 1,\n"); + else + printf("PCIe,\n"); + + printf("Serdes Lane D: "); + if ((current_serdes & MASK_LANE_D) == 0) + printf("PCIe,\n"); + else + printf("SGMII 2,\n"); + + printf("SGMII 1 is on lane "); + if ((current_serdes & MASK_SGMII) == 0) + printf("C.\n"); + else + printf("B.\n"); +} + +static int serdes_mux_cmd(cmd_tbl_t *cmdtp, int flag, int argc, + char * const argv[]) +{ + if (argc != 2) + return CMD_RET_USAGE; + if (strcmp(argv[1], "sata") == 0) { + printf("Set serdes lane B to SATA.\n"); + convert_serdes_mux(LANEB_SATA, NEED_RESET); + } else if (strcmp(argv[1], "sgmii1b") == 0) { + printf("Set serdes lane B to SGMII 1.\n"); + convert_serdes_mux(LANEB_SGMII1, NEED_RESET); + } else if (strcmp(argv[1], "sgmii1c") == 0) { + printf("Set serdes lane C to SGMII 1.\n"); + convert_serdes_mux(LANEC_SGMII1, NEED_RESET); + } else if (strcmp(argv[1], "sgmii2") == 0) { + printf("Set serdes lane D to SGMII 2.\n"); + convert_serdes_mux(LANED_SGMII2, NEED_RESET); + } else if (strcmp(argv[1], "pciex1") == 0) { + printf("Set serdes lane C to PCIe X1.\n"); + convert_serdes_mux(LANEC_PCIEX1, NEED_RESET); + } else if (strcmp(argv[1], "pciex2") == 0) { + printf("Set serdes lane C & lane D to PCIe X2.\n"); + convert_serdes_mux((LANED_PCIEX2 | LANEC_PCIEX1), NEED_RESET); + } else if (strcmp(argv[1], "show") == 0) { + print_serdes_mux(); + } else { + return CMD_RET_USAGE; + } + + return 0; +} + +U_BOOT_CMD( + lane_bank, 2, 0, serdes_mux_cmd, + "Multiplexed function setting for SerDes Lanes", + "sata\n" + " -change lane B to sata\n" + "lane_bank sgmii1b\n" + " -change lane B to SGMII1\n" + "lane_bank sgmii1c\n" + " -change lane C to SGMII1\n" + "lane_bank sgmii2\n" + " -change lane D to SGMII2\n" + "lane_bank pciex1\n" + " -change lane C to PCIeX1\n" + "lane_bank pciex2\n" + " -change lane C & lane D to PCIeX2\n" + "\nWARNING: If you aren't familiar with the setting of serdes, don't try to change anything!\n" +); diff --git a/board/freescale/ls2085a/Kconfig b/board/freescale/ls2085a/Kconfig index 5655e18..f51afc82 100644 --- a/board/freescale/ls2085a/Kconfig +++ b/board/freescale/ls2085a/Kconfig @@ -1,47 +1,31 @@ if TARGET_LS2085A_EMU -config SYS_CPU - string - default "armv8" - config SYS_BOARD - string default "ls2085a" config SYS_VENDOR - string default "freescale" config SYS_SOC - string default "fsl-lsch3" config SYS_CONFIG_NAME - string default "ls2085a_emu" endif if TARGET_LS2085A_SIMU -config SYS_CPU - string - default "armv8" - config SYS_BOARD - string default "ls2085a" config SYS_VENDOR - string default "freescale" config SYS_SOC - string default "fsl-lsch3" config SYS_CONFIG_NAME - string default "ls2085a_simu" endif diff --git a/board/freescale/m5208evbe/Kconfig b/board/freescale/m5208evbe/Kconfig index 9b1fa42..9b416af 100644 --- a/board/freescale/m5208evbe/Kconfig +++ b/board/freescale/m5208evbe/Kconfig @@ -1,19 +1,15 @@ if TARGET_M5208EVBE config SYS_CPU - string default "mcf52x2" config SYS_BOARD - string default "m5208evbe" config SYS_VENDOR - string default "freescale" config SYS_CONFIG_NAME - string default "M5208EVBE" endif diff --git a/board/freescale/m52277evb/Kconfig b/board/freescale/m52277evb/Kconfig index 54a86e4..c427892 100644 --- a/board/freescale/m52277evb/Kconfig +++ b/board/freescale/m52277evb/Kconfig @@ -1,19 +1,15 @@ if TARGET_M52277EVB config SYS_CPU - string default "mcf5227x" config SYS_BOARD - string default "m52277evb" config SYS_VENDOR - string default "freescale" config SYS_CONFIG_NAME - string default "M52277EVB" endif diff --git a/board/freescale/m5235evb/Kconfig b/board/freescale/m5235evb/Kconfig index f996ca2..fc83419 100644 --- a/board/freescale/m5235evb/Kconfig +++ b/board/freescale/m5235evb/Kconfig @@ -1,19 +1,15 @@ if TARGET_M5235EVB config SYS_CPU - string default "mcf523x" config SYS_BOARD - string default "m5235evb" config SYS_VENDOR - string default "freescale" config SYS_CONFIG_NAME - string default "M5235EVB" endif diff --git a/board/freescale/m5249evb/Kconfig b/board/freescale/m5249evb/Kconfig index 87643e4..0f62477 100644 --- a/board/freescale/m5249evb/Kconfig +++ b/board/freescale/m5249evb/Kconfig @@ -1,19 +1,15 @@ if TARGET_M5249EVB config SYS_CPU - string default "mcf52x2" config SYS_BOARD - string default "m5249evb" config SYS_VENDOR - string default "freescale" config SYS_CONFIG_NAME - string default "M5249EVB" endif diff --git a/board/freescale/m5253demo/Kconfig b/board/freescale/m5253demo/Kconfig index 76197a7..303d29b 100644 --- a/board/freescale/m5253demo/Kconfig +++ b/board/freescale/m5253demo/Kconfig @@ -1,19 +1,15 @@ if TARGET_M5253DEMO config SYS_CPU - string default "mcf52x2" config SYS_BOARD - string default "m5253demo" config SYS_VENDOR - string default "freescale" config SYS_CONFIG_NAME - string default "M5253DEMO" endif diff --git a/board/freescale/m5253evbe/Kconfig b/board/freescale/m5253evbe/Kconfig index bdc6c27..d97b87c 100644 --- a/board/freescale/m5253evbe/Kconfig +++ b/board/freescale/m5253evbe/Kconfig @@ -1,19 +1,15 @@ if TARGET_M5253EVBE config SYS_CPU - string default "mcf52x2" config SYS_BOARD - string default "m5253evbe" config SYS_VENDOR - string default "freescale" config SYS_CONFIG_NAME - string default "M5253EVBE" endif diff --git a/board/freescale/m5272c3/Kconfig b/board/freescale/m5272c3/Kconfig index b69c37a..aee0b23 100644 --- a/board/freescale/m5272c3/Kconfig +++ b/board/freescale/m5272c3/Kconfig @@ -1,19 +1,15 @@ if TARGET_M5272C3 config SYS_CPU - string default "mcf52x2" config SYS_BOARD - string default "m5272c3" config SYS_VENDOR - string default "freescale" config SYS_CONFIG_NAME - string default "M5272C3" endif diff --git a/board/freescale/m5275evb/Kconfig b/board/freescale/m5275evb/Kconfig index 85514b7..5a6de9c 100644 --- a/board/freescale/m5275evb/Kconfig +++ b/board/freescale/m5275evb/Kconfig @@ -1,19 +1,15 @@ if TARGET_M5275EVB config SYS_CPU - string default "mcf52x2" config SYS_BOARD - string default "m5275evb" config SYS_VENDOR - string default "freescale" config SYS_CONFIG_NAME - string default "M5275EVB" endif diff --git a/board/freescale/m5282evb/Kconfig b/board/freescale/m5282evb/Kconfig index 33e98a7..2ffdd52 100644 --- a/board/freescale/m5282evb/Kconfig +++ b/board/freescale/m5282evb/Kconfig @@ -1,19 +1,15 @@ if TARGET_M5282EVB config SYS_CPU - string default "mcf52x2" config SYS_BOARD - string default "m5282evb" config SYS_VENDOR - string default "freescale" config SYS_CONFIG_NAME - string default "M5282EVB" endif diff --git a/board/freescale/m53017evb/Kconfig b/board/freescale/m53017evb/Kconfig index 99ffd7d..8ab89e5 100644 --- a/board/freescale/m53017evb/Kconfig +++ b/board/freescale/m53017evb/Kconfig @@ -1,19 +1,15 @@ if TARGET_M53017EVB config SYS_CPU - string default "mcf532x" config SYS_BOARD - string default "m53017evb" config SYS_VENDOR - string default "freescale" config SYS_CONFIG_NAME - string default "M53017EVB" endif diff --git a/board/freescale/m5329evb/Kconfig b/board/freescale/m5329evb/Kconfig index c9a621a..930fbba 100644 --- a/board/freescale/m5329evb/Kconfig +++ b/board/freescale/m5329evb/Kconfig @@ -1,19 +1,15 @@ if TARGET_M5329EVB config SYS_CPU - string default "mcf532x" config SYS_BOARD - string default "m5329evb" config SYS_VENDOR - string default "freescale" config SYS_CONFIG_NAME - string default "M5329EVB" endif diff --git a/board/freescale/m5373evb/Kconfig b/board/freescale/m5373evb/Kconfig index 583a4b5..67d049d 100644 --- a/board/freescale/m5373evb/Kconfig +++ b/board/freescale/m5373evb/Kconfig @@ -1,19 +1,15 @@ if TARGET_M5373EVB config SYS_CPU - string default "mcf532x" config SYS_BOARD - string default "m5373evb" config SYS_VENDOR - string default "freescale" config SYS_CONFIG_NAME - string default "M5373EVB" endif diff --git a/board/freescale/m54418twr/Kconfig b/board/freescale/m54418twr/Kconfig index 7d73b94..4199a3f 100644 --- a/board/freescale/m54418twr/Kconfig +++ b/board/freescale/m54418twr/Kconfig @@ -1,19 +1,15 @@ if TARGET_M54418TWR config SYS_CPU - string default "mcf5445x" config SYS_BOARD - string default "m54418twr" config SYS_VENDOR - string default "freescale" config SYS_CONFIG_NAME - string default "M54418TWR" endif diff --git a/board/freescale/m54451evb/Kconfig b/board/freescale/m54451evb/Kconfig index 814db72..f460e51 100644 --- a/board/freescale/m54451evb/Kconfig +++ b/board/freescale/m54451evb/Kconfig @@ -1,19 +1,15 @@ if TARGET_M54451EVB config SYS_CPU - string default "mcf5445x" config SYS_BOARD - string default "m54451evb" config SYS_VENDOR - string default "freescale" config SYS_CONFIG_NAME - string default "M54451EVB" endif diff --git a/board/freescale/m54455evb/Kconfig b/board/freescale/m54455evb/Kconfig index acdd13f..096bce8 100644 --- a/board/freescale/m54455evb/Kconfig +++ b/board/freescale/m54455evb/Kconfig @@ -1,19 +1,15 @@ if TARGET_M54455EVB config SYS_CPU - string default "mcf5445x" config SYS_BOARD - string default "m54455evb" config SYS_VENDOR - string default "freescale" config SYS_CONFIG_NAME - string default "M54455EVB" endif diff --git a/board/freescale/m547xevb/Kconfig b/board/freescale/m547xevb/Kconfig index d21072e..8cfe20a 100644 --- a/board/freescale/m547xevb/Kconfig +++ b/board/freescale/m547xevb/Kconfig @@ -1,19 +1,15 @@ if TARGET_M5475EVB config SYS_CPU - string default "mcf547x_8x" config SYS_BOARD - string default "m547xevb" config SYS_VENDOR - string default "freescale" config SYS_CONFIG_NAME - string default "M5475EVB" endif diff --git a/board/freescale/m548xevb/Kconfig b/board/freescale/m548xevb/Kconfig index 2afe11c..da924e3 100644 --- a/board/freescale/m548xevb/Kconfig +++ b/board/freescale/m548xevb/Kconfig @@ -1,19 +1,15 @@ if TARGET_M5485EVB config SYS_CPU - string default "mcf547x_8x" config SYS_BOARD - string default "m548xevb" config SYS_VENDOR - string default "freescale" config SYS_CONFIG_NAME - string default "M5485EVB" endif diff --git a/board/freescale/mpc5121ads/Kconfig b/board/freescale/mpc5121ads/Kconfig index 9989ccb..f125f9e 100644 --- a/board/freescale/mpc5121ads/Kconfig +++ b/board/freescale/mpc5121ads/Kconfig @@ -1,15 +1,12 @@ if TARGET_MPC5121ADS config SYS_BOARD - string default "mpc5121ads" config SYS_VENDOR - string default "freescale" config SYS_CONFIG_NAME - string default "mpc5121ads" endif diff --git a/board/freescale/mpc7448hpc2/Kconfig b/board/freescale/mpc7448hpc2/Kconfig index 0ea712c..3e7f6e8 100644 --- a/board/freescale/mpc7448hpc2/Kconfig +++ b/board/freescale/mpc7448hpc2/Kconfig @@ -1,15 +1,12 @@ if TARGET_MPC7448HPC2 config SYS_BOARD - string default "mpc7448hpc2" config SYS_VENDOR - string default "freescale" config SYS_CONFIG_NAME - string default "mpc7448hpc2" endif diff --git a/board/freescale/mpc8266ads/Kconfig b/board/freescale/mpc8266ads/Kconfig index 7c5a646..78963b9 100644 --- a/board/freescale/mpc8266ads/Kconfig +++ b/board/freescale/mpc8266ads/Kconfig @@ -1,15 +1,12 @@ if TARGET_MPC8266ADS config SYS_BOARD - string default "mpc8266ads" config SYS_VENDOR - string default "freescale" config SYS_CONFIG_NAME - string default "MPC8266ADS" endif diff --git a/board/freescale/mpc8308rdb/Kconfig b/board/freescale/mpc8308rdb/Kconfig index b47765a..48d25e5 100644 --- a/board/freescale/mpc8308rdb/Kconfig +++ b/board/freescale/mpc8308rdb/Kconfig @@ -1,15 +1,12 @@ if TARGET_MPC8308RDB config SYS_BOARD - string default "mpc8308rdb" config SYS_VENDOR - string default "freescale" config SYS_CONFIG_NAME - string default "MPC8308RDB" endif diff --git a/board/freescale/mpc8313erdb/Kconfig b/board/freescale/mpc8313erdb/Kconfig index 078f437..145608f 100644 --- a/board/freescale/mpc8313erdb/Kconfig +++ b/board/freescale/mpc8313erdb/Kconfig @@ -1,15 +1,12 @@ if TARGET_MPC8313ERDB config SYS_BOARD - string default "mpc8313erdb" config SYS_VENDOR - string default "freescale" config SYS_CONFIG_NAME - string default "MPC8313ERDB" endif diff --git a/board/freescale/mpc8315erdb/Kconfig b/board/freescale/mpc8315erdb/Kconfig index 46833ca..f76b0d1 100644 --- a/board/freescale/mpc8315erdb/Kconfig +++ b/board/freescale/mpc8315erdb/Kconfig @@ -1,15 +1,12 @@ if TARGET_MPC8315ERDB config SYS_BOARD - string default "mpc8315erdb" config SYS_VENDOR - string default "freescale" config SYS_CONFIG_NAME - string default "MPC8315ERDB" endif diff --git a/board/freescale/mpc8323erdb/Kconfig b/board/freescale/mpc8323erdb/Kconfig index a1c0a61..acf8122 100644 --- a/board/freescale/mpc8323erdb/Kconfig +++ b/board/freescale/mpc8323erdb/Kconfig @@ -1,15 +1,12 @@ if TARGET_MPC8323ERDB config SYS_BOARD - string default "mpc8323erdb" config SYS_VENDOR - string default "freescale" config SYS_CONFIG_NAME - string default "MPC8323ERDB" endif diff --git a/board/freescale/mpc832xemds/Kconfig b/board/freescale/mpc832xemds/Kconfig index 83af2c2..e4cfa15 100644 --- a/board/freescale/mpc832xemds/Kconfig +++ b/board/freescale/mpc832xemds/Kconfig @@ -1,15 +1,12 @@ if TARGET_MPC832XEMDS config SYS_BOARD - string default "mpc832xemds" config SYS_VENDOR - string default "freescale" config SYS_CONFIG_NAME - string default "MPC832XEMDS" endif diff --git a/board/freescale/mpc8349emds/Kconfig b/board/freescale/mpc8349emds/Kconfig index 8f549dc..51f0b34 100644 --- a/board/freescale/mpc8349emds/Kconfig +++ b/board/freescale/mpc8349emds/Kconfig @@ -1,15 +1,12 @@ if TARGET_MPC8349EMDS config SYS_BOARD - string default "mpc8349emds" config SYS_VENDOR - string default "freescale" config SYS_CONFIG_NAME - string default "MPC8349EMDS" endif diff --git a/board/freescale/mpc8349itx/Kconfig b/board/freescale/mpc8349itx/Kconfig index af3fedd..ce3fffd 100644 --- a/board/freescale/mpc8349itx/Kconfig +++ b/board/freescale/mpc8349itx/Kconfig @@ -1,15 +1,12 @@ if TARGET_MPC8349ITX config SYS_BOARD - string default "mpc8349itx" config SYS_VENDOR - string default "freescale" config SYS_CONFIG_NAME - string default "MPC8349ITX" endif diff --git a/board/freescale/mpc8360emds/Kconfig b/board/freescale/mpc8360emds/Kconfig index d6e7766..3f4f95c 100644 --- a/board/freescale/mpc8360emds/Kconfig +++ b/board/freescale/mpc8360emds/Kconfig @@ -1,15 +1,12 @@ if TARGET_MPC8360EMDS config SYS_BOARD - string default "mpc8360emds" config SYS_VENDOR - string default "freescale" config SYS_CONFIG_NAME - string default "MPC8360EMDS" endif diff --git a/board/freescale/mpc8360emds/mpc8360emds.c b/board/freescale/mpc8360emds/mpc8360emds.c index ac96163..5ff9dff 100644 --- a/board/freescale/mpc8360emds/mpc8360emds.c +++ b/board/freescale/mpc8360emds/mpc8360emds.c @@ -11,13 +11,13 @@ #include <i2c.h> #include <miiphy.h> #include <phy.h> +#include <fsl_mdio.h> #if defined(CONFIG_PCI) #include <pci.h> #endif #include <spd_sdram.h> #include <asm/mmu.h> #include <asm/io.h> -#include <asm/fsl_enet.h> #include <asm/mmu.h> #if defined(CONFIG_OF_LIBFDT) #include <libfdt.h> diff --git a/board/freescale/mpc8360erdk/Kconfig b/board/freescale/mpc8360erdk/Kconfig index bfb3b1f..5c9be7c 100644 --- a/board/freescale/mpc8360erdk/Kconfig +++ b/board/freescale/mpc8360erdk/Kconfig @@ -1,15 +1,12 @@ if TARGET_MPC8360ERDK config SYS_BOARD - string default "mpc8360erdk" config SYS_VENDOR - string default "freescale" config SYS_CONFIG_NAME - string default "MPC8360ERDK" endif diff --git a/board/freescale/mpc837xemds/Kconfig b/board/freescale/mpc837xemds/Kconfig index b0357cb..20d29db 100644 --- a/board/freescale/mpc837xemds/Kconfig +++ b/board/freescale/mpc837xemds/Kconfig @@ -1,15 +1,12 @@ if TARGET_MPC837XEMDS config SYS_BOARD - string default "mpc837xemds" config SYS_VENDOR - string default "freescale" config SYS_CONFIG_NAME - string default "MPC837XEMDS" endif diff --git a/board/freescale/mpc837xemds/mpc837xemds.c b/board/freescale/mpc837xemds/mpc837xemds.c index 0a3c972..c749e55 100644 --- a/board/freescale/mpc837xemds/mpc837xemds.c +++ b/board/freescale/mpc837xemds/mpc837xemds.c @@ -10,7 +10,6 @@ #include <i2c.h> #include <asm/io.h> #include <asm/fsl_mpc83xx_serdes.h> -#include <asm/fsl_enet.h> #include <spd_sdram.h> #include <tsec.h> #include <libfdt.h> diff --git a/board/freescale/mpc837xerdb/Kconfig b/board/freescale/mpc837xerdb/Kconfig index f8e33e6..03415f9 100644 --- a/board/freescale/mpc837xerdb/Kconfig +++ b/board/freescale/mpc837xerdb/Kconfig @@ -1,15 +1,12 @@ if TARGET_MPC837XERDB config SYS_BOARD - string default "mpc837xerdb" config SYS_VENDOR - string default "freescale" config SYS_CONFIG_NAME - string default "MPC837XERDB" endif diff --git a/board/freescale/mpc8536ds/Kconfig b/board/freescale/mpc8536ds/Kconfig index c7c818c..1a6a9d4 100644 --- a/board/freescale/mpc8536ds/Kconfig +++ b/board/freescale/mpc8536ds/Kconfig @@ -1,15 +1,12 @@ if TARGET_MPC8536DS config SYS_BOARD - string default "mpc8536ds" config SYS_VENDOR - string default "freescale" config SYS_CONFIG_NAME - string default "MPC8536DS" endif diff --git a/board/freescale/mpc8540ads/Kconfig b/board/freescale/mpc8540ads/Kconfig index 2cf252c..35a8545 100644 --- a/board/freescale/mpc8540ads/Kconfig +++ b/board/freescale/mpc8540ads/Kconfig @@ -1,15 +1,12 @@ if TARGET_MPC8540ADS config SYS_BOARD - string default "mpc8540ads" config SYS_VENDOR - string default "freescale" config SYS_CONFIG_NAME - string default "MPC8540ADS" endif diff --git a/board/freescale/mpc8541cds/Kconfig b/board/freescale/mpc8541cds/Kconfig index 2beefc2..034eab2 100644 --- a/board/freescale/mpc8541cds/Kconfig +++ b/board/freescale/mpc8541cds/Kconfig @@ -1,15 +1,12 @@ if TARGET_MPC8541CDS config SYS_BOARD - string default "mpc8541cds" config SYS_VENDOR - string default "freescale" config SYS_CONFIG_NAME - string default "MPC8541CDS" endif diff --git a/board/freescale/mpc8544ds/Kconfig b/board/freescale/mpc8544ds/Kconfig index d55b680..c3e25b8 100644 --- a/board/freescale/mpc8544ds/Kconfig +++ b/board/freescale/mpc8544ds/Kconfig @@ -1,15 +1,12 @@ if TARGET_MPC8544DS config SYS_BOARD - string default "mpc8544ds" config SYS_VENDOR - string default "freescale" config SYS_CONFIG_NAME - string default "MPC8544DS" endif diff --git a/board/freescale/mpc8548cds/Kconfig b/board/freescale/mpc8548cds/Kconfig index 69d717e..09f3b0b 100644 --- a/board/freescale/mpc8548cds/Kconfig +++ b/board/freescale/mpc8548cds/Kconfig @@ -1,15 +1,12 @@ if TARGET_MPC8548CDS config SYS_BOARD - string default "mpc8548cds" config SYS_VENDOR - string default "freescale" config SYS_CONFIG_NAME - string default "MPC8548CDS" endif diff --git a/board/freescale/mpc8555cds/Kconfig b/board/freescale/mpc8555cds/Kconfig index 5858308..04bd572 100644 --- a/board/freescale/mpc8555cds/Kconfig +++ b/board/freescale/mpc8555cds/Kconfig @@ -1,15 +1,12 @@ if TARGET_MPC8555CDS config SYS_BOARD - string default "mpc8555cds" config SYS_VENDOR - string default "freescale" config SYS_CONFIG_NAME - string default "MPC8555CDS" endif diff --git a/board/freescale/mpc8560ads/Kconfig b/board/freescale/mpc8560ads/Kconfig index 55cdb62..828c068 100644 --- a/board/freescale/mpc8560ads/Kconfig +++ b/board/freescale/mpc8560ads/Kconfig @@ -1,15 +1,12 @@ if TARGET_MPC8560ADS config SYS_BOARD - string default "mpc8560ads" config SYS_VENDOR - string default "freescale" config SYS_CONFIG_NAME - string default "MPC8560ADS" endif diff --git a/board/freescale/mpc8568mds/Kconfig b/board/freescale/mpc8568mds/Kconfig index b02946b..4e178c5 100644 --- a/board/freescale/mpc8568mds/Kconfig +++ b/board/freescale/mpc8568mds/Kconfig @@ -1,15 +1,12 @@ if TARGET_MPC8568MDS config SYS_BOARD - string default "mpc8568mds" config SYS_VENDOR - string default "freescale" config SYS_CONFIG_NAME - string default "MPC8568MDS" endif diff --git a/board/freescale/mpc8569mds/Kconfig b/board/freescale/mpc8569mds/Kconfig index f13a07e..4871857 100644 --- a/board/freescale/mpc8569mds/Kconfig +++ b/board/freescale/mpc8569mds/Kconfig @@ -1,15 +1,12 @@ if TARGET_MPC8569MDS config SYS_BOARD - string default "mpc8569mds" config SYS_VENDOR - string default "freescale" config SYS_CONFIG_NAME - string default "MPC8569MDS" endif diff --git a/board/freescale/mpc8572ds/Kconfig b/board/freescale/mpc8572ds/Kconfig index 3794f03..38132cf 100644 --- a/board/freescale/mpc8572ds/Kconfig +++ b/board/freescale/mpc8572ds/Kconfig @@ -1,15 +1,12 @@ if TARGET_MPC8572DS config SYS_BOARD - string default "mpc8572ds" config SYS_VENDOR - string default "freescale" config SYS_CONFIG_NAME - string default "MPC8572DS" endif diff --git a/board/freescale/mpc8610hpcd/Kconfig b/board/freescale/mpc8610hpcd/Kconfig index 463a433..8f713be 100644 --- a/board/freescale/mpc8610hpcd/Kconfig +++ b/board/freescale/mpc8610hpcd/Kconfig @@ -1,15 +1,12 @@ if TARGET_MPC8610HPCD config SYS_BOARD - string default "mpc8610hpcd" config SYS_VENDOR - string default "freescale" config SYS_CONFIG_NAME - string default "MPC8610HPCD" endif diff --git a/board/freescale/mpc8641hpcn/Kconfig b/board/freescale/mpc8641hpcn/Kconfig index 9fc4241..ae45d63 100644 --- a/board/freescale/mpc8641hpcn/Kconfig +++ b/board/freescale/mpc8641hpcn/Kconfig @@ -1,15 +1,12 @@ if TARGET_MPC8641HPCN config SYS_BOARD - string default "mpc8641hpcn" config SYS_VENDOR - string default "freescale" config SYS_CONFIG_NAME - string default "MPC8641HPCN" endif diff --git a/board/freescale/mx23evk/Kconfig b/board/freescale/mx23evk/Kconfig index ee7911c..1bbbe2d 100644 --- a/board/freescale/mx23evk/Kconfig +++ b/board/freescale/mx23evk/Kconfig @@ -1,23 +1,18 @@ if TARGET_MX23EVK config SYS_CPU - string default "arm926ejs" config SYS_BOARD - string default "mx23evk" config SYS_VENDOR - string default "freescale" config SYS_SOC - string default "mxs" config SYS_CONFIG_NAME - string default "mx23evk" endif diff --git a/board/freescale/mx25pdk/Kconfig b/board/freescale/mx25pdk/Kconfig index 67cb5ec..a693239 100644 --- a/board/freescale/mx25pdk/Kconfig +++ b/board/freescale/mx25pdk/Kconfig @@ -1,23 +1,18 @@ if TARGET_MX25PDK config SYS_CPU - string default "arm926ejs" config SYS_BOARD - string default "mx25pdk" config SYS_VENDOR - string default "freescale" config SYS_SOC - string default "mx25" config SYS_CONFIG_NAME - string default "mx25pdk" endif diff --git a/board/freescale/mx28evk/Kconfig b/board/freescale/mx28evk/Kconfig index 2fe6f32..cc654bc 100644 --- a/board/freescale/mx28evk/Kconfig +++ b/board/freescale/mx28evk/Kconfig @@ -1,23 +1,18 @@ if TARGET_MX28EVK config SYS_CPU - string default "arm926ejs" config SYS_BOARD - string default "mx28evk" config SYS_VENDOR - string default "freescale" config SYS_SOC - string default "mxs" config SYS_CONFIG_NAME - string default "mx28evk" endif diff --git a/board/freescale/mx31ads/Kconfig b/board/freescale/mx31ads/Kconfig index 96116dd..b4ea64b 100644 --- a/board/freescale/mx31ads/Kconfig +++ b/board/freescale/mx31ads/Kconfig @@ -1,23 +1,18 @@ if TARGET_MX31ADS config SYS_CPU - string default "arm1136" config SYS_BOARD - string default "mx31ads" config SYS_VENDOR - string default "freescale" config SYS_SOC - string default "mx31" config SYS_CONFIG_NAME - string default "mx31ads" endif diff --git a/board/freescale/mx31pdk/Kconfig b/board/freescale/mx31pdk/Kconfig index 6ac6a59..68c3880 100644 --- a/board/freescale/mx31pdk/Kconfig +++ b/board/freescale/mx31pdk/Kconfig @@ -1,23 +1,18 @@ if TARGET_MX31PDK config SYS_CPU - string default "arm1136" config SYS_BOARD - string default "mx31pdk" config SYS_VENDOR - string default "freescale" config SYS_SOC - string default "mx31" config SYS_CONFIG_NAME - string default "mx31pdk" endif diff --git a/board/freescale/mx35pdk/Kconfig b/board/freescale/mx35pdk/Kconfig index 5555b0b..ca5b40f 100644 --- a/board/freescale/mx35pdk/Kconfig +++ b/board/freescale/mx35pdk/Kconfig @@ -1,23 +1,18 @@ if TARGET_MX35PDK config SYS_CPU - string default "arm1136" config SYS_BOARD - string default "mx35pdk" config SYS_VENDOR - string default "freescale" config SYS_SOC - string default "mx35" config SYS_CONFIG_NAME - string default "mx35pdk" endif diff --git a/board/freescale/mx51evk/Kconfig b/board/freescale/mx51evk/Kconfig index a6dbbdd..07861a9 100644 --- a/board/freescale/mx51evk/Kconfig +++ b/board/freescale/mx51evk/Kconfig @@ -1,23 +1,18 @@ if TARGET_MX51EVK config SYS_CPU - string default "armv7" config SYS_BOARD - string default "mx51evk" config SYS_VENDOR - string default "freescale" config SYS_SOC - string default "mx5" config SYS_CONFIG_NAME - string default "mx51evk" endif diff --git a/board/freescale/mx53ard/Kconfig b/board/freescale/mx53ard/Kconfig index eaaa1b2..566df85 100644 --- a/board/freescale/mx53ard/Kconfig +++ b/board/freescale/mx53ard/Kconfig @@ -1,23 +1,18 @@ if TARGET_MX53ARD config SYS_CPU - string default "armv7" config SYS_BOARD - string default "mx53ard" config SYS_VENDOR - string default "freescale" config SYS_SOC - string default "mx5" config SYS_CONFIG_NAME - string default "mx53ard" endif diff --git a/board/freescale/mx53evk/Kconfig b/board/freescale/mx53evk/Kconfig index dda1ada..d064b10 100644 --- a/board/freescale/mx53evk/Kconfig +++ b/board/freescale/mx53evk/Kconfig @@ -1,23 +1,18 @@ if TARGET_MX53EVK config SYS_CPU - string default "armv7" config SYS_BOARD - string default "mx53evk" config SYS_VENDOR - string default "freescale" config SYS_SOC - string default "mx5" config SYS_CONFIG_NAME - string default "mx53evk" endif diff --git a/board/freescale/mx53loco/Kconfig b/board/freescale/mx53loco/Kconfig index 8b285d2..bc44e59 100644 --- a/board/freescale/mx53loco/Kconfig +++ b/board/freescale/mx53loco/Kconfig @@ -1,23 +1,18 @@ if TARGET_MX53LOCO config SYS_CPU - string default "armv7" config SYS_BOARD - string default "mx53loco" config SYS_VENDOR - string default "freescale" config SYS_SOC - string default "mx5" config SYS_CONFIG_NAME - string default "mx53loco" endif diff --git a/board/freescale/mx53smd/Kconfig b/board/freescale/mx53smd/Kconfig index 1f7e42f..62c37d4 100644 --- a/board/freescale/mx53smd/Kconfig +++ b/board/freescale/mx53smd/Kconfig @@ -1,23 +1,18 @@ if TARGET_MX53SMD config SYS_CPU - string default "armv7" config SYS_BOARD - string default "mx53smd" config SYS_VENDOR - string default "freescale" config SYS_SOC - string default "mx5" config SYS_CONFIG_NAME - string default "mx53smd" endif diff --git a/board/freescale/mx6qarm2/Kconfig b/board/freescale/mx6qarm2/Kconfig index 2c42e9a..f7f18db 100644 --- a/board/freescale/mx6qarm2/Kconfig +++ b/board/freescale/mx6qarm2/Kconfig @@ -1,23 +1,18 @@ if TARGET_MX6QARM2 config SYS_CPU - string default "armv7" config SYS_BOARD - string default "mx6qarm2" config SYS_VENDOR - string default "freescale" config SYS_SOC - string default "mx6" config SYS_CONFIG_NAME - string default "mx6qarm2" endif diff --git a/board/freescale/mx6qsabreauto/Kconfig b/board/freescale/mx6qsabreauto/Kconfig index 21fb4fc..d0cf355 100644 --- a/board/freescale/mx6qsabreauto/Kconfig +++ b/board/freescale/mx6qsabreauto/Kconfig @@ -1,23 +1,18 @@ if TARGET_MX6QSABREAUTO config SYS_CPU - string default "armv7" config SYS_BOARD - string default "mx6qsabreauto" config SYS_VENDOR - string default "freescale" config SYS_SOC - string default "mx6" config SYS_CONFIG_NAME - string default "mx6qsabreauto" endif diff --git a/board/freescale/mx6sabresd/Kconfig b/board/freescale/mx6sabresd/Kconfig index 65d6736..15b65c0 100644 --- a/board/freescale/mx6sabresd/Kconfig +++ b/board/freescale/mx6sabresd/Kconfig @@ -1,23 +1,18 @@ if TARGET_MX6SABRESD config SYS_CPU - string default "armv7" config SYS_BOARD - string default "mx6sabresd" config SYS_VENDOR - string default "freescale" config SYS_SOC - string default "mx6" config SYS_CONFIG_NAME - string default "mx6sabresd" endif diff --git a/board/freescale/mx6slevk/Kconfig b/board/freescale/mx6slevk/Kconfig index 23c3154..558aeab 100644 --- a/board/freescale/mx6slevk/Kconfig +++ b/board/freescale/mx6slevk/Kconfig @@ -1,23 +1,18 @@ if TARGET_MX6SLEVK config SYS_CPU - string default "armv7" config SYS_BOARD - string default "mx6slevk" config SYS_VENDOR - string default "freescale" config SYS_SOC - string default "mx6" config SYS_CONFIG_NAME - string default "mx6slevk" endif diff --git a/board/freescale/mx6sxsabresd/Kconfig b/board/freescale/mx6sxsabresd/Kconfig index ee8f4a6..2a86b68 100644 --- a/board/freescale/mx6sxsabresd/Kconfig +++ b/board/freescale/mx6sxsabresd/Kconfig @@ -1,23 +1,18 @@ if TARGET_MX6SXSABRESD config SYS_CPU - string default "armv7" config SYS_BOARD - string default "mx6sxsabresd" config SYS_VENDOR - string default "freescale" config SYS_SOC - string default "mx6" config SYS_CONFIG_NAME - string default "mx6sxsabresd" endif diff --git a/board/freescale/p1010rdb/Kconfig b/board/freescale/p1010rdb/Kconfig index 2abe1c0..b0a7a8d 100644 --- a/board/freescale/p1010rdb/Kconfig +++ b/board/freescale/p1010rdb/Kconfig @@ -1,15 +1,12 @@ if TARGET_P1010RDB config SYS_BOARD - string default "p1010rdb" config SYS_VENDOR - string default "freescale" config SYS_CONFIG_NAME - string default "P1010RDB" endif diff --git a/board/freescale/p1022ds/Kconfig b/board/freescale/p1022ds/Kconfig index 39e37bd..f1792de 100644 --- a/board/freescale/p1022ds/Kconfig +++ b/board/freescale/p1022ds/Kconfig @@ -1,15 +1,12 @@ if TARGET_P1022DS config SYS_BOARD - string default "p1022ds" config SYS_VENDOR - string default "freescale" config SYS_CONFIG_NAME - string default "P1022DS" endif diff --git a/board/freescale/p1023rdb/Kconfig b/board/freescale/p1023rdb/Kconfig index 95d3295..1e4cd10 100644 --- a/board/freescale/p1023rdb/Kconfig +++ b/board/freescale/p1023rdb/Kconfig @@ -1,15 +1,12 @@ if TARGET_P1023RDB config SYS_BOARD - string default "p1023rdb" config SYS_VENDOR - string default "freescale" config SYS_CONFIG_NAME - string default "P1023RDB" endif diff --git a/board/freescale/p1_p2_rdb/Kconfig b/board/freescale/p1_p2_rdb/Kconfig index 6d718b9..d7ad35d 100644 --- a/board/freescale/p1_p2_rdb/Kconfig +++ b/board/freescale/p1_p2_rdb/Kconfig @@ -1,15 +1,12 @@ if TARGET_P1_P2_RDB config SYS_BOARD - string default "p1_p2_rdb" config SYS_VENDOR - string default "freescale" config SYS_CONFIG_NAME - string default "P1_P2_RDB" endif diff --git a/board/freescale/p1_p2_rdb_pc/Kconfig b/board/freescale/p1_p2_rdb_pc/Kconfig index 01b89fa..d3352d2 100644 --- a/board/freescale/p1_p2_rdb_pc/Kconfig +++ b/board/freescale/p1_p2_rdb_pc/Kconfig @@ -1,15 +1,12 @@ if TARGET_P1_P2_RDB_PC config SYS_BOARD - string default "p1_p2_rdb_pc" config SYS_VENDOR - string default "freescale" config SYS_CONFIG_NAME - string default "p1_p2_rdb_pc" endif diff --git a/board/freescale/p1_twr/Kconfig b/board/freescale/p1_twr/Kconfig index 5fb4705..8f9a8d4 100644 --- a/board/freescale/p1_twr/Kconfig +++ b/board/freescale/p1_twr/Kconfig @@ -1,15 +1,12 @@ if TARGET_P1_TWR config SYS_BOARD - string default "p1_twr" config SYS_VENDOR - string default "freescale" config SYS_CONFIG_NAME - string default "p1_twr" endif diff --git a/board/freescale/p2020come/Kconfig b/board/freescale/p2020come/Kconfig index d4d7e13..8ce5cf1 100644 --- a/board/freescale/p2020come/Kconfig +++ b/board/freescale/p2020come/Kconfig @@ -1,15 +1,12 @@ if TARGET_P2020COME config SYS_BOARD - string default "p2020come" config SYS_VENDOR - string default "freescale" config SYS_CONFIG_NAME - string default "P2020COME" endif diff --git a/board/freescale/p2020ds/Kconfig b/board/freescale/p2020ds/Kconfig index 29031d0..e527ec9 100644 --- a/board/freescale/p2020ds/Kconfig +++ b/board/freescale/p2020ds/Kconfig @@ -1,15 +1,12 @@ if TARGET_P2020DS config SYS_BOARD - string default "p2020ds" config SYS_VENDOR - string default "freescale" config SYS_CONFIG_NAME - string default "P2020DS" endif diff --git a/board/freescale/p2041rdb/Kconfig b/board/freescale/p2041rdb/Kconfig index b086b1b..78e1121 100644 --- a/board/freescale/p2041rdb/Kconfig +++ b/board/freescale/p2041rdb/Kconfig @@ -1,15 +1,12 @@ if TARGET_P2041RDB config SYS_BOARD - string default "p2041rdb" config SYS_VENDOR - string default "freescale" config SYS_CONFIG_NAME - string default "P2041RDB" endif diff --git a/board/freescale/qemu-ppce500/Kconfig b/board/freescale/qemu-ppce500/Kconfig index 314f6a1..236cd17 100644 --- a/board/freescale/qemu-ppce500/Kconfig +++ b/board/freescale/qemu-ppce500/Kconfig @@ -1,15 +1,12 @@ if TARGET_QEMU_PPCE500 config SYS_BOARD - string default "qemu-ppce500" config SYS_VENDOR - string default "freescale" config SYS_CONFIG_NAME - string default "qemu-ppce500" endif diff --git a/board/freescale/t1040qds/Kconfig b/board/freescale/t1040qds/Kconfig index c1c96f0..1bb1684 100644 --- a/board/freescale/t1040qds/Kconfig +++ b/board/freescale/t1040qds/Kconfig @@ -1,15 +1,12 @@ if TARGET_T1040QDS config SYS_BOARD - string default "t1040qds" config SYS_VENDOR - string default "freescale" config SYS_CONFIG_NAME - string default "T1040QDS" endif diff --git a/board/freescale/t104xrdb/Kconfig b/board/freescale/t104xrdb/Kconfig index d0fd3de..f28728d 100644 --- a/board/freescale/t104xrdb/Kconfig +++ b/board/freescale/t104xrdb/Kconfig @@ -1,15 +1,12 @@ if TARGET_T104XRDB config SYS_BOARD - string default "t104xrdb" config SYS_VENDOR - string default "freescale" config SYS_CONFIG_NAME - string default "T104xRDB" endif diff --git a/board/freescale/t208xqds/Kconfig b/board/freescale/t208xqds/Kconfig index 3d0c6ab..4e329dd 100644 --- a/board/freescale/t208xqds/Kconfig +++ b/board/freescale/t208xqds/Kconfig @@ -1,15 +1,12 @@ if TARGET_T208XQDS config SYS_BOARD - string default "t208xqds" config SYS_VENDOR - string default "freescale" config SYS_CONFIG_NAME - string default "T208xQDS" endif diff --git a/board/freescale/t208xrdb/Kconfig b/board/freescale/t208xrdb/Kconfig index f8d2c3c..845af3d 100644 --- a/board/freescale/t208xrdb/Kconfig +++ b/board/freescale/t208xrdb/Kconfig @@ -1,15 +1,12 @@ if TARGET_T208XRDB config SYS_BOARD - string default "t208xrdb" config SYS_VENDOR - string default "freescale" config SYS_CONFIG_NAME - string default "T208xRDB" endif diff --git a/board/freescale/t4qds/Kconfig b/board/freescale/t4qds/Kconfig index f4b0ba2..ab34b9e 100644 --- a/board/freescale/t4qds/Kconfig +++ b/board/freescale/t4qds/Kconfig @@ -1,15 +1,12 @@ if TARGET_T4240EMU config SYS_BOARD - string default "t4qds" config SYS_VENDOR - string default "freescale" config SYS_CONFIG_NAME - string default "T4240EMU" endif @@ -17,15 +14,12 @@ endif if TARGET_T4240QDS config SYS_BOARD - string default "t4qds" config SYS_VENDOR - string default "freescale" config SYS_CONFIG_NAME - string default "T4240QDS" endif diff --git a/board/freescale/t4rdb/Kconfig b/board/freescale/t4rdb/Kconfig index 07e3c0d..d93e453 100644 --- a/board/freescale/t4rdb/Kconfig +++ b/board/freescale/t4rdb/Kconfig @@ -1,15 +1,12 @@ if TARGET_T4240RDB config SYS_BOARD - string default "t4rdb" config SYS_VENDOR - string default "freescale" config SYS_CONFIG_NAME - string default "T4240RDB" endif diff --git a/board/freescale/vf610twr/Kconfig b/board/freescale/vf610twr/Kconfig index 56bc52a..684ef27 100644 --- a/board/freescale/vf610twr/Kconfig +++ b/board/freescale/vf610twr/Kconfig @@ -1,23 +1,18 @@ if TARGET_VF610TWR config SYS_CPU - string default "armv7" config SYS_BOARD - string default "vf610twr" config SYS_VENDOR - string default "freescale" config SYS_SOC - string default "vf610" config SYS_CONFIG_NAME - string default "vf610twr" endif |