diff options
Diffstat (limited to 'board/freescale')
47 files changed, 468 insertions, 387 deletions
diff --git a/board/freescale/common/Makefile b/board/freescale/common/Makefile index 02a824d..620eb16 100644 --- a/board/freescale/common/Makefile +++ b/board/freescale/common/Makefile @@ -33,6 +33,7 @@ COBJS-${CONFIG_FSL_CADMUS} += cadmus.o COBJS-${CONFIG_FSL_VIA} += cds_via.o COBJS-${CONFIG_FSL_DIU_FB} += fsl_diu_fb.o fsl_logo_bmp.o COBJS-${CONFIG_FSL_PIXIS} += pixis.o +COBJS-${CONFIG_FSL_NGPIXIS} += ngpixis.o COBJS-${CONFIG_PQ_MDS_PIB} += pq-mds-pib.o COBJS-${CONFIG_ID_EEPROM} += sys_eeprom.o COBJS-${CONFIG_FSL_SGMII_RISER} += sgmii_riser.o diff --git a/board/freescale/common/ngpixis.c b/board/freescale/common/ngpixis.c new file mode 100644 index 0000000..bb6794e --- /dev/null +++ b/board/freescale/common/ngpixis.c @@ -0,0 +1,136 @@ +/** + * Copyright 2010 Freescale Semiconductor + * Author: Timur Tabi <timur@freescale.com> + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the Free + * Software Foundation; either version 2 of the License, or (at your option) + * any later version. + * + * This file provides support for the ngPIXIS, a board-specific FPGA used on + * some Freescale reference boards. + * + * A "switch" is black rectangular block on the motherboard. It contains + * eight "bits". The ngPIXIS has a set of memory-mapped registers (SWx) that + * shadow the actual physical switches. There is also another set of + * registers (ENx) that tell the ngPIXIS which bits of SWx should actually be + * used to override the values of the bits in the physical switches. + * + * The following macros need to be defined: + * + * PIXIS_BASE - The virtual address of the base of the PIXIS register map + * + * PIXIS_LBMAP_SWITCH - The switch number (i.e. the "x" in "SWx"). This value + * is used in the PIXIS_SW() macro to determine which offset in + * the PIXIS register map corresponds to the physical switch that controls + * the boot bank. + * + * PIXIS_LBMAP_MASK - A bit mask the defines which bits in SWx to use. + * + * PIXIS_LBMAP_SHIFT - The shift value that corresponds to PIXIS_LBMAP_MASK. + * + * PIXIS_LBMAP_ALTBANK - The value to program into SWx to tell the ngPIXIS to + * boot from the alternate bank. + */ + +#include <common.h> +#include <command.h> +#include <watchdog.h> +#include <asm/cache.h> +#include <asm/io.h> + +#include "ngpixis.h" + +/* + * Reset the board. This ignores the ENx registers. + */ +void pixis_reset(void) +{ + out_8(&pixis->rst, 0); + + while (1); +} + +/* + * Reset the board. Like pixis_reset(), but it honors the ENx registers. + */ +void pixis_bank_reset(void) +{ + out_8(&pixis->vctl, 0); + out_8(&pixis->vctl, 1); + + while (1); +} + +/** + * Set the boot bank to the power-on default bank + */ +void clear_altbank(void) +{ + /* Tell the ngPIXIS to use this the bits in the physical switch for the + * boot bank value, instead of the SWx register. We need to be careful + * only to set the bits in SWx that correspond to the boot bank. + */ + clrbits_8(&PIXIS_EN(PIXIS_LBMAP_SWITCH), PIXIS_LBMAP_MASK); +} + +/** + * Set the boot bank to the alternate bank + */ +void set_altbank(void) +{ + /* Program the alternate bank number into the SWx register. + */ + clrsetbits_8(&PIXIS_SW(PIXIS_LBMAP_SWITCH), PIXIS_LBMAP_MASK, + PIXIS_LBMAP_ALTBANK); + + /* Tell the ngPIXIS to use this the bits in the SWx register for the + * boot bank value, instead of the physical switch. We need to be + * careful only to set the bits in SWx that correspond to the boot bank. + */ + setbits_8(&PIXIS_EN(PIXIS_LBMAP_SWITCH), PIXIS_LBMAP_MASK); +} + + +int pixis_reset_cmd(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) +{ + unsigned int i; + char *p_altbank = NULL; + char *unknown_param = NULL; + + /* No args is a simple reset request. + */ + if (argc <= 1) + pixis_reset(); + + for (i = 1; i < argc; i++) { + if (strcmp(argv[i], "altbank") == 0) { + p_altbank = argv[i]; + continue; + } + + unknown_param = argv[i]; + } + + if (unknown_param) { + printf("Invalid option: %s\n", unknown_param); + return 1; + } + + if (p_altbank) + set_altbank(); + else + clear_altbank(); + + pixis_bank_reset(); + + /* Shouldn't be reached. */ + return 0; +} + +U_BOOT_CMD( + pixis_reset, CONFIG_SYS_MAXARGS, 1, pixis_reset_cmd, + "Reset the board using the FPGA sequencer", + "- hard reset to default bank\n" + "pixis_reset altbank - reset to alternate bank\n" + ); diff --git a/board/freescale/common/ngpixis.h b/board/freescale/common/ngpixis.h new file mode 100644 index 0000000..284d044 --- /dev/null +++ b/board/freescale/common/ngpixis.h @@ -0,0 +1,57 @@ +/** + * Copyright 2010 Freescale Semiconductor + * Author: Timur Tabi <timur@freescale.com> + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the Free + * Software Foundation; either version 2 of the License, or (at your option) + * any later version. + * + * This file provides support for the ngPIXIS, a board-specific FPGA used on + * some Freescale reference boards. + */ + +/* ngPIXIS register set. Hopefully, this won't change too much over time. + * Feel free to add board-specific #ifdefs where necessary. + */ +typedef struct ngpixis { + u8 id; + u8 arch; + u8 scver; + u8 csr; + u8 rst; + u8 res1; + u8 aux; + u8 spd; + u8 brdcfg0; + u8 dma; + u8 addr; + u8 res2[2]; + u8 data; + u8 led; + u8 res3; + u8 vctl; + u8 vstat; + u8 vcfgen0; + u8 res4; + u8 ocmcsr; + u8 ocmmsg; + u8 gmdbg; + u8 res5[2]; + u8 sclk[3]; + u8 dclk[3]; + u8 watch; + struct { + u8 sw; + u8 en; + } s[8]; +} ngpixis_t __attribute__ ((aligned(1))); + +/* Pointer to the PIXIS register set */ +#define pixis ((ngpixis_t *)PIXIS_BASE) + +/* The PIXIS SW register that corresponds to board switch X, where x >= 1 */ +#define PIXIS_SW(x) (pixis->s[(x) - 1].sw) + +/* The PIXIS EN register that corresponds to board switch X, where x >= 1 */ +#define PIXIS_EN(x) (pixis->s[(x) - 1].en) diff --git a/board/freescale/common/pixis.c b/board/freescale/common/pixis.c index 7210512..119eaf9 100644 --- a/board/freescale/common/pixis.c +++ b/board/freescale/common/pixis.c @@ -1,5 +1,5 @@ /* - * Copyright 2006 Freescale Semiconductor + * Copyright 2006,2010 Freescale Semiconductor * Jeff Brown * Srikanth Srinivasan (srikanth.srinivasan@freescale.com) * @@ -24,33 +24,26 @@ #include <common.h> #include <command.h> -#include <watchdog.h> -#include <asm/cache.h> #include <asm/io.h> -#include "pixis.h" - - -static ulong strfractoint(uchar *strptr); - +#define pixis_base (u8 *)PIXIS_BASE /* * Simple board reset. */ void pixis_reset(void) { - u8 *pixis_base = (u8 *)PIXIS_BASE; out_8(pixis_base + PIXIS_RST, 0); -} + while (1); +} /* * Per table 27, page 58 of MPC8641HPCN spec. */ -int set_px_sysclk(ulong sysclk) +static int set_px_sysclk(unsigned long sysclk) { u8 sysclk_s, sysclk_r, sysclk_v, vclkh, vclkl, sysclk_aux; - u8 *pixis_base = (u8 *)PIXIS_BASE; switch (sysclk) { case 33: @@ -117,13 +110,13 @@ int set_px_sysclk(ulong sysclk) return 1; } - -int set_px_mpxpll(ulong mpxpll) +/* Set the CFG_SYSPLL bits + * + * This only has effect if PX_VCFGEN0[SYSPLL]=1, which is true if + * read_from_px_regs() is called. + */ +static int set_px_mpxpll(unsigned long mpxpll) { - u8 tmp; - u8 val; - u8 *pixis_base = (u8 *)PIXIS_BASE; - switch (mpxpll) { case 2: case 4: @@ -133,28 +126,19 @@ int set_px_mpxpll(ulong mpxpll) case 12: case 14: case 16: - val = (u8) mpxpll; - break; - default: - printf("Unsupported MPXPLL ratio.\n"); - return 0; + clrsetbits_8(pixis_base + PIXIS_VSPEED1, 0x1F, mpxpll); + return 1; } - tmp = in_8(pixis_base + PIXIS_VSPEED1); - tmp = (tmp & 0xF0) | (val & 0x0F); - out_8(pixis_base + PIXIS_VSPEED1, tmp); - - return 1; + printf("Unsupported MPXPLL ratio.\n"); + return 0; } - -int set_px_corepll(ulong corepll) +static int set_px_corepll(unsigned long corepll) { - u8 tmp; u8 val; - u8 *pixis_base = (u8 *)PIXIS_BASE; - switch ((int)corepll) { + switch (corepll) { case 20: val = 0x08; break; @@ -178,113 +162,132 @@ int set_px_corepll(ulong corepll) return 0; } - tmp = in_8(pixis_base + PIXIS_VSPEED0); - tmp = (tmp & 0xE0) | (val & 0x1F); - out_8(pixis_base + PIXIS_VSPEED0, tmp); - + clrsetbits_8(pixis_base + PIXIS_VSPEED0, 0x1F, val); return 1; } +#ifndef CONFIG_SYS_PIXIS_VCFGEN0_ENABLE +#define CONFIG_SYS_PIXIS_VCFGEN0_ENABLE 0x1C +#endif -void read_from_px_regs(int set) +/* Tell the PIXIS where to find the COREPLL, MPXPLL, SYSCLK values + * + * The PIXIS can be programmed to look at either the on-board dip switches + * or various other PIXIS registers to determine the values for COREPLL, + * MPXPLL, and SYSCLK. + * + * CONFIG_SYS_PIXIS_VCFGEN0_ENABLE is the value to write to the PIXIS_VCFGEN0 + * register that tells the pixis to use the various PIXIS register. + */ +static void read_from_px_regs(int set) { - u8 *pixis_base = (u8 *)PIXIS_BASE; - u8 mask = 0x1C; /* COREPLL, MPXPLL, SYSCLK controlled by PIXIS */ u8 tmp = in_8(pixis_base + PIXIS_VCFGEN0); if (set) - tmp = tmp | mask; + tmp = tmp | CONFIG_SYS_PIXIS_VCFGEN0_ENABLE; else - tmp = tmp & ~mask; + tmp = tmp & ~CONFIG_SYS_PIXIS_VCFGEN0_ENABLE; + out_8(pixis_base + PIXIS_VCFGEN0, tmp); } +/* CONFIG_SYS_PIXIS_VBOOT_ENABLE is the value to write to the PX_VCFGEN1 + * register that tells the pixis to use the PX_VBOOT[LBMAP] register. + */ +#ifndef CONFIG_SYS_PIXIS_VBOOT_ENABLE +#define CONFIG_SYS_PIXIS_VBOOT_ENABLE 0x04 +#endif -void read_from_px_regs_altbank(int set) +/* Configure the source of the boot location + * + * The PIXIS can be programmed to look at either the on-board dip switches + * or the PX_VBOOT[LBMAP] register to determine where we should boot. + * + * If we want to boot from the alternate boot bank, we need to tell the PIXIS + * to ignore the on-board dip switches and use the PX_VBOOT[LBMAP] instead. + */ +static void read_from_px_regs_altbank(int set) { - u8 *pixis_base = (u8 *)PIXIS_BASE; - u8 mask = 0x04; /* FLASHBANK and FLASHMAP controlled by PIXIS */ u8 tmp = in_8(pixis_base + PIXIS_VCFGEN1); if (set) - tmp = tmp | mask; + tmp = tmp | CONFIG_SYS_PIXIS_VBOOT_ENABLE; else - tmp = tmp & ~mask; + tmp = tmp & ~CONFIG_SYS_PIXIS_VBOOT_ENABLE; + out_8(pixis_base + PIXIS_VCFGEN1, tmp); } +/* CONFIG_SYS_PIXIS_VBOOT_MASK contains the bits to set in VBOOT register that + * tells the PIXIS what the alternate flash bank is. + * + * Note that it's not really a mask. It contains the actual LBMAP bits that + * must be set to select the alternate bank. This code assumes that the + * primary bank has these bits set to 0, and the alternate bank has these + * bits set to 1. + */ #ifndef CONFIG_SYS_PIXIS_VBOOT_MASK #define CONFIG_SYS_PIXIS_VBOOT_MASK (0x40) #endif -void clear_altbank(void) +/* Tell the PIXIS to boot from the default flash bank + * + * Program the default flash bank into the VBOOT register. This register is + * used only if PX_VCFGEN1[FLASH]=1. + */ +static void clear_altbank(void) { - u8 tmp; - u8 *pixis_base = (u8 *)PIXIS_BASE; - - tmp = in_8(pixis_base + PIXIS_VBOOT); - tmp &= ~CONFIG_SYS_PIXIS_VBOOT_MASK; - - out_8(pixis_base + PIXIS_VBOOT, tmp); + clrbits_8(pixis_base + PIXIS_VBOOT, CONFIG_SYS_PIXIS_VBOOT_MASK); } - -void set_altbank(void) +/* Tell the PIXIS to boot from the alternate flash bank + * + * Program the alternate flash bank into the VBOOT register. This register is + * used only if PX_VCFGEN1[FLASH]=1. + */ +static void set_altbank(void) { - u8 tmp; - u8 *pixis_base = (u8 *)PIXIS_BASE; - - tmp = in_8(pixis_base + PIXIS_VBOOT); - tmp |= CONFIG_SYS_PIXIS_VBOOT_MASK; - - out_8(pixis_base + PIXIS_VBOOT, tmp); + setbits_8(pixis_base + PIXIS_VBOOT, CONFIG_SYS_PIXIS_VBOOT_MASK); } - -void set_px_go(void) +/* Reset the board with watchdog disabled. + * + * This respects the altbank setting. + */ +static void set_px_go(void) { - u8 tmp; - u8 *pixis_base = (u8 *)PIXIS_BASE; + /* Disable the VELA sequencer and watchdog */ + clrbits_8(pixis_base + PIXIS_VCTL, 9); - tmp = in_8(pixis_base + PIXIS_VCTL); - tmp = tmp & 0x1E; /* clear GO bit */ - out_8(pixis_base + PIXIS_VCTL, tmp); + /* Reboot by starting the VELA sequencer */ + setbits_8(pixis_base + PIXIS_VCTL, 0x1); - tmp = in_8(pixis_base + PIXIS_VCTL); - tmp = tmp | 0x01; /* set GO bit - start reset sequencer */ - out_8(pixis_base + PIXIS_VCTL, tmp); + while (1); } - -void set_px_go_with_watchdog(void) +/* Reset the board with watchdog enabled. + * + * This respects the altbank setting. + */ +static void set_px_go_with_watchdog(void) { - u8 tmp; - u8 *pixis_base = (u8 *)PIXIS_BASE; + /* Disable the VELA sequencer */ + clrbits_8(pixis_base + PIXIS_VCTL, 1); - tmp = in_8(pixis_base + PIXIS_VCTL); - tmp = tmp & 0x1E; - out_8(pixis_base + PIXIS_VCTL, tmp); + /* Enable the watchdog and reboot by starting the VELA sequencer */ + setbits_8(pixis_base + PIXIS_VCTL, 0x9); - tmp = in_8(pixis_base + PIXIS_VCTL); - tmp = tmp | 0x09; - out_8(pixis_base + PIXIS_VCTL, tmp); + while (1); } - -int pixis_disable_watchdog_cmd(cmd_tbl_t *cmdtp, - int flag, int argc, char *argv[]) +/* Disable the watchdog + * + */ +static int pixis_disable_watchdog_cmd(cmd_tbl_t *cmdtp, int flag, int argc, + char *argv[]) { - u8 tmp; - u8 *pixis_base = (u8 *)PIXIS_BASE; - - tmp = in_8(pixis_base + PIXIS_VCTL); - tmp = tmp & 0x1E; - out_8(pixis_base + PIXIS_VCTL, tmp); - - /* setting VCTL[WDEN] to 0 to disable watch dog */ - tmp = in_8(pixis_base + PIXIS_VCTL); - tmp &= ~0x08; - out_8(pixis_base + PIXIS_VCTL, tmp); + /* Disable the VELA sequencer and the watchdog */ + clrbits_8(pixis_base + PIXIS_VCTL, 9); return 0; } @@ -296,16 +299,17 @@ U_BOOT_CMD( ); #ifdef CONFIG_PIXIS_SGMII_CMD -int pixis_set_sgmii(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) + +/* Enable or disable SGMII mode for a TSEC + */ +static int pixis_set_sgmii(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) { int which_tsec = -1; - u8 *pixis_base = (u8 *)PIXIS_BASE; - uchar mask; - uchar switch_mask; + unsigned char mask; + unsigned char switch_mask; - if (argc > 2) - if (strcmp(argv[1], "all") != 0) - which_tsec = simple_strtoul(argv[1], NULL, 0); + if ((argc > 2) && (strcmp(argv[1], "all") != 0)) + which_tsec = simple_strtoul(argv[1], NULL, 0); switch (which_tsec) { #ifdef CONFIG_TSEC1 @@ -363,6 +367,7 @@ U_BOOT_CMD( " off - disables SGMII\n" " switch - use switch settings" ); + #endif /* @@ -371,14 +376,13 @@ U_BOOT_CMD( * FPGA register values. * input: strptr i.e. argv[2] */ - -static ulong strfractoint(uchar *strptr) +static unsigned long strfractoint(char *strptr) { - int i, j, retval; + int i, j; int mulconst; - int intarr_len = 0, decarr_len = 0, no_dec = 0; - ulong intval = 0, decval = 0; - uchar intarr[3], decarr[3]; + int intarr_len, no_dec = 0; + unsigned long intval = 0, decval = 0; + char intarr[3], decarr[3]; /* Assign the integer part to intarr[] * If there is no decimal point i.e. @@ -412,26 +416,21 @@ static ulong strfractoint(uchar *strptr) j++; } - decarr_len = j; decarr[j] = '\0'; mulconst = 1; - for (i = 0; i < decarr_len; i++) + for (i = 0; i < j; i++) mulconst *= 10; - decval = simple_strtoul((char *)decarr, NULL, 10); + decval = simple_strtoul(decarr, NULL, 10); } - intval = simple_strtoul((char *)intarr, NULL, 10); + intval = simple_strtoul(intarr, NULL, 10); intval = intval * mulconst; - retval = intval + decval; - - return retval; + return intval + decval; } - -int -pixis_reset_cmd(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) +static int pixis_reset_cmd(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) { unsigned int i; char *p_cf = NULL; @@ -440,7 +439,7 @@ pixis_reset_cmd(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) char *p_cf_mpxpll = NULL; char *p_altbank = NULL; char *p_wd = NULL; - unsigned int unknown_param = 0; + int unknown_param = 0; /* * No args is a simple reset request. @@ -493,9 +492,9 @@ pixis_reset_cmd(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) */ read_from_px_regs(0); - if (p_altbank) { + if (p_altbank) read_from_px_regs_altbank(0); - } + clear_altbank(); /* @@ -507,7 +506,7 @@ pixis_reset_cmd(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) unsigned long mpxpll; sysclk = simple_strtoul(p_cf_sysclk, NULL, 10); - corepll = strfractoint((uchar *) p_cf_corepll); + corepll = strfractoint(p_cf_corepll); mpxpll = simple_strtoul(p_cf_mpxpll, NULL, 10); if (!(set_px_sysclk(sysclk) @@ -536,11 +535,10 @@ pixis_reset_cmd(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) /* * Reset with watchdog specified. */ - if (p_wd) { + if (p_wd) set_px_go_with_watchdog(); - } else { + else set_px_go(); - } /* * Shouldn't be reached. diff --git a/board/freescale/common/pixis.h b/board/freescale/common/pixis.h deleted file mode 100644 index ff62a62..0000000 --- a/board/freescale/common/pixis.h +++ /dev/null @@ -1,31 +0,0 @@ -/* - * Copyright 2006 Freescale Semiconductor - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -extern void pixis_reset(void); -extern int set_px_sysclk(ulong sysclk); -extern int set_px_mpxpll(ulong mpxpll); -extern int set_px_corepll(ulong corepll); -extern void read_from_px_regs(int set); -extern void read_from_px_regs_altbank(int set); -extern void set_altbank(void); -extern void set_px_go(void); -extern void set_px_go_with_watchdog(void); diff --git a/board/freescale/m5208evbe/u-boot.lds b/board/freescale/m5208evbe/u-boot.lds index bc9d5cd..507e21a 100644 --- a/board/freescale/m5208evbe/u-boot.lds +++ b/board/freescale/m5208evbe/u-boot.lds @@ -55,9 +55,9 @@ SECTIONS /* WARNING - the following is hand-optimized to fit within */ /* the sector layout of our flash chips! XXX FIXME XXX */ - cpu/mcf52x2/start.o (.text) - cpu/mcf52x2/libmcf52x2.a (.text) - lib_m68k/libm68k.a (.text) + arch/m68k/cpu/mcf52x2/start.o (.text) + arch/m68k/cpu/mcf52x2/libmcf52x2.a (.text) + arch/m68k/lib/libm68k.a (.text) common/dlmalloc.o (.text) . = DEFINED(env_offset) ? env_offset : .; diff --git a/board/freescale/m52277evb/u-boot.spa b/board/freescale/m52277evb/u-boot.spa index 7ae70d4..4591196 100644 --- a/board/freescale/m52277evb/u-boot.spa +++ b/board/freescale/m52277evb/u-boot.spa @@ -55,10 +55,10 @@ SECTIONS /* WARNING - the following is hand-optimized to fit within */ /* the sector layout of our flash chips! XXX FIXME XXX */ - cpu/mcf5227x/start.o (.text) - cpu/mcf5227x/libmcf5227x.a (.text) - lib_m68k/libm68k.a (.text) - lib_generic/libgeneric.a (.text) + arch/m68k/cpu/mcf5227x/start.o (.text) + arch/m68k/cpu/mcf5227x/libmcf5227x.a (.text) + arch/m68k/lib/libm68k.a (.text) + lib/libgeneric.a (.text) common/cmd_mem.o (.text) common/main.o (.text) diff --git a/board/freescale/m52277evb/u-boot.stm b/board/freescale/m52277evb/u-boot.stm index 03ff532..1ec83e9 100644 --- a/board/freescale/m52277evb/u-boot.stm +++ b/board/freescale/m52277evb/u-boot.stm @@ -55,7 +55,7 @@ SECTIONS /* WARNING - the following is hand-optimized to fit within */ /* the sector layout of our flash chips! XXX FIXME XXX */ - cpu/mcf5227x/start.o (.text) + arch/m68k/cpu/mcf5227x/start.o (.text) *(.text) *(.fixup) diff --git a/board/freescale/m5235evb/u-boot.16 b/board/freescale/m5235evb/u-boot.16 index c134884..d7bd10f 100644 --- a/board/freescale/m5235evb/u-boot.16 +++ b/board/freescale/m5235evb/u-boot.16 @@ -55,12 +55,12 @@ SECTIONS /* WARNING - the following is hand-optimized to fit within */ /* the sector layout of our flash chips! XXX FIXME XXX */ - cpu/mcf523x/start.o (.text) - cpu/mcf523x/cpu_init.o (.text) - lib_m68k/traps.o (.text) - lib_m68k/interrupts.o (.text) + arch/m68k/cpu/mcf523x/start.o (.text) + arch/m68k/cpu/mcf523x/cpu_init.o (.text) + arch/m68k/lib/traps.o (.text) + arch/m68k/lib/interrupts.o (.text) common/dlmalloc.o (.text) - lib_generic/zlib.o (.text) + lib/zlib.o (.text) . = DEFINED(env_offset) ? env_offset : .; common/env_embedded.o (.text) diff --git a/board/freescale/m5235evb/u-boot.32 b/board/freescale/m5235evb/u-boot.32 index 53c337d..45ff158 100644 --- a/board/freescale/m5235evb/u-boot.32 +++ b/board/freescale/m5235evb/u-boot.32 @@ -55,12 +55,12 @@ SECTIONS /* WARNING - the following is hand-optimized to fit within */ /* the sector layout of our flash chips! XXX FIXME XXX */ - cpu/mcf523x/start.o (.text) - cpu/mcf523x/cpu.o (.text) - cpu/mcf523x/cpu_init.o (.text) - cpu/mcf523x/interrupts.o (.text) - cpu/mcf523x/speed.o (.text) - lib_m68k/libm68k.a (.text) + arch/m68k/cpu/mcf523x/start.o (.text) + arch/m68k/cpu/mcf523x/cpu.o (.text) + arch/m68k/cpu/mcf523x/cpu_init.o (.text) + arch/m68k/cpu/mcf523x/interrupts.o (.text) + arch/m68k/cpu/mcf523x/speed.o (.text) + arch/m68k/lib/libm68k.a (.text) common/dlmalloc.o (.text) common/cmd_bootm.o (.text) common/cmd_flash.o (.text) @@ -68,7 +68,7 @@ SECTIONS common/cmd_mem.o (.text) common/console.o (.text) common/main.o (.text) - lib_generic/libgeneric.a (.text) + lib/libgeneric.a (.text) . = DEFINED(env_offset) ? env_offset : .; common/env_embedded.o (.text) diff --git a/board/freescale/m5249evb/u-boot.lds b/board/freescale/m5249evb/u-boot.lds index e3230b9..d4fd705 100644 --- a/board/freescale/m5249evb/u-boot.lds +++ b/board/freescale/m5249evb/u-boot.lds @@ -55,11 +55,11 @@ SECTIONS /* WARNING - the following is hand-optimized to fit within */ /* the sector layout of our flash chips! XXX FIXME XXX */ - cpu/mcf52x2/start.o (.text) - lib_m68k/traps.o (.text) - cpu/mcf52x2/interrupts.o (.text) + arch/m68k/cpu/mcf52x2/start.o (.text) + arch/m68k/lib/traps.o (.text) + arch/m68k/cpu/mcf52x2/interrupts.o (.text) common/dlmalloc.o (.text) - lib_generic/zlib.o (.text) + lib/zlib.o (.text) . = DEFINED(env_offset) ? env_offset : .; common/env_embedded.o (.text) diff --git a/board/freescale/m5253demo/u-boot.lds b/board/freescale/m5253demo/u-boot.lds index 6cb5ee0..4f8bb20 100644 --- a/board/freescale/m5253demo/u-boot.lds +++ b/board/freescale/m5253demo/u-boot.lds @@ -55,11 +55,11 @@ SECTIONS /* WARNING - the following is hand-optimized to fit within */ /* the sector layout of our flash chips! XXX FIXME XXX */ - cpu/mcf52x2/start.o (.text) - lib_m68k/traps.o (.text) - cpu/mcf52x2/interrupts.o (.text) + arch/m68k/cpu/mcf52x2/start.o (.text) + arch/m68k/lib/traps.o (.text) + arch/m68k/cpu/mcf52x2/interrupts.o (.text) common/dlmalloc.o (.text) - lib_generic/zlib.o (.text) + lib/zlib.o (.text) . = DEFINED(env_offset) ? env_offset : .; common/env_embedded.o (.text) diff --git a/board/freescale/m5253evbe/u-boot.lds b/board/freescale/m5253evbe/u-boot.lds index 132fccf..797c837 100644 --- a/board/freescale/m5253evbe/u-boot.lds +++ b/board/freescale/m5253evbe/u-boot.lds @@ -55,11 +55,11 @@ SECTIONS /* WARNING - the following is hand-optimized to fit within */ /* the sector layout of our flash chips! XXX FIXME XXX */ - cpu/mcf52x2/start.o (.text) - lib_m68k/traps.o (.text) - cpu/mcf52x2/interrupts.o (.text) + arch/m68k/cpu/mcf52x2/start.o (.text) + arch/m68k/lib/traps.o (.text) + arch/m68k/cpu/mcf52x2/interrupts.o (.text) common/dlmalloc.o (.text) - lib_generic/zlib.o (.text) + lib/zlib.o (.text) . = DEFINED(env_offset) ? env_offset : .; common/env_embedded.o (.text) diff --git a/board/freescale/m5271evb/m5271evb.c b/board/freescale/m5271evb/m5271evb.c index 5505cc4..446f102 100644 --- a/board/freescale/m5271evb/m5271evb.c +++ b/board/freescale/m5271evb/m5271evb.c @@ -47,6 +47,7 @@ phys_size_t initdram (int board_type) { MCF_GPIO_SDRAM_SDWE | MCF_GPIO_SDRAM_SCAS | MCF_GPIO_SDRAM_SRAS | MCF_GPIO_SDRAM_SCKE | MCF_GPIO_SDRAM_SDCS_11); + asm(" nop"); /* * Check to see if the SDRAM has already been initialized @@ -55,8 +56,9 @@ phys_size_t initdram (int board_type) { if (!(mbar_readLong(MCF_SDRAMC_DACR0) & MCF_SDRAMC_DACRn_RE)) { /* Initialize DRAM Control Register: DCR */ mbar_writeShort(MCF_SDRAMC_DCR, - MCF_SDRAMC_DCR_RTIM(0x01) - | MCF_SDRAMC_DCR_RC(0x30)); + MCF_SDRAMC_DCR_RTIM(2) + | MCF_SDRAMC_DCR_RC(0x2E)); + asm(" nop"); /* * Initialize DACR0 @@ -70,15 +72,18 @@ phys_size_t initdram (int board_type) { | MCF_SDRAMC_DACRn_CASL(1) | MCF_SDRAMC_DACRn_CBM(3) | MCF_SDRAMC_DACRn_PS(0)); + asm(" nop"); /* Initialize DMR0 */ mbar_writeLong(MCF_SDRAMC_DMR0, MCF_SDRAMC_DMRn_BAM_16M | MCF_SDRAMC_DMRn_V); + asm(" nop"); /* Set IP bit in DACR */ mbar_writeLong(MCF_SDRAMC_DACR0, mbar_readLong(MCF_SDRAMC_DACR0) | MCF_SDRAMC_DACRn_IP); + asm(" nop"); /* Wait at least 20ns to allow banks to precharge */ for (i = 0; i < 5; i++) @@ -86,6 +91,7 @@ phys_size_t initdram (int board_type) { /* Write to this block to initiate precharge */ *(u32 *)(CONFIG_SYS_SDRAM_BASE) = 0xa5a5a5a5; + asm(" nop"); /* Set RE bit in DACR */ mbar_writeLong(MCF_SDRAMC_DACR0, mbar_readLong(MCF_SDRAMC_DACR0) @@ -98,6 +104,7 @@ phys_size_t initdram (int board_type) { /* Finish the configuration by issuing the MRS */ mbar_writeLong(MCF_SDRAMC_DACR0, mbar_readLong(MCF_SDRAMC_DACR0) | MCF_SDRAMC_DACRn_MRS); + asm(" nop"); /* * Write to the SDRAM Mode Register A0-A11 = 0x400 @@ -109,6 +116,7 @@ phys_size_t initdram (int board_type) { * Burst Length = 1 */ *(u32 *)(CONFIG_SYS_SDRAM_BASE + 0x400) = 0xa5a5a5a5; + asm(" nop"); } return CONFIG_SYS_SDRAM_SIZE * 1024 * 1024; diff --git a/board/freescale/m5271evb/u-boot.lds b/board/freescale/m5271evb/u-boot.lds index 00c1f2a..ca41232 100644 --- a/board/freescale/m5271evb/u-boot.lds +++ b/board/freescale/m5271evb/u-boot.lds @@ -56,11 +56,11 @@ SECTIONS /* WARNING - the following is hand-optimized to fit within */ /* the sector layout of our flash chips! XXX FIXME XXX */ - cpu/mcf52x2/start.o (.text) - lib_m68k/traps.o (.text) - cpu/mcf52x2/interrupts.o (.text) + arch/m68k/cpu/mcf52x2/start.o (.text) + arch/m68k/lib/traps.o (.text) + arch/m68k/cpu/mcf52x2/interrupts.o (.text) common/dlmalloc.o (.text) - lib_generic/zlib.o (.text) + lib/zlib.o (.text) . = DEFINED(env_offset) ? env_offset : .; common/env_embedded.o (.ppcenv) diff --git a/board/freescale/m5272c3/u-boot.lds b/board/freescale/m5272c3/u-boot.lds index 9d20b22..8b011df 100644 --- a/board/freescale/m5272c3/u-boot.lds +++ b/board/freescale/m5272c3/u-boot.lds @@ -55,11 +55,11 @@ SECTIONS /* WARNING - the following is hand-optimized to fit within */ /* the sector layout of our flash chips! XXX FIXME XXX */ - cpu/mcf52x2/start.o (.text) - lib_m68k/traps.o (.text) - cpu/mcf52x2/interrupts.o (.text) + arch/m68k/cpu/mcf52x2/start.o (.text) + arch/m68k/lib/traps.o (.text) + arch/m68k/cpu/mcf52x2/interrupts.o (.text) common/dlmalloc.o (.text) - lib_generic/zlib.o (.text) + lib/zlib.o (.text) . = DEFINED(env_offset) ? env_offset : .; common/env_embedded.o (.text) diff --git a/board/freescale/m5275evb/u-boot.lds b/board/freescale/m5275evb/u-boot.lds index daf8724..cd17b0a 100644 --- a/board/freescale/m5275evb/u-boot.lds +++ b/board/freescale/m5275evb/u-boot.lds @@ -55,10 +55,10 @@ SECTIONS /* WARNING - the following is hand-optimized to fit within */ /* the sector layout of our flash chips! XXX FIXME XXX */ - cpu/mcf52x2/start.o (.text) + arch/m68k/cpu/mcf52x2/start.o (.text) common/dlmalloc.o (.text) - lib_generic/string.o (.text) - lib_generic/zlib.o (.text) + lib/string.o (.text) + lib/zlib.o (.text) . = DEFINED(env_offset) ? env_offset : .; common/env_embedded.o(.text) diff --git a/board/freescale/m5282evb/u-boot.lds b/board/freescale/m5282evb/u-boot.lds index f46e025..5ad0fad 100644 --- a/board/freescale/m5282evb/u-boot.lds +++ b/board/freescale/m5282evb/u-boot.lds @@ -55,11 +55,11 @@ SECTIONS /* WARNING - the following is hand-optimized to fit within */ /* the sector layout of our flash chips! XXX FIXME XXX */ - cpu/mcf52x2/start.o (.text) + arch/m68k/cpu/mcf52x2/start.o (.text) common/dlmalloc.o (.text) - lib_generic/string.o (.text) - lib_generic/vsprintf.o (.text) - lib_generic/crc32.o (.text) + lib/string.o (.text) + lib/vsprintf.o (.text) + lib/crc32.o (.text) . = DEFINED(env_offset) ? env_offset : .; common/env_embedded.o(.text) diff --git a/board/freescale/m53017evb/u-boot.lds b/board/freescale/m53017evb/u-boot.lds index c79d06c..6577299 100644 --- a/board/freescale/m53017evb/u-boot.lds +++ b/board/freescale/m53017evb/u-boot.lds @@ -55,11 +55,11 @@ SECTIONS /* WARNING - the following is hand-optimized to fit within */ /* the sector layout of our flash chips! XXX FIXME XXX */ - cpu/mcf532x/start.o (.text) - cpu/mcf532x/libmcf532x.a (.text) - lib_m68k/libm68k.a (.text) + arch/m68k/cpu/mcf532x/start.o (.text) + arch/m68k/cpu/mcf532x/libmcf532x.a (.text) + arch/m68k/lib/libm68k.a (.text) common/dlmalloc.o (.text) - lib_generic/zlib.o (.text) + lib/zlib.o (.text) . = DEFINED(env_offset) ? env_offset : .; common/env_embedded.o (.text) diff --git a/board/freescale/m5329evb/u-boot.lds b/board/freescale/m5329evb/u-boot.lds index af31098..ba7ca27 100644 --- a/board/freescale/m5329evb/u-boot.lds +++ b/board/freescale/m5329evb/u-boot.lds @@ -55,11 +55,11 @@ SECTIONS /* WARNING - the following is hand-optimized to fit within */ /* the sector layout of our flash chips! XXX FIXME XXX */ - cpu/mcf532x/start.o (.text) - lib_m68k/traps.o (.text) - lib_m68k/interrupts.o (.text) + arch/m68k/cpu/mcf532x/start.o (.text) + arch/m68k/lib/traps.o (.text) + arch/m68k/lib/interrupts.o (.text) common/dlmalloc.o (.text) - lib_generic/zlib.o (.text) + lib/zlib.o (.text) . = DEFINED(env_offset) ? env_offset : .; common/env_embedded.o (.text) diff --git a/board/freescale/m5373evb/u-boot.lds b/board/freescale/m5373evb/u-boot.lds index dff74b6..a2540bb 100644 --- a/board/freescale/m5373evb/u-boot.lds +++ b/board/freescale/m5373evb/u-boot.lds @@ -55,11 +55,11 @@ SECTIONS /* WARNING - the following is hand-optimized to fit within */ /* the sector layout of our flash chips! XXX FIXME XXX */ - cpu/mcf532x/start.o (.text) - lib_m68k/traps.o (.text) - lib_m68k/interrupts.o (.text) + arch/m68k/cpu/mcf532x/start.o (.text) + arch/m68k/lib/traps.o (.text) + arch/m68k/lib/interrupts.o (.text) common/dlmalloc.o (.text) - lib_generic/zlib.o (.text) + lib/zlib.o (.text) . = DEFINED(env_offset) ? env_offset : .; common/env_embedded.o (.text) diff --git a/board/freescale/m54451evb/u-boot.spa b/board/freescale/m54451evb/u-boot.spa index d8caefa..09ac481 100644 --- a/board/freescale/m54451evb/u-boot.spa +++ b/board/freescale/m54451evb/u-boot.spa @@ -55,14 +55,14 @@ SECTIONS /* WARNING - the following is hand-optimized to fit within */ /* the sector layout of our flash chips! XXX FIXME XXX */ - cpu/mcf5445x/start.o (.text) - cpu/mcf5445x/libmcf5445x.a (.text) - lib_m68k/libm68k.a (.text) + arch/m68k/cpu/mcf5445x/start.o (.text) + arch/m68k/cpu/mcf5445x/libmcf5445x.a (.text) + arch/m68k/lib/libm68k.a (.text) common/cmd_flash.o (.text) common/dlmalloc.o (.text) common/main.o (.text) common/image.o (.text) - lib_generic/libgeneric.a (.text) + lib/libgeneric.a (.text) . = DEFINED(env_offset) ? env_offset : .; common/env_embedded.o (.text) diff --git a/board/freescale/m54451evb/u-boot.stm b/board/freescale/m54451evb/u-boot.stm index e9eac67..e64a56c 100644 --- a/board/freescale/m54451evb/u-boot.stm +++ b/board/freescale/m54451evb/u-boot.stm @@ -55,16 +55,16 @@ SECTIONS /* WARNING - the following is hand-optimized to fit within */ /* the sector layout of our flash chips! XXX FIXME XXX */ - cpu/mcf5445x/start.o (.text) -/* cpu/mcf5445x/cpu_init.o (.text) - cpu/mcf5445x/cpu.o (.text) - cpu/mcf5445x/dspi.o (.text) - cpu/mcf5445x/interrupt.o (.text) - cpu/mcf5445x/speed.o (.text) - lib_m68k/board.o (.text) + arch/m68k/cpu/mcf5445x/start.o (.text) +/* arch/m68k/cpu/mcf5445x/cpu_init.o (.text) + arch/m68k/cpu/mcf5445x/cpu.o (.text) + arch/m68k/cpu/mcf5445x/dspi.o (.text) + arch/m68k/cpu/mcf5445x/interrupt.o (.text) + arch/m68k/cpu/mcf5445x/speed.o (.text) + arch/m68k/lib/board.o (.text) common/serial.o (.text) common/console.o (.text) - lib_generic/display_options.o (.text) + lib/display_options.o (.text) board/freescale/m54455evb/m54455evb.o (.text) . = DEFINED(env_offset) ? env_offset : .; diff --git a/board/freescale/m54455evb/m54455evb.c b/board/freescale/m54455evb/m54455evb.c index 293b5b0..2a84514 100644 --- a/board/freescale/m54455evb/m54455evb.c +++ b/board/freescale/m54455evb/m54455evb.c @@ -107,7 +107,7 @@ int ide_preinit(void) { volatile gpio_t *gpio = (gpio_t *) MMAP_GPIO; - gpio->par_fec |= (gpio->par_fec & GPIO_PAR_FEC_FEC1_MASK) | 0x10; + gpio->par_fec |= (gpio->par_fec & GPIO_PAR_FEC_FEC1_UNMASK) | 0x10; gpio->par_feci2c |= (gpio->par_feci2c & 0xF0FF) | (GPIO_PAR_FECI2C_MDC1_ATA_DIOR | GPIO_PAR_FECI2C_MDIO1_ATA_DIOW); @@ -185,7 +185,7 @@ ulong board_flash_get_legacy (ulong base, int banknum, flash_info_t * info) info->flash_id = 0x01000000; info->portwidth = 1; info->chipwidth = 1; - info->buffer_size = 32; + info->buffer_size = 1; info->erase_blk_tout = 16384; info->write_tout = 2; info->buffer_write_tout = 5; diff --git a/board/freescale/m54455evb/u-boot.atm b/board/freescale/m54455evb/u-boot.atm index 08e184c..ebf801a 100644 --- a/board/freescale/m54455evb/u-boot.atm +++ b/board/freescale/m54455evb/u-boot.atm @@ -55,11 +55,11 @@ SECTIONS /* WARNING - the following is hand-optimized to fit within */ /* the sector layout of our flash chips! XXX FIXME XXX */ - cpu/mcf5445x/start.o (.text) - lib_m68k/traps.o (.text) - lib_m68k/interrupts.o (.text) + arch/m68k/cpu/mcf5445x/start.o (.text) + arch/m68k/lib/traps.o (.text) + arch/m68k/lib/interrupts.o (.text) common/dlmalloc.o (.text) - lib_generic/zlib.o (.text) + lib/zlib.o (.text) . = DEFINED(env_offset) ? env_offset : .; common/env_embedded.o (.text) diff --git a/board/freescale/m54455evb/u-boot.int b/board/freescale/m54455evb/u-boot.int index 4d504a2..153556f 100644 --- a/board/freescale/m54455evb/u-boot.int +++ b/board/freescale/m54455evb/u-boot.int @@ -55,11 +55,11 @@ SECTIONS /* WARNING - the following is hand-optimized to fit within */ /* the sector layout of our flash chips! XXX FIXME XXX */ - cpu/mcf5445x/start.o (.text) - lib_m68k/traps.o (.text) - lib_m68k/interrupts.o (.text) + arch/m68k/cpu/mcf5445x/start.o (.text) + arch/m68k/lib/traps.o (.text) + arch/m68k/lib/interrupts.o (.text) common/dlmalloc.o (.text) - lib_generic/zlib.o (.text) + lib/zlib.o (.text) *(.text) *(.fixup) diff --git a/board/freescale/m54455evb/u-boot.stm b/board/freescale/m54455evb/u-boot.stm index 3dd9a6b..9cda102 100644 --- a/board/freescale/m54455evb/u-boot.stm +++ b/board/freescale/m54455evb/u-boot.stm @@ -55,7 +55,7 @@ SECTIONS /* WARNING - the following is hand-optimized to fit within */ /* the sector layout of our flash chips! XXX FIXME XXX */ - cpu/mcf5445x/start.o (.text) + arch/m68k/cpu/mcf5445x/start.o (.text) *(.text) *(.fixup) diff --git a/board/freescale/m547xevb/u-boot.lds b/board/freescale/m547xevb/u-boot.lds index a3014bd..54bf278 100644 --- a/board/freescale/m547xevb/u-boot.lds +++ b/board/freescale/m547xevb/u-boot.lds @@ -55,9 +55,9 @@ SECTIONS /* WARNING - the following is hand-optimized to fit within */ /* the sector layout of our flash chips! XXX FIXME XXX */ - cpu/mcf547x_8x/start.o (.text) - lib_m68k/traps.o (.text) - lib_m68k/interrupts.o (.text) + arch/m68k/cpu/mcf547x_8x/start.o (.text) + arch/m68k/lib/traps.o (.text) + arch/m68k/lib/interrupts.o (.text) common/dlmalloc.o (.text) . = DEFINED(env_offset) ? env_offset : .; diff --git a/board/freescale/m548xevb/u-boot.lds b/board/freescale/m548xevb/u-boot.lds index a3014bd..54bf278 100644 --- a/board/freescale/m548xevb/u-boot.lds +++ b/board/freescale/m548xevb/u-boot.lds @@ -55,9 +55,9 @@ SECTIONS /* WARNING - the following is hand-optimized to fit within */ /* the sector layout of our flash chips! XXX FIXME XXX */ - cpu/mcf547x_8x/start.o (.text) - lib_m68k/traps.o (.text) - lib_m68k/interrupts.o (.text) + arch/m68k/cpu/mcf547x_8x/start.o (.text) + arch/m68k/lib/traps.o (.text) + arch/m68k/lib/interrupts.o (.text) common/dlmalloc.o (.text) . = DEFINED(env_offset) ? env_offset : .; diff --git a/board/freescale/mpc7448hpc2/tsi108_init.c b/board/freescale/mpc7448hpc2/tsi108_init.c index 74bb564..c6a3ade 100644 --- a/board/freescale/mpc7448hpc2/tsi108_init.c +++ b/board/freescale/mpc7448hpc2/tsi108_init.c @@ -323,7 +323,7 @@ int board_early_init_r (void) * We will over-ride the env_init called in board_init_f * This is really a work-around because, the HLP bank 1 * where NVRAM resides is not visible during board_init_f - * (lib_ppc/board.c) + * (arch/ppc/lib/board.c) * Alternatively, we could use the I2C EEPROM at start-up to configure * and enable all HLP banks and not just HLP 0 as is being done for * Taiga Rev. 2. diff --git a/board/freescale/mpc7448hpc2/u-boot.lds b/board/freescale/mpc7448hpc2/u-boot.lds index 247779f..c4266ce 100644 --- a/board/freescale/mpc7448hpc2/u-boot.lds +++ b/board/freescale/mpc7448hpc2/u-boot.lds @@ -56,7 +56,7 @@ SECTIONS .plt : { *(.plt) } .text : { - cpu/74xx_7xx/start.o (.text) + arch/ppc/cpu/74xx_7xx/start.o (.text) /* store the environment in a seperate sector in the boot flash */ /* . = env_offset; */ diff --git a/board/freescale/mpc8536ds/config.mk b/board/freescale/mpc8536ds/config.mk index e38af73..3f5447a 100644 --- a/board/freescale/mpc8536ds/config.mk +++ b/board/freescale/mpc8536ds/config.mk @@ -26,7 +26,7 @@ ifndef NAND_SPL ifeq ($(CONFIG_MK_NAND), y) TEXT_BASE = $(CONFIG_RAMBOOT_TEXT_BASE) -LDSCRIPT := $(TOPDIR)/cpu/$(CPU)/u-boot-nand.lds +LDSCRIPT := $(TOPDIR)/$(CPUDIR)/u-boot-nand.lds endif endif diff --git a/board/freescale/mpc8536ds/mpc8536ds.c b/board/freescale/mpc8536ds/mpc8536ds.c index 81a56b5..253ed18 100644 --- a/board/freescale/mpc8536ds/mpc8536ds.c +++ b/board/freescale/mpc8536ds/mpc8536ds.c @@ -39,7 +39,6 @@ #include <netdev.h> #include <sata.h> -#include "../common/pixis.h" #include "../common/sgmii_riser.h" phys_size_t fixed_sdram(void); diff --git a/board/freescale/mpc8544ds/mpc8544ds.c b/board/freescale/mpc8544ds/mpc8544ds.c index b35e02f..0be2d89 100644 --- a/board/freescale/mpc8544ds/mpc8544ds.c +++ b/board/freescale/mpc8544ds/mpc8544ds.c @@ -35,7 +35,6 @@ #include <tsec.h> #include <netdev.h> -#include "../common/pixis.h" #include "../common/sgmii_riser.h" int checkboard (void) diff --git a/board/freescale/mpc8569mds/config.mk b/board/freescale/mpc8569mds/config.mk index 7de0f7c..86f138c 100644 --- a/board/freescale/mpc8569mds/config.mk +++ b/board/freescale/mpc8569mds/config.mk @@ -26,7 +26,7 @@ ifndef NAND_SPL ifeq ($(CONFIG_MK_NAND), y) TEXT_BASE = $(CONFIG_RAMBOOT_TEXT_BASE) -LDSCRIPT := $(TOPDIR)/cpu/$(CPU)/u-boot-nand.lds +LDSCRIPT := $(TOPDIR)/$(CPUDIR)/u-boot-nand.lds endif endif diff --git a/board/freescale/mpc8572ds/mpc8572ds.c b/board/freescale/mpc8572ds/mpc8572ds.c index 74085c3..6029a51 100644 --- a/board/freescale/mpc8572ds/mpc8572ds.c +++ b/board/freescale/mpc8572ds/mpc8572ds.c @@ -36,7 +36,6 @@ #include <tsec.h> #include <netdev.h> -#include "../common/pixis.h" #include "../common/sgmii_riser.h" long int fixed_sdram(void); diff --git a/board/freescale/mpc8610hpcd/mpc8610hpcd.c b/board/freescale/mpc8610hpcd/mpc8610hpcd.c index 784a2ed..2ef7b23 100644 --- a/board/freescale/mpc8610hpcd/mpc8610hpcd.c +++ b/board/freescale/mpc8610hpcd/mpc8610hpcd.c @@ -34,8 +34,6 @@ #include <spd_sdram.h> #include <netdev.h> -#include "../common/pixis.h" - void sdram_init(void); phys_size_t fixed_sdram(void); void mpc8610hpcd_diu_init(void); @@ -127,6 +125,8 @@ initdram(int board_type) dram_size = fixed_sdram(); #endif + setup_ddr_bat(dram_size); + puts(" DDR: "); return dram_size; } diff --git a/board/freescale/mpc8610hpcd/mpc8610hpcd_diu.c b/board/freescale/mpc8610hpcd/mpc8610hpcd_diu.c index 4186a2e..94fb1eb 100644 --- a/board/freescale/mpc8610hpcd/mpc8610hpcd_diu.c +++ b/board/freescale/mpc8610hpcd/mpc8610hpcd_diu.c @@ -29,7 +29,6 @@ #ifdef CONFIG_FSL_DIU_FB -#include "../common/pixis.h" #include "../common/fsl_diu_fb.h" #if defined(CONFIG_VIDEO) || defined(CONFIG_CFB_CONSOLE) diff --git a/board/freescale/mpc8610hpcd/u-boot.lds b/board/freescale/mpc8610hpcd/u-boot.lds index b573807..1f9f8eb 100644 --- a/board/freescale/mpc8610hpcd/u-boot.lds +++ b/board/freescale/mpc8610hpcd/u-boot.lds @@ -50,16 +50,16 @@ SECTIONS .plt : { *(.plt) } .text : { - cpu/mpc86xx/start.o (.text) - cpu/mpc86xx/traps.o (.text) - cpu/mpc86xx/interrupts.o (.text) - cpu/mpc86xx/cpu_init.o (.text) - cpu/mpc86xx/cpu.o (.text) - cpu/mpc86xx/speed.o (.text) + arch/ppc/cpu/mpc86xx/start.o (.text) + arch/ppc/cpu/mpc86xx/traps.o (.text) + arch/ppc/cpu/mpc86xx/interrupts.o (.text) + arch/ppc/cpu/mpc86xx/cpu_init.o (.text) + arch/ppc/cpu/mpc86xx/cpu.o (.text) + arch/ppc/cpu/mpc86xx/speed.o (.text) common/dlmalloc.o (.text) - lib_generic/crc32.o (.text) - lib_ppc/extable.o (.text) - lib_generic/zlib.o (.text) + lib/crc32.o (.text) + arch/ppc/lib/extable.o (.text) + lib/zlib.o (.text) *(.text) *(.got1) } diff --git a/board/freescale/mpc8641hpcn/mpc8641hpcn.c b/board/freescale/mpc8641hpcn/mpc8641hpcn.c index c521527..b352c33 100644 --- a/board/freescale/mpc8641hpcn/mpc8641hpcn.c +++ b/board/freescale/mpc8641hpcn/mpc8641hpcn.c @@ -31,8 +31,6 @@ #include <fdt_support.h> #include <netdev.h> -#include "../common/pixis.h" - phys_size_t fixed_sdram(void); int board_early_init_f(void) @@ -74,6 +72,8 @@ initdram(int board_type) dram_size = fixed_sdram(); #endif + setup_ddr_bat(dram_size); + puts(" DDR: "); return dram_size; } diff --git a/board/freescale/mpc8641hpcn/u-boot.lds b/board/freescale/mpc8641hpcn/u-boot.lds index 2b98b5a..d7c65ce 100644 --- a/board/freescale/mpc8641hpcn/u-boot.lds +++ b/board/freescale/mpc8641hpcn/u-boot.lds @@ -50,16 +50,16 @@ SECTIONS .plt : { *(.plt) } .text : { - cpu/mpc86xx/start.o (.text) - cpu/mpc86xx/traps.o (.text) - cpu/mpc86xx/interrupts.o (.text) - cpu/mpc86xx/cpu_init.o (.text) - cpu/mpc86xx/cpu.o (.text) - cpu/mpc86xx/speed.o (.text) + arch/ppc/cpu/mpc86xx/start.o (.text) + arch/ppc/cpu/mpc86xx/traps.o (.text) + arch/ppc/cpu/mpc86xx/interrupts.o (.text) + arch/ppc/cpu/mpc86xx/cpu_init.o (.text) + arch/ppc/cpu/mpc86xx/cpu.o (.text) + arch/ppc/cpu/mpc86xx/speed.o (.text) common/dlmalloc.o (.text) - lib_generic/crc32.o (.text) - lib_ppc/extable.o (.text) - lib_generic/zlib.o (.text) + lib/crc32.o (.text) + arch/ppc/lib/extable.o (.text) + lib/zlib.o (.text) drivers/bios_emulator/atibios.o (.text) *(.text) *(.got1) diff --git a/board/freescale/mx31ads/u-boot.lds b/board/freescale/mx31ads/u-boot.lds index 3182aa6..2731294 100644 --- a/board/freescale/mx31ads/u-boot.lds +++ b/board/freescale/mx31ads/u-boot.lds @@ -37,9 +37,9 @@ SECTIONS /* WARNING - the following is hand-optimized to fit within */ /* the sector layout of our flash chips! XXX FIXME XXX */ - cpu/arm1136/start.o (.text) + arch/arm/cpu/arm1136/start.o (.text) board/freescale/mx31ads/libmx31ads.a (.text) - lib_arm/libarm.a (.text) + arch/arm/lib/libarm.a (.text) net/libnet.a (.text) drivers/mtd/libmtd.a (.text) diff --git a/board/freescale/mx51evk/config.mk b/board/freescale/mx51evk/config.mk index c8279ec..af70ec2 100644 --- a/board/freescale/mx51evk/config.mk +++ b/board/freescale/mx51evk/config.mk @@ -20,6 +20,6 @@ # MA 02111-1307 USA # -LDSCRIPT = cpu/$(CPU)/$(SOC)/u-boot.lds +LDSCRIPT = $(CPUDIR)/$(SOC)/u-boot.lds TEXT_BASE = 0x97800000 IMX_CONFIG = $(SRCTREE)/board/$(BOARDDIR)/imximage.cfg diff --git a/board/freescale/mx51evk/mx51evk.c b/board/freescale/mx51evk/mx51evk.c index 8754563..f0b7abc 100644 --- a/board/freescale/mx51evk/mx51evk.c +++ b/board/freescale/mx51evk/mx51evk.c @@ -72,72 +72,6 @@ static void setup_iomux_uart(void) mxc_iomux_set_pad(MX51_PIN_UART1_CTS, pad); } -static void setup_expio(void) -{ - u32 reg; - struct weim *pweim = (struct weim *)WEIM_BASE_ADDR; - struct clkctl *pclkctl = (struct clkctl *)CCM_BASE_ADDR; - - /* CS5 setup */ - mxc_request_iomux(MX51_PIN_EIM_CS5, IOMUX_CONFIG_ALT0); - writel(0x00410089, &pweim[5].csgcr1); - writel(0x00000002, &pweim[5].csgcr2); - - /* RWSC=50, RADVA=2, RADVN=6, OEA=0, OEN=0, RCSA=0, RCSN=0 */ - writel(0x32260000, &pweim[5].csrcr1); - - /* APR = 0 */ - writel(0x00000000, &pweim[5].csrcr2); - - /* - * WAL=0, WBED=1, WWSC=50, WADVA=2, WADVN=6, WEA=0, WEN=0, - * WCSA=0, WCSN=0 - */ - writel(0x72080F00, &pweim[5].cswcr1); - - mx51_io_board = (struct io_board_ctrl *)(CS5_BASE_ADDR + - IO_BOARD_OFFSET); - if ((readw(&mx51_io_board->id1) == 0xAAAA) && - (readw(&mx51_io_board->id2) == 0x5555)) { - if (is_soc_rev(CHIP_REV_2_0) < 0) { - reg = readl(&pclkctl->cbcdr); - reg = (reg & (~0x70000)) | 0x30000; - writel(reg, &pclkctl->cbcdr); - /* make sure divider effective */ - while (readl(&pclkctl->cdhipr) != 0) - ; - writel(0x0, &pclkctl->ccdr); - } - } else { - /* CS1 */ - writel(0x00410089, &pweim[1].csgcr1); - writel(0x00000002, &pweim[1].csgcr2); - /* RWSC=50, RADVA=2, RADVN=6, OEA=0, OEN=0, RCSA=0, RCSN=0 */ - writel(0x32260000, &pweim[1].csrcr1); - /* APR=0 */ - writel(0x00000000, &pweim[1].csrcr2); - /* - * WAL=0, WBED=1, WWSC=50, WADVA=2, WADVN=6, WEA=0, - * WEN=0, WCSA=0, WCSN=0 - */ - writel(0x72080F00, &pweim[1].cswcr1); - mx51_io_board = (struct io_board_ctrl *)(CS1_BASE_ADDR + - IO_BOARD_OFFSET); - } - - /* Reset interrupt status reg */ - writew(0x1F, &(mx51_io_board->int_rest)); - writew(0x00, &(mx51_io_board->int_rest)); - writew(0xFFFF, &(mx51_io_board->int_mask)); - - /* Reset the XUART and Ethernet controllers */ - reg = readw(&(mx51_io_board->sw_reset)); - reg |= 0x9; - writew(reg, &(mx51_io_board->sw_reset)); - reg &= ~0x9; - writew(reg, &(mx51_io_board->sw_reset)); -} - static void setup_iomux_fec(void) { /*FEC_MDIO*/ @@ -349,7 +283,6 @@ int board_init(void) gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x100; setup_iomux_uart(); - setup_expio(); setup_iomux_fec(); return 0; } diff --git a/board/freescale/mx51evk/mx51evk.h b/board/freescale/mx51evk/mx51evk.h index 524cdcc..2854e71 100644 --- a/board/freescale/mx51evk/mx51evk.h +++ b/board/freescale/mx51evk/mx51evk.h @@ -47,5 +47,4 @@ struct io_board_ctrl { }; #endif -#define IO_BOARD_OFFSET (0x20000) #endif diff --git a/board/freescale/p1_p2_rdb/config.mk b/board/freescale/p1_p2_rdb/config.mk index 0f7a048..1f9f7b6 100644 --- a/board/freescale/p1_p2_rdb/config.mk +++ b/board/freescale/p1_p2_rdb/config.mk @@ -27,7 +27,7 @@ ifndef NAND_SPL ifeq ($(CONFIG_MK_NAND), y) TEXT_BASE = $(CONFIG_RAMBOOT_TEXT_BASE) -LDSCRIPT := $(TOPDIR)/cpu/$(CPU)/u-boot-nand.lds +LDSCRIPT := $(TOPDIR)/$(CPUDIR)/u-boot-nand.lds endif endif diff --git a/board/freescale/p2020ds/p2020ds.c b/board/freescale/p2020ds/p2020ds.c index f6eae55..f0ff209 100644 --- a/board/freescale/p2020ds/p2020ds.c +++ b/board/freescale/p2020ds/p2020ds.c @@ -38,7 +38,7 @@ #include <asm/mp.h> #include <netdev.h> -#include "../common/pixis.h" +#include "../common/ngpixis.h" #include "../common/sgmii_riser.h" DECLARE_GLOBAL_DATA_PTR; @@ -47,30 +47,24 @@ phys_size_t fixed_sdram(void); int checkboard(void) { - u8 sw7; - u8 *pixis_base = (u8 *)PIXIS_BASE; + u8 sw; puts("Board: P2020DS "); #ifdef CONFIG_PHYS_64BIT puts("(36-bit addrmap) "); #endif - printf("Sys ID: 0x%02x, " - "Sys Ver: 0x%02x, FPGA Ver: 0x%02x, ", - in_8(pixis_base + PIXIS_ID), in_8(pixis_base + PIXIS_VER), - in_8(pixis_base + PIXIS_PVER)); + printf("Sys ID: 0x%02x, Sys Ver: 0x%02x, FPGA Ver: 0x%02x, ", + in_8(&pixis->id), in_8(&pixis->arch), in_8(&pixis->scver)); - sw7 = in_8(pixis_base + PIXIS_SW(7)); - switch ((sw7 & PIXIS_SW7_LBMAP) >> 6) { - case 0: - case 1: - printf ("vBank: %d\n", ((sw7 & PIXIS_SW7_VBANK) >> 4)); - break; - case 2: - case 3: - puts ("Promjet\n"); - break; - } + sw = in_8(&PIXIS_SW(PIXIS_LBMAP_SWITCH)); + sw = (sw & PIXIS_LBMAP_MASK) >> PIXIS_LBMAP_SHIFT; + + if (sw < 0x8) + /* The lower two bits are the actual vbank number */ + printf("vBank: %d\n", sw & 3); + else + puts("Promjet\n"); return 0; } @@ -371,30 +365,22 @@ unsigned long get_board_ddr_clk(ulong dummy) return gd->mem_clk; } -unsigned long -calculate_board_sys_clk(ulong dummy) +unsigned long calculate_board_sys_clk(ulong dummy) { ulong val; - u8 *pixis_base = (u8 *)PIXIS_BASE; - val = ics307_clk_freq( - in_8(pixis_base + PIXIS_VSYSCLK0), - in_8(pixis_base + PIXIS_VSYSCLK1), - in_8(pixis_base + PIXIS_VSYSCLK2)); + val = ics307_clk_freq(in_8(&pixis->sclk[0]), in_8(&pixis->sclk[1]), + in_8(&pixis->sclk[2])); debug("sysclk val = %lu\n", val); return val; } -unsigned long -calculate_board_ddr_clk(ulong dummy) +unsigned long calculate_board_ddr_clk(ulong dummy) { ulong val; - u8 *pixis_base = (u8 *)PIXIS_BASE; - val = ics307_clk_freq( - in_8(pixis_base + PIXIS_VDDRCLK0), - in_8(pixis_base + PIXIS_VDDRCLK1), - in_8(pixis_base + PIXIS_VDDRCLK2)); + val = ics307_clk_freq(in_8(&pixis->dclk[0]), in_8(&pixis->dclk[1]), + in_8(&pixis->dclk[2])); debug("ddrclk val = %lu\n", val); return val; } @@ -403,9 +389,8 @@ unsigned long get_board_sys_clk(ulong dummy) { u8 i; ulong val = 0; - u8 *pixis_base = (u8 *)PIXIS_BASE; - i = in_8(pixis_base + PIXIS_SPD); + i = in_8(&pixis->spd); i &= 0x07; switch (i) { @@ -442,9 +427,8 @@ unsigned long get_board_ddr_clk(ulong dummy) { u8 i; ulong val = 0; - u8 *pixis_base = (u8 *)PIXIS_BASE; - i = in_8(pixis_base + PIXIS_SPD); + i = in_8(&pixis->spd); i &= 0x38; i >>= 3; |