4 files changed, 74 insertions, 16 deletions
diff --git a/board/freescale/mpc8323erdb/mpc8323erdb.c b/board/freescale/mpc8323erdb/mpc8323erdb.c
index 88d5e8f..afc0eee 100644
--- a/board/freescale/mpc8323erdb/mpc8323erdb.c
+++ b/board/freescale/mpc8323erdb/mpc8323erdb.c
@@ -185,3 +185,37 @@ void ft_board_setup(void *blob, bd_t *bd)
 #endif
 }
 #endif
+
+#if defined(CFG_I2C_MAC_OFFSET)
+int mac_read_from_eeprom(void)
+{
+	uchar buf[28];
+	char str[18];
+	int i = 0;
+	unsigned int crc = 0;
+	unsigned char enetvar[32];
+
+	/* Read MAC addresses from EEPROM */
+	if (eeprom_read(CFG_I2C_EEPROM_ADDR, CFG_I2C_MAC_OFFSET, buf, 28)) {
+		printf("\nEEPROM @ 0x%02x read FAILED!!!\n",
+		       CFG_I2C_EEPROM_ADDR);
+	} else {
+		if (crc32(crc, buf, 24) == *(unsigned int *)&buf[24]) {
+			printf("Reading MAC from EEPROM\n");
+			for (i = 0; i < 4; i++) {
+				if (memcmp(&buf[i * 6], "\0\0\0\0\0\0", 6)) {
+					sprintf(str,
+						"%02X:%02X:%02X:%02X:%02X:%02X",
+						buf[i * 6], buf[i * 6 + 1],
+						buf[i * 6 + 2], buf[i * 6 + 3],
+						buf[i * 6 + 4], buf[i * 6 + 5]);
+					sprintf((char *)enetvar,
+						i ? "eth%daddr" : "ethaddr", i);
+					setenv((char *)enetvar, str);
+				}
+			}
+		}
+	}
+	return 0;
+}
+#endif				/* CONFIG_I2C_MAC_OFFSET */
diff --git a/board/freescale/mpc8360emds/mpc8360emds.c b/board/freescale/mpc8360emds/mpc8360emds.c
index d90cdb3..2119320 100644
--- a/board/freescale/mpc8360emds/mpc8360emds.c
+++ b/board/freescale/mpc8360emds/mpc8360emds.c
@@ -98,11 +98,8 @@ int board_early_init_f(void)
 	/* Enable flash write */
 	bcsr[0xa] &= ~0x04;
 
-	/* Disable G1TXCLK, G2TXCLK h/w buffers (rev.2 h/w bug workaround) */
-	if (immr->sysconf.spridr == SPR_8360_REV20 ||
-	    immr->sysconf.spridr == SPR_8360E_REV20 ||
-	    immr->sysconf.spridr == SPR_8360_REV21 ||
-	    immr->sysconf.spridr == SPR_8360E_REV21)
+	/* Disable G1TXCLK, G2TXCLK h/w buffers (rev.2.x h/w bug workaround) */
+	if (REVID_MAJOR(immr->sysconf.spridr) == 2)
 		bcsr[0xe] = 0x30;
 
 	/* Enable second UART */
@@ -308,8 +305,8 @@ void ft_board_setup(void *blob, bd_t *bd)
 	 * if on mpc8360ea rev. 2.1,
 	 * change both ucc phy-connection-types from rgmii-id to rgmii-rxid
 	 */
-	if (immr->sysconf.spridr == SPR_8360_REV21 ||
-	    immr->sysconf.spridr == SPR_8360E_REV21) {
+	if ((REVID_MAJOR(immr->sysconf.spridr) == 2) &&
+	    (REVID_MINOR(immr->sysconf.spridr) == 1)) {
 		int nodeoffset;
 		const char *prop;
 		int path;
diff --git a/board/freescale/mpc837xemds/mpc837xemds.c b/board/freescale/mpc837xemds/mpc837xemds.c
index e57a53f..f7cd5fe 100644
--- a/board/freescale/mpc837xemds/mpc837xemds.c
+++ b/board/freescale/mpc837xemds/mpc837xemds.c
@@ -12,6 +12,8 @@
 
 #include <common.h>
 #include <i2c.h>
+#include <asm/io.h>
+#include <asm/fsl_serdes.h>
 #include <spd_sdram.h>
 #if defined(CONFIG_OF_LIBFDT)
 #include <libfdt.h>
@@ -29,6 +31,34 @@ int board_early_init_f(void)
 	/* Clear all of the interrupt of BCSR */
 	bcsr[0xe] = 0xff;
 
+#ifdef CONFIG_FSL_SERDES
+	immap_t *immr = (immap_t *)CFG_IMMR;
+	u32 spridr = in_be32(&immr->sysconf.spridr);
+
+	/* we check only part num, and don't look for CPU revisions */
+	switch (spridr) {
+	case SPR_8377:
+		fsl_setup_serdes(CONFIG_FSL_SERDES1, FSL_SERDES_PROTO_SATA,
+				 FSL_SERDES_CLK_100, FSL_SERDES_VDD_1V);
+		fsl_setup_serdes(CONFIG_FSL_SERDES2, FSL_SERDES_PROTO_PEX,
+				 FSL_SERDES_CLK_100, FSL_SERDES_VDD_1V);
+		break;
+	case SPR_8378:
+		fsl_setup_serdes(CONFIG_FSL_SERDES1, FSL_SERDES_PROTO_PEX,
+				 FSL_SERDES_CLK_100, FSL_SERDES_VDD_1V);
+		break;
+	case SPR_8379:
+		fsl_setup_serdes(CONFIG_FSL_SERDES1, FSL_SERDES_PROTO_SATA,
+				 FSL_SERDES_CLK_100, FSL_SERDES_VDD_1V);
+		fsl_setup_serdes(CONFIG_FSL_SERDES2, FSL_SERDES_PROTO_SATA,
+				 FSL_SERDES_CLK_100, FSL_SERDES_VDD_1V);
+		break;
+	default:
+		printf("serdes not configured: unknown CPU part number: "
+		       "%04x\n", spridr >> 16);
+		break;
+	}
+#endif /* CONFIG_FSL_SERDES */
 	return 0;
 }
 
diff --git a/board/freescale/mpc837xerdb/mpc837xerdb.c b/board/freescale/mpc837xerdb/mpc837xerdb.c
index 83fb60d..e054f4e 100644
--- a/board/freescale/mpc837xerdb/mpc837xerdb.c
+++ b/board/freescale/mpc837xerdb/mpc837xerdb.c
@@ -140,24 +140,21 @@ int board_early_init_f(void)
 	u32 spridr = in_be32(&immr->sysconf.spridr);
 
 	/* we check only part num, and don't look for CPU revisions */
-	switch (spridr >> 16) {
-	case SPR_8379E_REV10 >> 16:
-	case SPR_8379_REV10 >> 16:
+	switch (PARTID_NO_E(spridr)) {
+	case SPR_8377:
 		fsl_setup_serdes(CONFIG_FSL_SERDES1, FSL_SERDES_PROTO_SATA,
 				 FSL_SERDES_CLK_100, FSL_SERDES_VDD_1V);
-		fsl_setup_serdes(CONFIG_FSL_SERDES2, FSL_SERDES_PROTO_SATA,
+		fsl_setup_serdes(CONFIG_FSL_SERDES2, FSL_SERDES_PROTO_PEX,
 				 FSL_SERDES_CLK_100, FSL_SERDES_VDD_1V);
 		break;
-	case SPR_8378E_REV10 >> 16:
-	case SPR_8378_REV10 >> 16:
+	case SPR_8378:
 		fsl_setup_serdes(CONFIG_FSL_SERDES1, FSL_SERDES_PROTO_PEX,
 				 FSL_SERDES_CLK_100, FSL_SERDES_VDD_1V);
 		break;
-	case SPR_8377E_REV10 >> 16:
-	case SPR_8377_REV10 >> 16:
+	case SPR_8379:
 		fsl_setup_serdes(CONFIG_FSL_SERDES1, FSL_SERDES_PROTO_SATA,
 				 FSL_SERDES_CLK_100, FSL_SERDES_VDD_1V);
-		fsl_setup_serdes(CONFIG_FSL_SERDES2, FSL_SERDES_PROTO_PEX,
+		fsl_setup_serdes(CONFIG_FSL_SERDES2, FSL_SERDES_PROTO_SATA,
 				 FSL_SERDES_CLK_100, FSL_SERDES_VDD_1V);
 		break;
 	default: