diff options
Diffstat (limited to 'board/freescale/p2020ds')
| -rw-r--r-- | board/freescale/p2020ds/ddr.c | 105 |
1 files changed, 56 insertions, 49 deletions
diff --git a/board/freescale/p2020ds/ddr.c b/board/freescale/p2020ds/ddr.c index 926fd19..c43f874 100644 --- a/board/freescale/p2020ds/ddr.c +++ b/board/freescale/p2020ds/ddr.c @@ -11,88 +11,95 @@ #include <asm/fsl_ddr_sdram.h> #include <asm/fsl_ddr_dimm_params.h> -typedef struct { - u32 datarate_mhz_low; - u32 datarate_mhz_high; +struct board_specific_parameters { u32 n_ranks; + u32 datarate_mhz_high; u32 clk_adjust; u32 cpo; u32 write_data_delay; u32 force_2T; -} board_specific_parameters_t; +}; -/* ranges for parameters: + +/* + * This table contains all valid speeds we want to override with board + * specific parameters. datarate_mhz_high values need to be in ascending order + * for each n_ranks group. + * + * ranges for parameters: * wr_data_delay = 0-6 * clk adjust = 0-8 * cpo 2-0x1E (30) */ - -const board_specific_parameters_t board_specific_parameters[][20] = { - { - /* memory controller 0 */ - /* lo| hi| num| clk| cpo|wrdata|2T */ - /* mhz| mhz|ranks|adjst| | delay| */ +static const struct board_specific_parameters dimm0[] = { + /* + * memory controller 0 + * num| hi| clk| cpo|wrdata|2T + * ranks| mhz|adjst| | delay| + */ #ifdef CONFIG_FSL_DDR2 - { 0, 333, 2, 4, 0x1f, 2, 0}, - {334, 400, 2, 4, 0x1f, 2, 0}, - {401, 549, 2, 4, 0x1f, 2, 0}, - {550, 680, 2, 4, 0x1f, 3, 0}, - {681, 850, 2, 4, 0x1f, 4, 0}, - { 0, 333, 1, 4, 0x1f, 2, 0}, - {334, 400, 1, 4, 0x1f, 2, 0}, - {401, 549, 1, 4, 0x1f, 2, 0}, - {550, 680, 1, 4, 0x1f, 3, 0}, - {681, 850, 1, 4, 0x1f, 4, 0} + {2, 549, 4, 0x1f, 2, 0}, + {2, 680, 4, 0x1f, 3, 0}, + {2, 850, 4, 0x1f, 4, 0}, + {1, 549, 4, 0x1f, 2, 0}, + {1, 680, 4, 0x1f, 3, 0}, + {1, 850, 4, 0x1f, 4, 0}, #else - { 0, 850, 2, 6, 0x1f, 4, 0}, - { 0, 850, 1, 4, 0x1f, 4, 0} + {2, 850, 6, 0x1f, 4, 0}, + {1, 850, 4, 0x1f, 4, 0}, #endif - }, + {} }; void fsl_ddr_board_options(memctl_options_t *popts, dimm_params_t *pdimm, unsigned int ctrl_num) { - const board_specific_parameters_t *pbsp = - &(board_specific_parameters[ctrl_num][0]); - u32 num_params = sizeof(board_specific_parameters[ctrl_num]) / - sizeof(board_specific_parameters[0][0]); - u32 i; + const struct board_specific_parameters *pbsp, *pbsp_highest = NULL; ulong ddr_freq; - /* set odt_rd_cfg and odt_wr_cfg. If the there is only one dimm in - * that controller, set odt_wr_cfg to 4 for CS0, and 0 to CS1. If - * there are two dimms in the controller, set odt_rd_cfg to 3 and - * odt_wr_cfg to 3 for the even CS, 0 for the odd CS. - */ - for (i = 0; i < CONFIG_CHIP_SELECTS_PER_CTRL; i++) { - popts->cs_local_opts[i].odt_rd_cfg = 0; - popts->cs_local_opts[i].odt_wr_cfg = 1; + if (ctrl_num) { + printf("Wrong parameter for controller number %d", ctrl_num); + return; } + if (!pdimm->n_ranks) + return; + + pbsp = dimm0; /* Get clk_adjust, cpo, write_data_delay,2T, according to the board ddr * freqency and n_banks specified in board_specific_parameters table. */ ddr_freq = get_ddr_freq(0) / 1000000; - for (i = 0; i < num_params; i++) { - if (ddr_freq >= pbsp->datarate_mhz_low && - ddr_freq <= pbsp->datarate_mhz_high && - pdimm->n_ranks == pbsp->n_ranks) { - popts->clk_adjust = pbsp->clk_adjust; - popts->cpo_override = pbsp->cpo; - popts->write_data_delay = pbsp->write_data_delay; - popts->twoT_en = pbsp->force_2T; - break; + while (pbsp->datarate_mhz_high) { + if (pbsp->n_ranks == pdimm->n_ranks) { + if (ddr_freq <= pbsp->datarate_mhz_high) { + popts->clk_adjust = pbsp->clk_adjust; + popts->cpo_override = pbsp->cpo; + popts->write_data_delay = + pbsp->write_data_delay; + popts->twoT_en = pbsp->force_2T; + goto found; + } + pbsp_highest = pbsp; } pbsp++; } - if (i == num_params) { - printf("Warning: board specific timing not found " - "for data rate %lu MT/s!\n", ddr_freq); + if (pbsp_highest) { + printf("Error: board specific timing not found " + "for data rate %lu MT/s!\n" + "Trying to use the highest speed (%u) parameters\n", + ddr_freq, pbsp_highest->datarate_mhz_high); + popts->clk_adjust = pbsp_highest->clk_adjust; + popts->cpo_override = pbsp_highest->cpo; + popts->write_data_delay = pbsp_highest->write_data_delay; + popts->twoT_en = pbsp_highest->force_2T; + } else { + panic("DIMM is not supported by this board"); } +found: /* * Factors to consider for half-strength driver enable: * - number of DIMMs installed |