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Diffstat (limited to 'board/freescale/p1_p2_rdb/pci.c')
-rw-r--r--board/freescale/p1_p2_rdb/pci.c65
1 files changed, 2 insertions, 63 deletions
diff --git a/board/freescale/p1_p2_rdb/pci.c b/board/freescale/p1_p2_rdb/pci.c
index 2a2d6b7..bd1a91e 100644
--- a/board/freescale/p1_p2_rdb/pci.c
+++ b/board/freescale/p1_p2_rdb/pci.c
@@ -24,6 +24,7 @@
#include <command.h>
#include <pci.h>
#include <asm/immap_85xx.h>
+#include <asm/fsl_serdes.h>
#include <asm/io.h>
#include <asm/fsl_pci.h>
#include <libfdt.h>
@@ -31,71 +32,9 @@
DECLARE_GLOBAL_DATA_PTR;
-#ifdef CONFIG_PCIE1
-static struct pci_controller pcie1_hose;
-#endif
-
-#ifdef CONFIG_PCIE2
-static struct pci_controller pcie2_hose;
-#endif
-
void pci_init_board(void)
{
- volatile ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
- struct fsl_pci_info pci_info[2];
- u32 devdisr, pordevsr, io_sel;
- int first_free_busno = 0;
- int num = 0;
-
- int pcie_ep, pcie_configured;
-
- devdisr = in_be32(&gur->devdisr);
- pordevsr = in_be32(&gur->pordevsr);
- io_sel = (pordevsr & MPC85xx_PORDEVSR_IO_SEL) >> 19;
-
- debug (" pci_init_board: devdisr=%x, io_sel=%x\n", devdisr, io_sel);
-
- if (!(pordevsr & MPC85xx_PORDEVSR_SGMII2_DIS))
- printf("eTSEC2 is in sgmii mode.\n");
-
- puts("\n");
-#ifdef CONFIG_PCIE2
- pcie_configured = is_fsl_pci_cfg(LAW_TRGT_IF_PCIE_2, io_sel);
-
- if (pcie_configured && !(devdisr & MPC85xx_DEVDISR_PCIE)){
- SET_STD_PCIE_INFO(pci_info[num], 2);
- pcie_ep = fsl_setup_hose(&pcie2_hose, pci_info[num].regs);
- printf("PCIE2: connected to Slot 1 as %s (base addr %lx)\n",
- pcie_ep ? "Endpoint" : "Root Complex",
- pci_info[num].regs);
- first_free_busno = fsl_pci_init_port(&pci_info[num++],
- &pcie2_hose, first_free_busno);
- } else {
- printf("PCIE2: disabled\n");
- }
- puts("\n");
-#else
- setbits_be32(&gur->devdisr, MPC85xx_DEVDISR_PCIE2); /* disable */
-#endif
-
-#ifdef CONFIG_PCIE1
- pcie_configured = is_fsl_pci_cfg(LAW_TRGT_IF_PCIE_1, io_sel);
-
- if (pcie_configured && !(devdisr & MPC85xx_DEVDISR_PCIE)){
- SET_STD_PCIE_INFO(pci_info[num], 1);
- pcie_ep = fsl_setup_hose(&pcie1_hose, pci_info[num].regs);
- printf("PCIE1: connected to Slot 2 as %s (base addr %lx)\n",
- pcie_ep ? "Endpoint" : "Root Complex",
- pci_info[num].regs);
- first_free_busno = fsl_pci_init_port(&pci_info[num++],
- &pcie1_hose, first_free_busno);
- } else {
- printf("PCIE1: disabled\n");
- }
- puts("\n");
-#else
- setbits_be32(&gur->devdisr, MPC85xx_DEVDISR_PCIE); /* disable */
-#endif
+ fsl_pcie_init_board(0);
}
void ft_pci_board_setup(void *blob)