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Diffstat (limited to 'board/freescale/mpc8349itx/mpc8349itx.c')
-rw-r--r--board/freescale/mpc8349itx/mpc8349itx.c15
1 files changed, 14 insertions, 1 deletions
diff --git a/board/freescale/mpc8349itx/mpc8349itx.c b/board/freescale/mpc8349itx/mpc8349itx.c
index 972361f..704f963 100644
--- a/board/freescale/mpc8349itx/mpc8349itx.c
+++ b/board/freescale/mpc8349itx/mpc8349itx.c
@@ -25,6 +25,7 @@
#include <mpc83xx.h>
#include <i2c.h>
#include <miiphy.h>
+#include <vsc7385.h>
#ifdef CONFIG_PCI
#include <asm/mpc8349_pci.h>
#include <pci.h>
@@ -177,7 +178,7 @@ int checkboard(void)
*/
int misc_init_f(void)
{
-#ifdef CONFIG_VSC7385
+#ifdef CONFIG_VSC7385_ENET
volatile u32 *vsc7385_cpuctrl;
/* 0x1c0c0 is the VSC7385 CPU Control (CPUCTRL) Register. The power up
@@ -239,6 +240,8 @@ int misc_init_f(void)
}
/*
+ * Miscellaneous late-boot configurations
+ *
* Make sure the EEPROM has the HRCW correctly programmed.
* Make sure the RTC is correctly programmed.
*
@@ -250,6 +253,8 @@ int misc_init_f(void)
*
* This function makes sure that the I2C EEPROM is programmed
* correctly.
+ *
+ * If a VSC7385 microcode image is present, then upload it.
*/
int misc_init_r(void)
{
@@ -375,6 +380,14 @@ int misc_init_r(void)
i2c_set_bus_num(orig_bus);
#endif
+#ifdef CONFIG_VSC7385_IMAGE
+ if (vsc7385_upload_firmware((void *) CONFIG_VSC7385_IMAGE,
+ CONFIG_VSC7385_IMAGE_SIZE)) {
+ puts("Failure uploading VSC7385 microcode.\n");
+ rc = 1;
+ }
+#endif
+
return rc;
}