diff options
Diffstat (limited to 'board/freescale/ls1021atwr')
-rw-r--r-- | board/freescale/ls1021atwr/Makefile | 1 | ||||
-rw-r--r-- | board/freescale/ls1021atwr/dcu.c | 47 | ||||
-rw-r--r-- | board/freescale/ls1021atwr/ls1021atwr.c | 6 |
3 files changed, 54 insertions, 0 deletions
diff --git a/board/freescale/ls1021atwr/Makefile b/board/freescale/ls1021atwr/Makefile index b5df668..01296c0 100644 --- a/board/freescale/ls1021atwr/Makefile +++ b/board/freescale/ls1021atwr/Makefile @@ -5,3 +5,4 @@ # obj-y += ls1021atwr.o +obj-$(CONFIG_FSL_DCU_FB) += dcu.o diff --git a/board/freescale/ls1021atwr/dcu.c b/board/freescale/ls1021atwr/dcu.c new file mode 100644 index 0000000..8fe4ccb --- /dev/null +++ b/board/freescale/ls1021atwr/dcu.c @@ -0,0 +1,47 @@ +/* + * Copyright 2014 Freescale Semiconductor, Inc. + * + * FSL DCU Framebuffer driver + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <common.h> +#include <fsl_dcu_fb.h> +#include "div64.h" +#include "../common/dcu_sii9022a.h" + +DECLARE_GLOBAL_DATA_PTR; + +unsigned int dcu_set_pixel_clock(unsigned int pixclock) +{ + unsigned long long div; + + div = (unsigned long long)(gd->bus_clk / 1000); + div *= (unsigned long long)pixclock; + do_div(div, 1000000000); + + return div; +} + +int platform_dcu_init(unsigned int xres, unsigned int yres, + const char *port, + struct fb_videomode *dcu_fb_videomode) +{ + const char *name; + unsigned int pixel_format; + + if (strncmp(port, "twr_lcd", 4) == 0) { + name = "TWR_LCD_RGB card"; + } else { + name = "HDMI"; + dcu_set_dvi_encoder(dcu_fb_videomode); + } + + printf("DCU: Switching to %s monitor @ %ux%u\n", name, xres, yres); + + pixel_format = 32; + fsl_dcu_init(xres, yres, pixel_format); + + return 0; +} diff --git a/board/freescale/ls1021atwr/ls1021atwr.c b/board/freescale/ls1021atwr/ls1021atwr.c index 92ad8cd..b522ff2 100644 --- a/board/freescale/ls1021atwr/ls1021atwr.c +++ b/board/freescale/ls1021atwr/ls1021atwr.c @@ -261,6 +261,12 @@ int board_early_init_f(void) init_early_memctl_regs(); #endif +#ifdef CONFIG_FSL_DCU_FB + out_be32(&scfg->scfgrevcr, SCFG_SCFGREVCR_REV); + out_be32(&scfg->pixclkcr, SCFG_PIXCLKCR_PXCKEN); + out_be32(&scfg->scfgrevcr, SCFG_SCFGREVCR_NOREV); +#endif + return 0; } |