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-rw-r--r--board/freescale/common/Makefile15
-rw-r--r--board/freescale/common/fsl_diu_fb.c3
-rw-r--r--board/freescale/common/pixis.c218
-rw-r--r--board/freescale/common/pq-mds-pib.c3
-rw-r--r--board/freescale/common/sys_eeprom.c114
5 files changed, 185 insertions, 168 deletions
diff --git a/board/freescale/common/Makefile b/board/freescale/common/Makefile
index 9cee9f1..6665e7f 100644
--- a/board/freescale/common/Makefile
+++ b/board/freescale/common/Makefile
@@ -29,14 +29,13 @@ endif
LIB = $(obj)lib$(VENDOR).a
-COBJS := sys_eeprom.o \
- pixis.o \
- pq-mds-pib.o \
- fsl_logo_bmp.o \
- fsl_diu_fb.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
+COBJS-${CONFIG_PQ_MDS_PIB} += pq-mds-pib.o
+COBJS-${CONFIG_ID_EEPROM} += sys_eeprom.o
+COBJS-${CONFIG_FSL_DIU_FB} += fsl_diu_fb.o fsl_logo_bmp.o
+COBJS-${CONFIG_FSL_PIXIS} += pixis.o
+
+SRCS := $(SOBJS:.o=.S) $(COBJS-y:.o=.c)
+OBJS := $(addprefix $(obj),$(COBJS-y))
SOBJS := $(addprefix $(obj),$(SOBJS))
$(LIB): $(obj).depend $(OBJS)
diff --git a/board/freescale/common/fsl_diu_fb.c b/board/freescale/common/fsl_diu_fb.c
index 5a8576e..2336f6b 100644
--- a/board/freescale/common/fsl_diu_fb.c
+++ b/board/freescale/common/fsl_diu_fb.c
@@ -27,8 +27,6 @@
#include <i2c.h>
#include <malloc.h>
-#ifdef CONFIG_FSL_DIU_FB
-
#include "fsl_diu_fb.h"
#ifdef DEBUG
@@ -615,4 +613,3 @@ void fsl_diu_clear_screen(void)
memset(info->screen_base, 0, info->smem_len);
}
-#endif /* CONFIG_FSL_DIU_FB */
diff --git a/board/freescale/common/pixis.c b/board/freescale/common/pixis.c
index 45dcf4d..bff6a82 100644
--- a/board/freescale/common/pixis.c
+++ b/board/freescale/common/pixis.c
@@ -25,9 +25,8 @@
#include <common.h>
#include <command.h>
#include <watchdog.h>
-
-#ifdef CONFIG_FSL_PIXIS
#include <asm/cache.h>
+
#include "pixis.h"
@@ -184,7 +183,7 @@ int set_px_corepll(ulong corepll)
void read_from_px_regs(int set)
{
- u8 mask = 0x1C;
+ u8 mask = 0x1C; /* COREPLL, MPXPLL, SYSCLK controlled by PIXIS */
u8 tmp = in8(PIXIS_BASE + PIXIS_VCFGEN0);
if (set)
@@ -197,7 +196,7 @@ void read_from_px_regs(int set)
void read_from_px_regs_altbank(int set)
{
- u8 mask = 0x04;
+ u8 mask = 0x04; /* FLASHBANK and FLASHMAP controlled by PIXIS */
u8 tmp = in8(PIXIS_BASE + PIXIS_VCFGEN1);
if (set)
@@ -208,15 +207,26 @@ void read_from_px_regs_altbank(int set)
}
#ifndef CFG_PIXIS_VBOOT_MASK
-#define CFG_PIXIS_VBOOT_MASK 0x40
+#define CFG_PIXIS_VBOOT_MASK (0x40)
#endif
+void clear_altbank(void)
+{
+ u8 tmp;
+
+ tmp = in8(PIXIS_BASE + PIXIS_VBOOT);
+ tmp &= ~CFG_PIXIS_VBOOT_MASK;
+
+ out8(PIXIS_BASE + PIXIS_VBOOT, tmp);
+}
+
+
void set_altbank(void)
{
u8 tmp;
tmp = in8(PIXIS_BASE + PIXIS_VBOOT);
- tmp ^= CFG_PIXIS_VBOOT_MASK;
+ tmp |= CFG_PIXIS_VBOOT_MASK;
out8(PIXIS_BASE + PIXIS_VBOOT, tmp);
}
@@ -227,11 +237,11 @@ void set_px_go(void)
u8 tmp;
tmp = in8(PIXIS_BASE + PIXIS_VCTL);
- tmp = tmp & 0x1E;
+ tmp = tmp & 0x1E; /* clear GO bit */
out8(PIXIS_BASE + PIXIS_VCTL, tmp);
tmp = in8(PIXIS_BASE + PIXIS_VCTL);
- tmp = tmp | 0x01;
+ tmp = tmp | 0x01; /* set GO bit - start reset sequencer */
out8(PIXIS_BASE + PIXIS_VCTL, tmp);
}
@@ -293,7 +303,7 @@ static ulong strfractoint(uchar *strptr)
* simply create the intarr.
*/
i = 0;
- while (strptr[i] != 46) {
+ while (strptr[i] != '.') {
if (strptr[i] == 0) {
no_dec = 1;
break;
@@ -313,7 +323,7 @@ static ulong strfractoint(uchar *strptr)
} else {
j = 0;
i++; /* Skipping the decimal point */
- while ((strptr[i] > 47) && (strptr[i] < 58)) {
+ while ((strptr[i] >= '0') && (strptr[i] <= '9')) {
decarr[j] = strptr[i];
i++;
j++;
@@ -340,8 +350,14 @@ static ulong strfractoint(uchar *strptr)
int
pixis_reset_cmd(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
{
- ulong val;
- ulong corepll;
+ unsigned int i;
+ char *p_cf = NULL;
+ char *p_cf_sysclk = NULL;
+ char *p_cf_corepll = NULL;
+ char *p_cf_mpxpll = NULL;
+ char *p_altbank = NULL;
+ char *p_wd = NULL;
+ unsigned int unknown_param = 0;
/*
* No args is a simple reset request.
@@ -351,116 +367,97 @@ pixis_reset_cmd(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
/* not reached */
}
- if (strcmp(argv[1], "cf") == 0) {
+ for (i = 1; i < argc; i++) {
+ if (strcmp(argv[i], "cf") == 0) {
+ p_cf = argv[i];
+ if (i + 3 >= argc) {
+ break;
+ }
+ p_cf_sysclk = argv[i+1];
+ p_cf_corepll = argv[i+2];
+ p_cf_mpxpll = argv[i+3];
+ i += 3;
+ continue;
+ }
- /*
- * Reset with frequency changed:
- * cf <SYSCLK freq> <COREPLL ratio> <MPXPLL ratio>
- */
- if (argc < 5) {
- puts(cmdtp->usage);
- return 1;
+ if (strcmp(argv[i], "altbank") == 0) {
+ p_altbank = argv[i];
+ continue;
}
- read_from_px_regs(0);
-
- val = set_px_sysclk(simple_strtoul(argv[2], NULL, 10));
-
- corepll = strfractoint((uchar *)argv[3]);
- val = val + set_px_corepll(corepll);
- val = val + set_px_mpxpll(simple_strtoul(argv[4], NULL, 10));
- if (val == 3) {
- puts("Setting registers VCFGEN0 and VCTL\n");
- read_from_px_regs(1);
- puts("Resetting board with values from ");
- puts("VSPEED0, VSPEED1, VCLKH, and VCLKL \n");
- set_px_go();
- } else {
- puts(cmdtp->usage);
- return 1;
+ if (strcmp(argv[i], "wd") == 0) {
+ p_wd = argv[i];
+ continue;
}
- while (1) ; /* Not reached */
-
- } else if (strcmp(argv[1], "altbank") == 0) {
-
- /*
- * Reset using alternate flash bank:
- */
- if (argv[2] == 0) {
- /*
- * Reset from alternate bank without changing
- * frequency and without watchdog timer enabled.
- * altbank
- */
- read_from_px_regs(0);
- read_from_px_regs_altbank(0);
- if (argc > 2) {
- puts(cmdtp->usage);
- return 1;
- }
- puts("Setting registers VCFGNE1, VBOOT, and VCTL\n");
- set_altbank();
- read_from_px_regs_altbank(1);
- puts("Resetting board to boot from the other bank.\n");
- set_px_go();
-
- } else if (strcmp(argv[2], "cf") == 0) {
- /*
- * Reset with frequency changed
- * altbank cf <SYSCLK freq> <COREPLL ratio>
- * <MPXPLL ratio>
- */
- read_from_px_regs(0);
- read_from_px_regs_altbank(0);
- val = set_px_sysclk(simple_strtoul(argv[3], NULL, 10));
- corepll = strfractoint((uchar *)argv[4]);
- val = val + set_px_corepll(corepll);
- val = val + set_px_mpxpll(simple_strtoul(argv[5],
- NULL, 10));
- if (val == 3) {
- puts("Setting registers VCFGEN0, VCFGEN1, VBOOT, and VCTL\n");
- set_altbank();
- read_from_px_regs(1);
- read_from_px_regs_altbank(1);
- puts("Enabling watchdog timer on the FPGA\n");
- puts("Resetting board with values from ");
- puts("VSPEED0, VSPEED1, VCLKH and VCLKL ");
- puts("to boot from the other bank.\n");
- set_px_go_with_watchdog();
- } else {
- puts(cmdtp->usage);
- return 1;
- }
+ unknown_param = 1;
+ }
- while (1) ; /* Not reached */
-
- } else if (strcmp(argv[2], "wd") == 0) {
- /*
- * Reset from alternate bank without changing
- * frequencies but with watchdog timer enabled:
- * altbank wd
- */
- read_from_px_regs(0);
- read_from_px_regs_altbank(0);
- puts("Setting registers VCFGEN1, VBOOT, and VCTL\n");
- set_altbank();
- read_from_px_regs_altbank(1);
- puts("Enabling watchdog timer on the FPGA\n");
- puts("Resetting board to boot from the other bank.\n");
- set_px_go_with_watchdog();
- while (1) ; /* Not reached */
-
- } else {
- puts(cmdtp->usage);
+ /*
+ * Check that cf has all required parms
+ */
+ if ((p_cf && !(p_cf_sysclk && p_cf_corepll && p_cf_mpxpll))
+ || unknown_param) {
+ puts(cmdtp->help);
+ return 1;
+ }
+
+ /*
+ * PIXIS seems to be sensitive to the ordering of
+ * the registers that are touched.
+ */
+ read_from_px_regs(0);
+
+ if (p_altbank) {
+ read_from_px_regs_altbank(0);
+ }
+ clear_altbank();
+
+ /*
+ * Clock configuration specified.
+ */
+ if (p_cf) {
+ unsigned long sysclk;
+ unsigned long corepll;
+ unsigned long mpxpll;
+
+ sysclk = simple_strtoul(p_cf_sysclk, NULL, 10);
+ corepll = strfractoint((uchar *) p_cf_corepll);
+ mpxpll = simple_strtoul(p_cf_mpxpll, NULL, 10);
+
+ if (!(set_px_sysclk(sysclk)
+ && set_px_corepll(corepll)
+ && set_px_mpxpll(mpxpll))) {
+ puts(cmdtp->help);
return 1;
}
+ read_from_px_regs(1);
+ }
+
+ /*
+ * Altbank specified
+ *
+ * NOTE CHANGE IN BEHAVIOR: previous code would default
+ * to enabling watchdog if altbank is specified.
+ * Now the watchdog must be enabled explicitly using 'wd'.
+ */
+ if (p_altbank) {
+ set_altbank();
+ read_from_px_regs_altbank(1);
+ }
+ /*
+ * Reset with watchdog specified.
+ */
+ if (p_wd) {
+ set_px_go_with_watchdog();
} else {
- puts(cmdtp->usage);
- return 1;
+ set_px_go();
}
+ /*
+ * Shouldn't be reached.
+ */
return 0;
}
@@ -474,4 +471,3 @@ U_BOOT_CMD(
" pixis_reset altbank cf <SYSCLK freq> <COREPLL ratio> <MPXPLL ratio>\n"
" pixis_reset cf <SYSCLK freq> <COREPLL ratio> <MPXPLL ratio>\n"
);
-#endif /* CONFIG_FSL_PIXIS */
diff --git a/board/freescale/common/pq-mds-pib.c b/board/freescale/common/pq-mds-pib.c
index e4f96e8..6c72aa1 100644
--- a/board/freescale/common/pq-mds-pib.c
+++ b/board/freescale/common/pq-mds-pib.c
@@ -12,8 +12,6 @@
#include <i2c.h>
#include <asm/io.h>
-#ifdef CONFIG_PQ_MDS_PIB
-
#include "pq-mds-pib.h"
int pib_init(void)
@@ -102,4 +100,3 @@ int pib_init(void)
i2c_set_bus_num(orig_i2c_bus);
return 0;
}
-#endif /* CONFIG_PQ_MDS_PIB */
diff --git a/board/freescale/common/sys_eeprom.c b/board/freescale/common/sys_eeprom.c
index 7bc663b..44c0978 100644
--- a/board/freescale/common/sys_eeprom.c
+++ b/board/freescale/common/sys_eeprom.c
@@ -27,18 +27,20 @@
#include <i2c.h>
#include <linux/ctype.h>
-#ifdef CFG_ID_EEPROM
typedef struct {
- unsigned char id[4]; /* 0x0000 - 0x0003 */
- unsigned char sn[12]; /* 0x0004 - 0x000F */
- unsigned char errata[5]; /* 0x0010 - 0x0014 */
- unsigned char date[7]; /* 0x0015 - 0x001a */
- unsigned char res_1[37]; /* 0x001b - 0x003f */
- unsigned char tab_size; /* 0x0040 */
- unsigned char tab_flag; /* 0x0041 */
- unsigned char mac[8][6]; /* 0x0042 - 0x0071 */
- unsigned char res_2[126]; /* 0x0072 - 0x00ef */
- unsigned int crc; /* 0x00f0 - 0x00f3 crc32 checksum */
+ u8 id[4]; /* 0x0000 - 0x0003 EEPROM Tag */
+ u8 sn[12]; /* 0x0004 - 0x000F Serial Number */
+ u8 errata[5]; /* 0x0010 - 0x0014 Errata Level */
+ u8 date[6]; /* 0x0015 - 0x001a Build Date */
+ u8 res_0; /* 0x001b Reserved */
+ u8 version[4]; /* 0x001c - 0x001f Version */
+ u8 tempcal[8]; /* 0x0020 - 0x0027 Temperature Calibration Factors*/
+ u8 tempcalsys[2]; /* 0x0028 - 0x0029 System Temperature Calibration Factors*/
+ u8 res_1[22]; /* 0x0020 - 0x003f Reserved */
+ u8 mac_size; /* 0x0040 Mac table size */
+ u8 mac_flag; /* 0x0041 Mac table flags */
+ u8 mac[8][6]; /* 0x0042 - 0x0071 Mac addresses */
+ u32 crc; /* 0x0072 crc32 checksum */
} EEPROM_data;
static EEPROM_data mac_data;
@@ -46,28 +48,57 @@ static EEPROM_data mac_data;
int mac_show(void)
{
int i;
+ u8 mac_size;
unsigned char ethaddr[8][18];
+ unsigned char enetvar[32];
+
+ /* Show EEPROM tagID,
+ * always the four characters 'NXID'.
+ */
+ printf("ID ");
+ for (i = 0; i < 4; i++)
+ printf("%c", mac_data.id[i]);
+ printf("\n");
+
+ /* Show Serial number,
+ * 0 to 11 charaters of errata information.
+ */
+ printf("SN ");
+ for (i = 0; i < 12; i++)
+ printf("%c", mac_data.sn[i]);
+ printf("\n");
- printf("ID %c%c%c%c\n",
- mac_data.id[0],
- mac_data.id[1],
- mac_data.id[2],
- mac_data.id[3]);
- printf("Errata %c%c%c%c%c\n",
- mac_data.errata[0],
- mac_data.errata[1],
- mac_data.errata[2],
- mac_data.errata[3],
- mac_data.errata[4]);
- printf("Date %c%c%c%c%c%c%c\n",
+ /* Show Errata Level,
+ * 0 to 4 characters of errata information.
+ */
+ printf("Errata ");
+ for (i = 0; i < 5; i++)
+ printf("%c", mac_data.errata[i]);
+ printf("\n");
+
+ /* Show Build Date,
+ * BCD date values, as YYMMDDhhmmss.
+ */
+ printf("Date 20%02x\/%02x\/%02x %02x:%02x:%02x\n",
mac_data.date[0],
mac_data.date[1],
mac_data.date[2],
mac_data.date[3],
mac_data.date[4],
- mac_data.date[5],
- mac_data.date[6]);
- for (i = 0; i < 8; i++) {
+ mac_data.date[5]);
+
+ /* Show MAC table size,
+ * Value from 0 to 7 indicating how many MAC
+ * addresses are stored in the system EEPROM.
+ */
+ if((mac_data.mac_size > 0) && (mac_data.mac_size <= 8))
+ mac_size = mac_data.mac_size;
+ else
+ mac_size = 8; /* Set the max size */
+ printf("MACSIZE %x\n", mac_size);
+
+ /* Show Mac addresses */
+ for (i = 0; i < mac_size; i++) {
sprintf((char *)ethaddr[i],
"%02x:%02x:%02x:%02x:%02x:%02x",
mac_data.mac[i][0],
@@ -77,12 +108,12 @@ int mac_show(void)
mac_data.mac[i][4],
mac_data.mac[i][5]);
printf("MAC %d %s\n", i, ethaddr[i]);
- }
- setenv("ethaddr", (char *)ethaddr[0]);
- setenv("eth1addr", (char *)ethaddr[1]);
- setenv("eth2addr", (char *)ethaddr[2]);
- setenv("eth3addr", (char *)ethaddr[3]);
+ sprintf((char *)enetvar,
+ i ? "eth%daddr" : "ethaddr", i);
+ setenv((char *)enetvar, (char *)ethaddr[i]);
+
+ }
return 0;
}
@@ -121,17 +152,14 @@ int mac_prog(void)
unsigned char dev = ID_EEPROM_ADDR, *ptr;
unsigned char *eeprom_data = (unsigned char *)(&mac_data);
- for (i = 0; i < sizeof(mac_data.res_1); i++)
- mac_data.res_1[i] = 0;
- for (i = 0; i < sizeof(mac_data.res_2); i++)
- mac_data.res_2[i] = 0;
+ mac_data.res_0 = 0;
+ memset((void *)mac_data.res_1, 0, sizeof(mac_data.res_1));
+
length = sizeof(EEPROM_data);
crc = crc32(crc, eeprom_data, length - 4);
mac_data.crc = crc;
for (i = 0, ptr = eeprom_data; i < length; i += 8, ptr += 8) {
- ret =
- i2c_write(dev, i, 1, ptr,
- (length - i) < 8 ? (length - i) : 8);
+ ret = i2c_write(dev, i, 1, ptr, min((length - i),8));
udelay(5000); /* 5ms write cycle timing */
if (ret)
break;
@@ -180,12 +208,13 @@ int do_mac(cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
}
break;
case 'd': /* date */
- for (i = 0; i < 7; i++) {
- mac_data.date[i] = argv[2][i];
+ mac_val = simple_strtoull(argv[2], NULL, 16);
+ for (i = 0; i < 6; i++) {
+ mac_data.date[i] = (mac_val >> (40 - 8 * i));
}
break;
- case 'p': /* number of ports */
- mac_data.tab_size =
+ case 'p': /* mac table size */
+ mac_data.mac_size =
(unsigned char)simple_strtoul(argv[2], NULL, 16);
break;
case '0': /* mac 0 */
@@ -253,4 +282,3 @@ int mac_read_from_eeprom(void)
}
return 0;
}
-#endif /* CFG_ID_EEPROM */
generated by cgit v1.1 at 2024-12-30 19:09:52 +0000