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Diffstat (limited to 'board/freescale/common/qixis.c')
-rw-r--r--board/freescale/common/qixis.c107
1 files changed, 95 insertions, 12 deletions
diff --git a/board/freescale/common/qixis.c b/board/freescale/common/qixis.c
index c92902a..2b74d02 100644
--- a/board/freescale/common/qixis.c
+++ b/board/freescale/common/qixis.c
@@ -14,8 +14,23 @@
#include <common.h>
#include <command.h>
#include <asm/io.h>
+#include <linux/time.h>
+#include <i2c.h>
#include "qixis.h"
+#ifdef CONFIG_SYS_I2C_FPGA_ADDR
+u8 qixis_read_i2c(unsigned int reg)
+{
+ return i2c_reg_read(CONFIG_SYS_I2C_FPGA_ADDR, reg);
+}
+
+void qixis_write_i2c(unsigned int reg, u8 value)
+{
+ u8 val = value;
+ i2c_reg_write(CONFIG_SYS_I2C_FPGA_ADDR, reg, val);
+}
+#endif
+
u8 qixis_read(unsigned int reg)
{
void *p = (void *)QIXIS_BASE;
@@ -30,6 +45,72 @@ void qixis_write(unsigned int reg, u8 value)
out_8(p + reg, value);
}
+u16 qixis_read_minor(void)
+{
+ u16 minor;
+
+ /* this data is in little endian */
+ QIXIS_WRITE(tagdata, 5);
+ minor = QIXIS_READ(tagdata);
+ QIXIS_WRITE(tagdata, 6);
+ minor += QIXIS_READ(tagdata) << 8;
+
+ return minor;
+}
+
+char *qixis_read_time(char *result)
+{
+ time_t time = 0;
+ int i;
+
+ /* timestamp is in 32-bit big endian */
+ for (i = 8; i <= 11; i++) {
+ QIXIS_WRITE(tagdata, i);
+ time = (time << 8) + QIXIS_READ(tagdata);
+ }
+
+ return ctime_r(&time, result);
+}
+
+char *qixis_read_tag(char *buf)
+{
+ int i;
+ char tag, *ptr = buf;
+
+ for (i = 16; i <= 63; i++) {
+ QIXIS_WRITE(tagdata, i);
+ tag = QIXIS_READ(tagdata);
+ *(ptr++) = tag;
+ if (!tag)
+ break;
+ }
+ if (i > 63)
+ *ptr = '\0';
+
+ return buf;
+}
+
+/*
+ * return the string of binary of u8 in the format of
+ * 1010 10_0. The masked bit is filled as underscore.
+ */
+const char *byte_to_binary_mask(u8 val, u8 mask, char *buf)
+{
+ char *ptr;
+ int i;
+
+ ptr = buf;
+ for (i = 0x80; i > 0x08 ; i >>= 1, ptr++)
+ *ptr = (val & i) ? '1' : ((mask & i) ? '_' : '0');
+ *(ptr++) = ' ';
+ for (i = 0x08; i > 0 ; i >>= 1, ptr++)
+ *ptr = (val & i) ? '1' : ((mask & i) ? '_' : '0');
+
+ *ptr = '\0';
+
+ return buf;
+}
+
void qixis_reset(void)
{
QIXIS_WRITE(rst_ctl, QIXIS_RST_CTL_RESET);
@@ -61,7 +142,6 @@ void set_altbank(void)
QIXIS_WRITE(brdcfg[0], reg);
}
-#ifdef DEBUG
static void qixis_dump_regs(void)
{
int i;
@@ -91,7 +171,14 @@ static void qixis_dump_regs(void)
printf("stat_sys = %02x\n", QIXIS_READ(stat_sys));
printf("stat_alrm = %02x\n", QIXIS_READ(stat_alrm));
}
-#endif
+
+static void __qixis_dump_switch(void)
+{
+ puts("Reverse engineering switch is not implemented for this board\n");
+}
+
+void qixis_dump_switch(void)
+ __attribute__((weak, alias("__qixis_dump_switch")));
int qixis_reset_cmd(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
@@ -122,16 +209,13 @@ int qixis_reset_cmd(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
return 0;
}
}
- }
-
-#ifdef DEBUG
- else if (strcmp(argv[1], "dump") == 0) {
+ } else if (strcmp(argv[1], "dump") == 0) {
qixis_dump_regs();
return 0;
- }
-#endif
-
- else {
+ } else if (strcmp(argv[1], "switch") == 0) {
+ qixis_dump_switch();
+ return 0;
+ } else {
printf("Invalid option: %s\n", argv[1]);
return 1;
}
@@ -146,7 +230,6 @@ U_BOOT_CMD(
"qixis_reset altbank - reset to alternate bank\n"
"qixis watchdog <watchdog_period> - set the watchdog period\n"
" period: 1s 2s 4s 8s 16s 32s 1min 2min 4min 8min\n"
-#ifdef DEBUG
"qixis_reset dump - display the QIXIS registers\n"
-#endif
+ "qixis_reset switch - display switch\n"
);