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-rw-r--r--board/evb64260/bootseq.txt94
-rw-r--r--board/evb64260/eth_addrtbl.h84
-rw-r--r--board/evb64260/mpsc.h142
-rw-r--r--board/evb64260/serial.h63
4 files changed, 383 insertions, 0 deletions
diff --git a/board/evb64260/bootseq.txt b/board/evb64260/bootseq.txt
new file mode 100644
index 0000000..648c2ff
--- /dev/null
+++ b/board/evb64260/bootseq.txt
@@ -0,0 +1,94 @@
+(cpu/mpc7xxx/start.S)
+
+start:
+ b boot_cold
+
+start_warm:
+ b boot_warm
+
+
+boot_cold:
+boot_warm:
+ clear bats
+ init l2 (if enabled)
+ init altivec (if enabled)
+ invalidate l2 (if enabled)
+ setup bats (from defines in config_EVB)
+ enable_addr_trans: (if MMU enabled)
+ enable MSR_IR and MSR_DR
+ jump to in_flash
+
+in_flash:
+ enable l1 dcache
+ gal_low_init: (board/evb64260/sdram_init.S)
+ config SDRAM (CFG, TIMING, DECODE)
+ init scratch regs (810 + 814)
+
+ detect DIMM0 (bank 0 only)
+ config SDRAM_PARA0 to 256/512Mbit
+ bl sdram_op_mode
+ detect bank0 width
+ write scratch reg 810
+ config SDRAM_PARA0 with results
+ config SDRAM_PARA1 with results
+
+ detect DIMM1 (bank 2 only)
+ config SDRAM_PARA2 to 256/512Mbit
+ detect bank2 width
+ write scratch reg 814
+ config SDRAM_PARA2 with results
+ config SDRAM_PARA3 with results
+
+ setup device bus timings/width
+ setup boot device timings/width
+
+ setup CPU_CONF (0x0)
+ setup cpu master control register 0x160
+ setup PCI0 TIMEOUT
+ setup PCI1 TIMEOUT
+ setup PCI0 BAR
+ setup PCI1 BAR
+
+ setup MPP control 0-3
+ setup GPP level control
+ setup Serial ports multiplex
+
+ setup stack pointer (r1)
+ setup GOT
+ call cpu_init_f
+ debug leds
+ board_init_f: (common/board.c)
+ board_pre_init:
+ remap gt regs?
+ map PCI mem/io
+ map device space
+ clear out interupts
+ init_timebase
+ env_init
+ serial_init
+ console_init_f
+ display_options
+ initdram: (board/evb64260/evb64260.c)
+ detect memory
+ for each bank:
+ dram_size()
+ setup PCI slave memory mappings
+ setup SCS
+ setup monitor
+ alloc board info struct
+ init bd struct
+ relocate_code: (cpu/mpc7xxx/start.S)
+ copy,got,clearbss
+ board_init_r(bd, dest_addr) (common/board.c)
+ setup bd function pointers
+ trap_init
+ flash_init: (board/evb64260/flash.c)
+ setup bd flash info
+ cpu_init_r: (cpu/mpc7xxx/cpu_init.c)
+ nothing
+ mem_malloc_init
+ malloc_bin_reloc
+ spi_init (r or f)??? (CFG_ENV_IS_IN_EEPROM)
+ env_relocated
+ misc_init_r(bd): (board/evb64260/evb64260.c)
+ mpsc_init2
diff --git a/board/evb64260/eth_addrtbl.h b/board/evb64260/eth_addrtbl.h
new file mode 100644
index 0000000..60380c6
--- /dev/null
+++ b/board/evb64260/eth_addrtbl.h
@@ -0,0 +1,84 @@
+#ifndef _ADDRESS_TABLE_H
+#define _ADDRESS_TABLE_H 1
+
+/*
+ * ----------------------------------------------------------------------------
+ * addressTable.h - this file has all the declarations of the address table
+ */
+
+#define _8K_TABLE 0
+#define ADDRESS_TABLE_ALIGNMENT 8
+#define HASH_DEFAULT_MODE 14
+#define HASH_MODE 13
+#define HASH_SIZE 12
+#define HOP_NUMBER 12
+#define MAC_ADDRESS_STRING_SIZE 12
+#define MAC_ENTRY_SIZE sizeof(addrTblEntry)
+#define MAX_NUMBER_OF_ADDRESSES_TO_STORE 1000
+#define PROMISCUOUS_MODE 0
+#define SKIP 1<<1
+#define SKIP_BIT 1
+#define VALID 1
+
+/*
+ * ----------------------------------------------------------------------------
+ * XXX_MIKE - potential sign-extension bugs lurk here...
+ */
+#define NIBBLE_SWAPPING_32_BIT(X) ( (((X) & 0xf0f0f0f0) >> 4) \
+ | (((X) & 0x0f0f0f0f) << 4) )
+
+#define NIBBLE_SWAPPING_16_BIT(X) ( (((X) & 0x0000f0f0) >> 4) \
+ | (((X) & 0x00000f0f) << 4) )
+
+#define FLIP_4_BITS(X) ( (((X) & 0x01) << 3) | (((X) & 0x002) << 1) \
+ | (((X) & 0x04) >> 1) | (((X) & 0x008) >> 3) )
+
+#define FLIP_6_BITS(X) ( (((X) & 0x01) << 5) | (((X) & 0x020) >> 5) \
+ | (((X) & 0x02) << 3) | (((X) & 0x010) >> 3) \
+ | (((X) & 0x04) << 1) | (((X) & 0x008) >> 1) )
+
+#define FLIP_9_BITS(X) ( (((X) & 0x01) << 8) | (((X) & 0x100) >> 8) \
+ | (((X) & 0x02) << 6) | (((X) & 0x080) >> 6) \
+ | (((X) & 0x04) << 4) | (((X) & 0x040) >> 4) \
+ | ((X) & 0x10) | (((X) & 0x08) << 2) | (((X) & 0x020) >> 2) )
+
+/*
+ * V: value we're operating on
+ * O: offset of rightmost bit in field
+ * W: width of field to shift
+ * S: distance to shift left
+ */
+#define MASK( fieldWidth ) ((1 << (fieldWidth)) - 1)
+#define leftShiftedBitfield( V,O,W,S) (((V) & (MASK(W) << (O))) << (S))
+#define rightShiftedBitfield(V,O,W,S) (((u32)((V) & (MASK(W) << (O)))) >> (S))
+
+
+/*
+ * Push to main memory all cache lines associated with
+ * the specified range of virtual memory addresses
+ *
+ * A: Address of first byte in range to flush
+ * N: Number of bytes to flush
+ * Note - flush_dcache_range() does a "sync", does NOT invalidate
+ */
+#define DCACHE_FLUSH_N_SYNC( A, N ) flush_dcache_range( (A), ((A)+(N)) )
+
+
+
+typedef struct addressTableEntryStruct {
+ u32 hi;
+ u32 lo;
+} addrTblEntry;
+
+u32
+uncachedPages( u32 pages );
+u32
+hashTableFunction( u32 macH, u32 macL, u32 HashSize, u32 hash_mode );
+
+unsigned int
+initAddressTable( u32 port, u32 hashMode, u32 hashSize );
+
+int
+addAddressTableEntry( u32 port, u32 macH, u32 macL, u32 rd, u32 skip );
+
+#endif /* #ifndef _ADDRESS_TABLE_H */
diff --git a/board/evb64260/mpsc.h b/board/evb64260/mpsc.h
new file mode 100644
index 0000000..54b642a
--- /dev/null
+++ b/board/evb64260/mpsc.h
@@ -0,0 +1,142 @@
+/*
+ * (C) Copyright 2001
+ * John Clemens <clemens@mclx.com>, Mission Critical Linux, Inc.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+/*
+ * mpsc.h - header file for MPSC in uart mode (console driver)
+ */
+
+#ifndef __MPSC_H__
+#define __MPSC_H__
+
+/* include actual Galileo defines */
+#include <galileo/gt64260R.h>
+
+/* driver related defines */
+
+int mpsc_init(int baud);
+void mpsc_init2(void);
+char mpsc_getchar(void);
+int mpsc_test_char(void);
+int galbrg_set_baudrate(int channel, int rate);
+
+int mpsc_putchar_early(char ch);
+extern int (*mpsc_putchar)(char ch);
+
+#define CHANNEL CONFIG_MPSC_PORT
+
+#define TX_DESC 5
+#define RX_DESC 20
+
+#define DESC_FIRST 0x00010000
+#define DESC_LAST 0x00020000
+#define DESC_OWNER 0x80000000
+
+#define TX_DEMAND 0x00800000
+#define TX_STOP 0x00010000
+#define RX_ENABLE 0x00000080
+
+#define SDMA_RX_ABORT (1 << 15)
+#define SDMA_TX_ABORT (1 << 31)
+#define MPSC_TX_ABORT (1 << 7)
+#define MPSC_RX_ABORT (1 << 23)
+#define MPSC_ENTER_HUNT (1 << 31)
+
+/* MPSC defines */
+
+#define GALMPSC_CONNECT 0x1
+#define GALMPSC_DISCONNECT 0x0
+
+#define GALMPSC_UART 0x1
+
+#define GALMPSC_STOP_BITS_1 0x0
+#define GALMPSC_STOP_BITS_2 0x1
+#define GALMPSC_CHAR_LENGTH_8 0x3
+#define GALMPSC_CHAR_LENGTH_7 0x2
+
+#define GALMPSC_PARITY_ODD 0x0
+#define GALMPSC_PARITY_EVEN 0x2
+#define GALMPSC_PARITY_MARK 0x3
+#define GALMPSC_PARITY_SPACE 0x1
+#define GALMPSC_PARITY_NONE -1
+
+#define GALMPSC_SERIAL_MULTIPLEX SERIAL_PORT_MULTIPLEX /* 0xf010 */
+#define GALMPSC_ROUTING_REGISTER MAIN_ROUTING_REGISTER /* 0xb400 */
+#define GALMPSC_RxC_ROUTE RECEIVE_CLOCK_ROUTING_REGISTER /* 0xb404 */
+#define GALMPSC_TxC_ROUTE TRANSMIT_CLOCK_ROUTING_REGISTER /* 0xb408 */
+#define GALMPSC_MCONF_LOW MPSC0_MAIN_CONFIGURATION_LOW /* 0x8000 */
+#define GALMPSC_MCONF_HIGH MPSC0_MAIN_CONFIGURATION_HIGH /* 0x8004 */
+#define GALMPSC_PROTOCONF_REG MPSC0_PROTOCOL_CONFIGURATION /* 0x8008 */
+
+#define GALMPSC_REG_GAP 0x1000
+
+#define GALMPSC_MCONF_CHREG_BASE CHANNEL0_REGISTER1 /* 0x800c */
+#define GALMPSC_CHANNELREG_1 CHANNEL0_REGISTER1 /* 0x800c */
+#define GALMPSC_CHANNELREG_2 CHANNEL0_REGISTER2 /* 0x8010 */
+#define GALMPSC_CHANNELREG_3 CHANNEL0_REGISTER3 /* 0x8014 */
+#define GALMPSC_CHANNELREG_4 CHANNEL0_REGISTER4 /* 0x8018 */
+#define GALMPSC_CHANNELREG_5 CHANNEL0_REGISTER5 /* 0x801c */
+#define GALMPSC_CHANNELREG_6 CHANNEL0_REGISTER6 /* 0x8020 */
+#define GALMPSC_CHANNELREG_7 CHANNEL0_REGISTER7 /* 0x8024 */
+#define GALMPSC_CHANNELREG_8 CHANNEL0_REGISTER8 /* 0x8028 */
+#define GALMPSC_CHANNELREG_9 CHANNEL0_REGISTER9 /* 0x802c */
+#define GALMPSC_CHANNELREG_10 CHANNEL0_REGISTER10 /* 0x8030 */
+#define GALMPSC_CHANNELREG_11 CHANNEL0_REGISTER11 /* 0x8034 */
+
+#define GALSDMA_COMMAND_FIRST (1 << 16)
+#define GALSDMA_COMMAND_LAST (1 << 17)
+#define GALSDMA_COMMAND_ENABLEINT (1 << 23)
+#define GALSDMA_COMMAND_AUTO (1 << 30)
+#define GALSDMA_COMMAND_OWNER (1 << 31)
+
+#define GALSDMA_RX 0
+#define GALSDMA_TX 1
+
+/* CHANNEL2 should be CHANNEL1, according to documentation,
+ * but to work with the current GTREGS file...
+ */
+#define GALSDMA_0_CONF_REG CHANNEL0_CONFIGURATION_REGISTER /* 0x4000 */
+#define GALSDMA_1_CONF_REG CHANNEL2_CONFIGURATION_REGISTER /* 0x6000 */
+#define GALSDMA_0_COM_REG CHANNEL0_COMMAND_REGISTER /* 0x4008 */
+#define GALSDMA_1_COM_REG CHANNEL2_COMMAND_REGISTER /* 0x6008 */
+#define GALSDMA_0_CUR_RX_PTR CHANNEL0_CURRENT_RX_DESCRIPTOR_POINTER /* 0x4810 */
+#define GALSDMA_0_CUR_TX_PTR CHANNEL0_CURRENT_TX_DESCRIPTOR_POINTER /* 0x4c10 */
+#define GALSDMA_0_FIR_TX_PTR CHANNEL0_FIRST_TX_DESCRIPTOR_POINTER /* 0x4c14 */
+#define GALSDMA_1_CUR_RX_PTR CHANNEL2_CURRENT_RX_DESCRIPTOR_POINTER /* 0x6810 */
+#define GALSDMA_1_CUR_TX_PTR CHANNEL2_CURRENT_TX_DESCRIPTOR_POINTER /* 0x6c10 */
+#define GALSDMA_1_FIR_TX_PTR CHANNEL2_FIRST_TX_DESCRIPTOR_POINTER /* 0x6c14 */
+#define GALSDMA_REG_DIFF 0x2000
+
+/* WRONG in gt64260R.h */
+#define GALSDMA_INT_CAUSE 0xb800 /* SDMA_CAUSE */
+#define GALSDMA_INT_MASK 0xb880 /* SDMA_MASK */
+
+#define GALSDMA_MODE_UART 0
+#define GALSDMA_MODE_BISYNC 1
+#define GALSDMA_MODE_HDLC 2
+#define GALSDMA_MODE_TRANSPARENT 3
+
+#define GALBRG_0_CONFREG BRG0_CONFIGURATION_REGISTER /* 0xb200 */
+#define GALBRG_REG_GAP 0x0008
+#define GALBRG_0_BTREG BRG0_BAUDE_TUNING_REGISTER /* 0xb204 */
+
+#endif /* __MPSC_H__ */
diff --git a/board/evb64260/serial.h b/board/evb64260/serial.h
new file mode 100644
index 0000000..bac9253
--- /dev/null
+++ b/board/evb64260/serial.h
@@ -0,0 +1,63 @@
+/* serial.h - mostly useful for DUART serial_init in serial.c */
+
+#ifndef __SERIAL_H__
+#define __SERIAL_H__
+
+#if 0
+
+#define B230400 1
+#define B115200 2
+#define B57600 4
+#define B38400 82
+#define B19200 163
+#define B9600 24
+#define B4800 651
+#define B2400 1302
+#define B1200 2604
+#define B600 5208
+#define B300 10417
+#define B150 20833
+#define B110 28409
+#define BDEFAULT B115200
+
+ /* this stuff is important to initialize
+ the DUART channels */
+
+#define Scale 0x01L /* distance between port addresses */
+#define COM1 0x000003f8 /* Keyboard */
+#define COM2 0x000002f8 /* Host */
+
+
+/* Port Definitions relative to base COM port addresses */
+#define DataIn (0x00*Scale) /* data input port */
+#define DataOut (0x00*Scale) /* data output port */
+#define BaudLsb (0x00*Scale) /* baud rate divisor least significant byte */
+#define BaudMsb (0x01*Scale) /* baud rate divisor most significant byte */
+#define Ier (0x01*Scale) /* interrupt enable register */
+#define Iir (0x02*Scale) /* interrupt identification register */
+#define Lcr (0x03*Scale) /* line control register */
+#define Mcr (0x04*Scale) /* modem control register */
+#define Lsr (0x05*Scale) /* line status register */
+#define Msr (0x06*Scale) /* modem status register */
+
+/* Bit Definitions for above ports */
+#define LcrDlab 0x80 /* b7: enable baud rate divisor registers */
+#define LcrDflt 0x03 /* b6-0: no parity, 1 stop, 8 data */
+
+#define McrRts 0x02 /* b1: request to send (I am ready to xmit) */
+#define McrDtr 0x01 /* b0: data terminal ready (I am alive ready to rcv) */
+#define McrDflt (McrRts|McrDtr)
+
+#define LsrTxD 0x6000 /* b5: transmit holding register empty (i.e. xmit OK!)*/
+ /* b6: transmitter empty */
+#define LsrRxD 0x0100 /* b0: received data ready (i.e. got a byte!) */
+
+#define MsrRi 0x0040 /* b6: ring indicator (other guy is ready to rcv) */
+#define MsrDsr 0x0020 /* b5: data set ready (other guy is alive ready to rcv */
+#define MsrCts 0x0010 /* b4: clear to send (other guy is ready to rcv) */
+
+#define IerRda 0xf /* b0: Enable received data available interrupt */
+
+#endif
+
+#endif /* __SERIAL_H__ */
generated by cgit v1.1 at 2024-11-24 01:43:22 +0000