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-rw-r--r--board/esteem192e/esteem192e.c14
-rw-r--r--board/esteem192e/flash.c48
-rw-r--r--board/esteem192e/u-boot.lds3
3 files changed, 33 insertions, 32 deletions
diff --git a/board/esteem192e/esteem192e.c b/board/esteem192e/esteem192e.c
index f3c8662..b784cbb 100644
--- a/board/esteem192e/esteem192e.c
+++ b/board/esteem192e/esteem192e.c
@@ -103,7 +103,7 @@ int checkboard (void)
phys_size_t initdram (int board_type)
{
- volatile immap_t *immap = (immap_t *) CFG_IMMR;
+ volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR;
volatile memctl8xx_t *memctl = &immap->im_memctl;
long int size_b0, size_b1;
@@ -113,7 +113,7 @@ phys_size_t initdram (int board_type)
memctl->memc_mptpr = 0x0200; /* divide by 32 */
- memctl->memc_mamr = 0x18003112; /*CFG_MAMR_8COL; */ /* 0x18005112 TODO: explain here */
+ memctl->memc_mamr = 0x18003112; /*CONFIG_SYS_MAMR_8COL; */ /* 0x18005112 TODO: explain here */
upmconfig (UPMA, (uint *) sdram_table,
sizeof (sdram_table) / sizeof (uint));
@@ -124,11 +124,11 @@ phys_size_t initdram (int board_type)
* SDRAM size has been determined.
*/
- memctl->memc_or2 = CFG_OR2_PRELIM; /* not defined yet */
- memctl->memc_br2 = CFG_BR2_PRELIM;
+ memctl->memc_or2 = CONFIG_SYS_OR2_PRELIM; /* not defined yet */
+ memctl->memc_br2 = CONFIG_SYS_BR2_PRELIM;
- memctl->memc_or3 = CFG_OR3_PRELIM;
- memctl->memc_br3 = CFG_BR3_PRELIM;
+ memctl->memc_or3 = CONFIG_SYS_OR3_PRELIM;
+ memctl->memc_br3 = CONFIG_SYS_BR3_PRELIM;
/* perform SDRAM initializsation sequence */
@@ -139,7 +139,7 @@ phys_size_t initdram (int board_type)
memctl->memc_mcr = 0x80006830; /* SDRAM bank 1 execute 8 refresh */
memctl->memc_mcr = 0x80006105; /* SDRAM bank 1 */
- memctl->memc_mamr = CFG_MAMR_8COL; /* 0x18803112 start refresh timer TODO: explain here */
+ memctl->memc_mamr = CONFIG_SYS_MAMR_8COL; /* 0x18803112 start refresh timer TODO: explain here */
/* printf ("banks 0 and 1 are programed\n"); */
diff --git a/board/esteem192e/flash.c b/board/esteem192e/flash.c
index d5eb201..cce73fa 100644
--- a/board/esteem192e/flash.c
+++ b/board/esteem192e/flash.c
@@ -24,7 +24,7 @@
#include <common.h>
#include <mpc8xx.h>
-flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */
+flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS]; /* info for FLASH chips */
#ifdef CONFIG_FLASH_16BIT
#define FLASH_WORD_SIZE unsigned short
@@ -54,13 +54,13 @@ static void flash_get_offsets (ulong base, flash_info_t * info);
*/
unsigned long flash_init (void)
{
- volatile immap_t *immap = (immap_t *) CFG_IMMR;
+ volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR;
volatile memctl8xx_t *memctl = &immap->im_memctl;
unsigned long size_b0, size_b1;
int i;
/* Init: no FLASHes known */
- for (i = 0; i < CFG_MAX_FLASH_BANKS; ++i) {
+ for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; ++i) {
flash_info[i].flash_id = FLASH_UNKNOWN;
}
@@ -91,44 +91,44 @@ unsigned long flash_init (void)
}
/* Remap FLASH according to real size */
- memctl->memc_or0 = CFG_OR_TIMING_FLASH | (-size_b0 & 0xFFFF8000);
- memctl->memc_br0 = CFG_FLASH_BASE | 0x00000801; /* (CFG_FLASH_BASE & BR_BA_MSK) | BR_MS_GPCM | BR_V; */
+ memctl->memc_or0 = CONFIG_SYS_OR_TIMING_FLASH | (-size_b0 & 0xFFFF8000);
+ memctl->memc_br0 = CONFIG_SYS_FLASH_BASE | 0x00000801; /* (CONFIG_SYS_FLASH_BASE & BR_BA_MSK) | BR_MS_GPCM | BR_V; */
/* Re-do sizing to get full correct info */
- size_b0 = flash_get_size ((volatile FLASH_WORD_SIZE *) CFG_FLASH_BASE,
+ size_b0 = flash_get_size ((volatile FLASH_WORD_SIZE *) CONFIG_SYS_FLASH_BASE,
&flash_info[0]);
- flash_get_offsets (CFG_FLASH_BASE, &flash_info[0]);
+ flash_get_offsets (CONFIG_SYS_FLASH_BASE, &flash_info[0]);
-#if CFG_MONITOR_BASE >= CFG_FLASH_BASE
+#if CONFIG_SYS_MONITOR_BASE >= CONFIG_SYS_FLASH_BASE
/* monitor protection ON by default */
(void) flash_protect (FLAG_PROTECT_SET,
- CFG_MONITOR_BASE,
- CFG_MONITOR_BASE + monitor_flash_len - 1,
+ CONFIG_SYS_MONITOR_BASE,
+ CONFIG_SYS_MONITOR_BASE + monitor_flash_len - 1,
&flash_info[0]);
#endif
if (size_b1) {
memctl->memc_or1 =
- CFG_OR_TIMING_FLASH | (-size_b1 & 0xFFFF8000);
+ CONFIG_SYS_OR_TIMING_FLASH | (-size_b1 & 0xFFFF8000);
memctl->memc_br1 =
- (CFG_FLASH_BASE | 0x00000801) + (size_b0 & BR_BA_MSK);
- /*((CFG_FLASH_BASE + size_b0) & BR_BA_MSK) |
+ (CONFIG_SYS_FLASH_BASE | 0x00000801) + (size_b0 & BR_BA_MSK);
+ /*((CONFIG_SYS_FLASH_BASE + size_b0) & BR_BA_MSK) |
BR_MS_GPCM | BR_V; */
/* Re-do sizing to get full correct info */
size_b1 =
flash_get_size ((volatile FLASH_WORD_SIZE
- *) (CFG_FLASH_BASE + size_b0),
+ *) (CONFIG_SYS_FLASH_BASE + size_b0),
&flash_info[1]);
- flash_get_offsets (CFG_FLASH_BASE + size_b0, &flash_info[1]);
+ flash_get_offsets (CONFIG_SYS_FLASH_BASE + size_b0, &flash_info[1]);
-#if CFG_MONITOR_BASE >= CFG_FLASH_BASE
+#if CONFIG_SYS_MONITOR_BASE >= CONFIG_SYS_FLASH_BASE
/* monitor protection ON by default */
(void) flash_protect (FLAG_PROTECT_SET,
- CFG_MONITOR_BASE,
- CFG_MONITOR_BASE + monitor_flash_len -
+ CONFIG_SYS_MONITOR_BASE,
+ CONFIG_SYS_MONITOR_BASE + monitor_flash_len -
1, &flash_info[1]);
#endif
} else {
@@ -769,7 +769,7 @@ int flash_erase (flash_info_t * info, int s_first, int s_last)
addr = (volatile FLASH_WORD_SIZE *) (info->start[l_sect]);
while ((addr[0] & (0x00800080 & FLASH_ID_MASK)) !=
(0x00800080 & FLASH_ID_MASK)) {
- if ((now = get_timer (start)) > CFG_FLASH_ERASE_TOUT) {
+ if ((now = get_timer (start)) > CONFIG_SYS_FLASH_ERASE_TOUT) {
printf ("Timeout\n");
return 1;
}
@@ -1022,7 +1022,7 @@ static int write_word (flash_info_t * info, ulong dest, ulong data)
while ((*((vu_long *) dest) & 0x00800080) !=
(data & 0x00800080)) {
- if (get_timer (start) > CFG_FLASH_WRITE_TOUT) {
+ if (get_timer (start) > CONFIG_SYS_FLASH_WRITE_TOUT) {
return (1);
}
}
@@ -1030,7 +1030,7 @@ static int write_word (flash_info_t * info, ulong dest, ulong data)
} else {
while (!(addr[0] & 0x00800080)) { /* wait for error or finish */
- if (get_timer (start) > CFG_FLASH_WRITE_TOUT) {
+ if (get_timer (start) > CONFIG_SYS_FLASH_WRITE_TOUT) {
return (1);
}
@@ -1096,7 +1096,7 @@ static int write_short (flash_info_t * info, ulong dest, ushort data)
if (info->flash_id < FLASH_AMD_COMP) {
/* AMD stuff */
while ((*((vu_short *) dest) & 0x0080) != (data & 0x0080)) {
- if (get_timer (start) > CFG_FLASH_WRITE_TOUT) {
+ if (get_timer (start) > CONFIG_SYS_FLASH_WRITE_TOUT) {
return (1);
}
}
@@ -1104,7 +1104,7 @@ static int write_short (flash_info_t * info, ulong dest, ushort data)
} else {
/* intel stuff */
while (!(addr[0] & 0x0080)) { /* wait for error or finish */
- if (get_timer (start) > CFG_FLASH_WRITE_TOUT)
+ if (get_timer (start) > CONFIG_SYS_FLASH_WRITE_TOUT)
return (1);
}
@@ -1123,7 +1123,7 @@ static int write_short (flash_info_t * info, ulong dest, ushort data)
*addr = 0x00B0;
*addr = 0x0070;
while (!(addr[0] & 0x0080)) { /* wait for error or finish */
- if (get_timer (start) > CFG_FLASH_WRITE_TOUT)
+ if (get_timer (start) > CONFIG_SYS_FLASH_WRITE_TOUT)
return (1);
}
*addr = 0x00FF;
diff --git a/board/esteem192e/u-boot.lds b/board/esteem192e/u-boot.lds
index acaf4e3..c4e17d6 100644
--- a/board/esteem192e/u-boot.lds
+++ b/board/esteem192e/u-boot.lds
@@ -63,7 +63,7 @@ SECTIONS
lib_generic/zlib.o (.text)
. = env_offset;
- common/environment.o(.text)
+ common/env_embedded.o(.text)
*(.text)
*(.fixup)
@@ -134,6 +134,7 @@ SECTIONS
*(.dynbss)
*(.bss)
*(COMMON)
+ . = ALIGN(4);
}
_end = . ;
PROVIDE (end = .);
generated by cgit v1.1 at 2024-12-28 16:45:26 +0000