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-rw-r--r--board/ep8260/config.mk2
-rw-r--r--board/ep8260/ep8260.c60
-rw-r--r--board/ep8260/flash.c16
-rw-r--r--board/ep8260/mii_phy.c4
4 files changed, 41 insertions, 41 deletions
diff --git a/board/ep8260/config.mk b/board/ep8260/config.mk
index eaf1560..1225830 100644
--- a/board/ep8260/config.mk
+++ b/board/ep8260/config.mk
@@ -25,7 +25,7 @@
# EP8260 boards
#
-# This should be equal to the CFG_FLASH_BASE define in config_ep8260.h
+# This should be equal to the CONFIG_SYS_FLASH_BASE define in config_ep8260.h
# for the "final" configuration, with U-Boot in flash, or the address
# in RAM where U-Boot is loaded at for debugging.
#
diff --git a/board/ep8260/ep8260.c b/board/ep8260/ep8260.c
index 0e43c6d..90ab047 100644
--- a/board/ep8260/ep8260.c
+++ b/board/ep8260/ep8260.c
@@ -190,12 +190,12 @@ const iop_conf_t iop_conf_tab[4][32] = {
*/
int board_early_init_f (void)
{
- volatile t_ep_regs *regs = (t_ep_regs *) CFG_REGS_BASE;
- volatile immap_t *immap = (immap_t *) CFG_IMMR;
+ volatile t_ep_regs *regs = (t_ep_regs *) CONFIG_SYS_REGS_BASE;
+ volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR;
volatile memctl8260_t *memctl = &immap->im_memctl;
- memctl->memc_br4 = CFG_BR4_PRELIM;
- memctl->memc_or4 = CFG_OR4_PRELIM;
+ memctl->memc_br4 = CONFIG_SYS_BR4_PRELIM;
+ memctl->memc_or4 = CONFIG_SYS_OR4_PRELIM;
regs->bcsr1 = 0x62; /* to enable terminal on SMC1 */
regs->bcsr2 = 0x30; /* enable NVRAM and writing FLASH */
return 0;
@@ -203,7 +203,7 @@ int board_early_init_f (void)
void reset_phy (void)
{
- volatile t_ep_regs *regs = (t_ep_regs *) CFG_REGS_BASE;
+ volatile t_ep_regs *regs = (t_ep_regs *) CONFIG_SYS_REGS_BASE;
regs->bcsr4 = 0xC0;
}
@@ -216,7 +216,7 @@ void reset_phy (void)
int checkboard (void)
{
- volatile t_ep_regs *regs = (t_ep_regs *) CFG_REGS_BASE;
+ volatile t_ep_regs *regs = (t_ep_regs *) CONFIG_SYS_REGS_BASE;
uint major = 0, minor = 0;
switch (regs->bcsr0) {
@@ -245,18 +245,18 @@ int checkboard (void)
phys_size_t initdram (int board_type)
{
- volatile immap_t *immap = (immap_t *) CFG_IMMR;
+ volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR;
volatile memctl8260_t *memctl = &immap->im_memctl;
volatile uchar c = 0;
- volatile uchar *ramaddr = (uchar *) (CFG_SDRAM_BASE) + 0x110;
+ volatile uchar *ramaddr = (uchar *) (CONFIG_SYS_SDRAM_BASE) + 0x110;
/*
- ulong psdmr = CFG_PSDMR;
-#ifdef CFG_LSDRAM
- ulong lsdmr = CFG_LSDMR;
+ ulong psdmr = CONFIG_SYS_PSDMR;
+#ifdef CONFIG_SYS_LSDRAM
+ ulong lsdmr = CONFIG_SYS_LSDMR;
#endif
*/
- long size = CFG_SDRAM0_SIZE;
+ long size = CONFIG_SYS_SDRAM0_SIZE;
int i;
@@ -277,44 +277,44 @@ phys_size_t initdram (int board_type)
* accessing the SDRAM with a single-byte transaction."
*
* The appropriate BRx/ORx registers have already been set when we
-* get here. The SDRAM can be accessed at the address CFG_SDRAM_BASE.
+* get here. The SDRAM can be accessed at the address CONFIG_SYS_SDRAM_BASE.
*/
- memctl->memc_psrt = CFG_PSRT;
- memctl->memc_mptpr = CFG_MPTPR;
+ memctl->memc_psrt = CONFIG_SYS_PSRT;
+ memctl->memc_mptpr = CONFIG_SYS_MPTPR;
- memctl->memc_psdmr = (ulong) CFG_PSDMR | PSDMR_OP_PREA;
+ memctl->memc_psdmr = (ulong) CONFIG_SYS_PSDMR | PSDMR_OP_PREA;
*ramaddr = c;
- memctl->memc_psdmr = (ulong) CFG_PSDMR | PSDMR_OP_CBRR;
+ memctl->memc_psdmr = (ulong) CONFIG_SYS_PSDMR | PSDMR_OP_CBRR;
for (i = 0; i < 8; i++)
*ramaddr = c;
- memctl->memc_psdmr = (ulong) CFG_PSDMR | PSDMR_OP_MRW;
+ memctl->memc_psdmr = (ulong) CONFIG_SYS_PSDMR | PSDMR_OP_MRW;
*ramaddr = c;
- memctl->memc_psdmr = (ulong) CFG_PSDMR | PSDMR_OP_NORM | PSDMR_RFEN;
+ memctl->memc_psdmr = (ulong) CONFIG_SYS_PSDMR | PSDMR_OP_NORM | PSDMR_RFEN;
*ramaddr = c;
-#ifndef CFG_RAMBOOT
-#ifdef CFG_LSDRAM
- size += CFG_SDRAM1_SIZE;
- ramaddr = (uchar *) (CFG_SDRAM1_BASE) + 0x8c;
- memctl->memc_lsrt = CFG_LSRT;
+#ifndef CONFIG_SYS_RAMBOOT
+#ifdef CONFIG_SYS_LSDRAM
+ size += CONFIG_SYS_SDRAM1_SIZE;
+ ramaddr = (uchar *) (CONFIG_SYS_SDRAM1_BASE) + 0x8c;
+ memctl->memc_lsrt = CONFIG_SYS_LSRT;
- memctl->memc_lsdmr = (ulong) CFG_LSDMR | PSDMR_OP_PREA;
+ memctl->memc_lsdmr = (ulong) CONFIG_SYS_LSDMR | PSDMR_OP_PREA;
*ramaddr = c;
- memctl->memc_lsdmr = (ulong) CFG_LSDMR | PSDMR_OP_CBRR;
+ memctl->memc_lsdmr = (ulong) CONFIG_SYS_LSDMR | PSDMR_OP_CBRR;
for (i = 0; i < 8; i++)
*ramaddr = c;
- memctl->memc_lsdmr = (ulong) CFG_LSDMR | PSDMR_OP_MRW;
+ memctl->memc_lsdmr = (ulong) CONFIG_SYS_LSDMR | PSDMR_OP_MRW;
*ramaddr = c;
- memctl->memc_lsdmr = (ulong) CFG_LSDMR | PSDMR_OP_NORM | PSDMR_RFEN;
+ memctl->memc_lsdmr = (ulong) CONFIG_SYS_LSDMR | PSDMR_OP_NORM | PSDMR_RFEN;
*ramaddr = c;
-#endif /* CFG_LSDRAM */
-#endif /* CFG_RAMBOOT */
+#endif /* CONFIG_SYS_LSDRAM */
+#endif /* CONFIG_SYS_RAMBOOT */
return (size * 1024 * 1024);
}
diff --git a/board/ep8260/flash.c b/board/ep8260/flash.c
index d32486d..2a81de5 100644
--- a/board/ep8260/flash.c
+++ b/board/ep8260/flash.c
@@ -35,7 +35,7 @@
#define V_BYTE(a) (*(volatile unsigned char *)( a ))
-flash_info_t flash_info[CFG_MAX_FLASH_BANKS];
+flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS];
/*-----------------------------------------------------------------------
@@ -134,13 +134,13 @@ unsigned long flash_init (void)
int i;
/* Init: no FLASHes known */
- for (i=0; i<CFG_MAX_FLASH_BANKS; ++i) {
+ for (i=0; i<CONFIG_SYS_MAX_FLASH_BANKS; ++i) {
flash_info[i].flash_id = FLASH_UNKNOWN;
}
/* Static FLASH Bank configuration here (only one bank) */
- size_b0 = flash_get_size(CFG_FLASH0_BASE, &flash_info[0]);
+ size_b0 = flash_get_size(CONFIG_SYS_FLASH0_BASE, &flash_info[0]);
if (flash_info[0].flash_id == FLASH_UNKNOWN || size_b0 == 0) {
printf ("## Unknown FLASH on Bank 0 - Size = 0x%08lx = %ld MB\n",
size_b0, size_b0>>20);
@@ -150,10 +150,10 @@ unsigned long flash_init (void)
* protect monitor and environment sectors
*/
-#if CFG_MONITOR_BASE >= CFG_FLASH0_BASE
+#if CONFIG_SYS_MONITOR_BASE >= CONFIG_SYS_FLASH0_BASE
flash_protect(FLAG_PROTECT_SET,
- CFG_MONITOR_BASE,
- CFG_MONITOR_BASE+monitor_flash_len-1,
+ CONFIG_SYS_MONITOR_BASE,
+ CONFIG_SYS_MONITOR_BASE+monitor_flash_len-1,
&flash_info[0]);
#endif
@@ -284,7 +284,7 @@ int flash_erase (flash_info_t *info, int s_first, int s_last)
while ((V_ULONG( info->start[l_sect] ) & 0x00800080) != 0x00800080 ||
(V_ULONG( info->start[l_sect] + 4 ) & 0x00800080) != 0x00800080)
{
- if ((now = get_timer(start)) > CFG_FLASH_ERASE_TOUT) {
+ if ((now = get_timer(start)) > CONFIG_SYS_FLASH_ERASE_TOUT) {
printf ("Timeout\n");
return 1;
}
@@ -403,7 +403,7 @@ static int write_dword (flash_info_t *info, ulong dest, unsigned char * pdata)
start = get_timer (0);
while (((V_ULONG( dest ) & 0x00800080) != (ch & 0x00800080)) ||
((V_ULONG( dest + 4 ) & 0x00800080) != (cl & 0x00800080))) {
- if (get_timer(start) > CFG_FLASH_WRITE_TOUT) {
+ if (get_timer(start) > CONFIG_SYS_FLASH_WRITE_TOUT) {
return (1);
}
}
diff --git a/board/ep8260/mii_phy.c b/board/ep8260/mii_phy.c
index 813f020..c7aa275 100644
--- a/board/ep8260/mii_phy.c
+++ b/board/ep8260/mii_phy.c
@@ -54,7 +54,7 @@ mii_phy_read(unsigned short reg)
{
int i;
unsigned short tmp, val = 0, adr = 0;
- t_ep_regs *regs = (t_ep_regs*)CFG_REGS_BASE;
+ t_ep_regs *regs = (t_ep_regs*)CONFIG_SYS_REGS_BASE;
tmp = 0x6002 | (adr << 7) | (reg << 2);
regs->bcsr4 = 0xC3;
@@ -83,7 +83,7 @@ mii_phy_write(unsigned short reg, unsigned short val)
{
int i;
unsigned short tmp, adr = 0;
- t_ep_regs *regs = (t_ep_regs*)CFG_REGS_BASE;
+ t_ep_regs *regs = (t_ep_regs*)CONFIG_SYS_REGS_BASE;
tmp = 0x5002 | (adr << 7) | (reg << 2);
regs->bcsr4 = 0xC3;
generated by cgit v1.1 at 2024-11-18 16:16:04 +0000