diff options
Diffstat (limited to 'board/eltec')
| -rw-r--r-- | board/eltec/elppc/Kconfig | 12 | ||||
| -rw-r--r-- | board/eltec/elppc/MAINTAINERS | 6 | ||||
| -rw-r--r-- | board/eltec/elppc/Makefile | 9 | ||||
| -rw-r--r-- | board/eltec/elppc/asm_init.S | 862 | ||||
| -rw-r--r-- | board/eltec/elppc/eepro100_srom.c | 98 | ||||
| -rw-r--r-- | board/eltec/elppc/elppc.c | 164 | ||||
| -rw-r--r-- | board/eltec/elppc/flash.c | 496 | ||||
| -rw-r--r-- | board/eltec/elppc/misc.c | 250 | ||||
| -rw-r--r-- | board/eltec/elppc/mpc107_i2c.c | 304 | ||||
| -rw-r--r-- | board/eltec/elppc/pci.c | 81 | ||||
| -rw-r--r-- | board/eltec/elppc/srom.h | 86 |
11 files changed, 0 insertions, 2368 deletions
diff --git a/board/eltec/elppc/Kconfig b/board/eltec/elppc/Kconfig deleted file mode 100644 index d4003e5..0000000 --- a/board/eltec/elppc/Kconfig +++ /dev/null @@ -1,12 +0,0 @@ -if TARGET_ELPPC - -config SYS_BOARD - default "elppc" - -config SYS_VENDOR - default "eltec" - -config SYS_CONFIG_NAME - default "ELPPC" - -endif diff --git a/board/eltec/elppc/MAINTAINERS b/board/eltec/elppc/MAINTAINERS deleted file mode 100644 index e3b35f1..0000000 --- a/board/eltec/elppc/MAINTAINERS +++ /dev/null @@ -1,6 +0,0 @@ -ELPPC BOARD -#M: - -S: Maintained -F: board/eltec/elppc/ -F: include/configs/ELPPC.h -F: configs/ELPPC_defconfig diff --git a/board/eltec/elppc/Makefile b/board/eltec/elppc/Makefile deleted file mode 100644 index 791f2fb..0000000 --- a/board/eltec/elppc/Makefile +++ /dev/null @@ -1,9 +0,0 @@ -# -# (C) Copyright 2000-2006 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# SPDX-License-Identifier: GPL-2.0+ -# - -obj-y = elppc.o flash.o pci.o misc.o mpc107_i2c.o eepro100_srom.o -obj-y += asm_init.o diff --git a/board/eltec/elppc/asm_init.S b/board/eltec/elppc/asm_init.S deleted file mode 100644 index 10fdfa2..0000000 --- a/board/eltec/elppc/asm_init.S +++ /dev/null @@ -1,862 +0,0 @@ -/* - * (C) Copyright 2001 ELTEC Elektronik AG - * Frank Gottschling <fgottschling@eltec.de> - * - * ELTEC ELPPC RAM initialization - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#include <config.h> -#include <asm/processor.h> -#include <version.h> -#include <mpc106.h> - -#include <ppc_asm.tmpl> -#include <ppc_defs.h> - -.globl board_asm_init -board_asm_init: - -/* - * setup pointer to message block - */ - mflr r13 /* save away link register */ - bl get_lnk_reg /* r3=addr of next instruction */ - subi r4, r3, 8 /* r4=board_asm_init addr */ - addi r29, r4, (MessageBlock-board_asm_init) - -/* - * dcache_disable - */ - mfspr r3, HID0 - li r4, HID0_DCE - andc r3, r3, r4 - mr r2, r3 - ori r3, r3, HID0_DCI - sync - mtspr HID0, r3 - mtspr HID0, r2 - isync - sync -/* - * icache_disable - */ - mfspr r3, HID0 - li r4, 0 - ori r4, r4, HID0_ICE - andc r3, r3, r4 - sync - mtspr HID0, r3 -/* - * invalidate caches - */ - ori r3, r3, (HID0_ICE | HID0_ICFI | HID0_DCI | HID0_DCE) - or r4, r4, r3 - isync - mtspr HID0, r4 - andc r4, r4, r3 - isync - mtspr HID0, r4 - isync -/* - * icache_enable - */ - mfspr r3, HID0 - ori r3, r3, (HID0_ICE | HID0_ICFI) - sync - mtspr HID0, r3 - - -/* - * setup memory controller - */ - lis r1, MPC106_REG_ADDR@h - ori r1, r1, MPC106_REG_ADDR@l - lis r2, MPC106_REG_DATA@h - ori r2, r2, MPC106_REG_DATA@l - - /* Configure PICR1 */ - lis r3, MPC106_REG@h - ori r3, r3, PCI_PICR1 - stwbrx r3, 0, r1 - addis r3, r0, 0xFF14 - ori r3, r3, 0x1CC8 - eieio - stwbrx r3, 0, r2 - - /* Configure PICR2 */ - lis r3, MPC106_REG@h - ori r3, r3, PCI_PICR2 - stwbrx r3, 0, r1 - addis r3, r0, 0x0000 - ori r3, r3, 0x0000 - eieio - stwbrx r3, 0, r2 - - /* Configure EUMBAR */ - lis r3, MPC106_REG@h - ori r3, r3, 0x0078 /* offest of EUMBAR in PCI config space */ - stwbrx r3, 0, r1 - lis r3, MPC107_EUMB_ADDR@h - eieio - stwbrx r3, 0, r2 - - /* Configure Address Map B Option Reg */ - lis r3, MPC106_REG@h - ori r3, r3, 0x00e0 /* offest of AMBOR in PCI config space */ - stwbrx r3, 0, r1 - lis r3, 0 - eieio - stwbrx r3, 0, r2 - - /* Configure I2C Controller */ - lis r14, MPC107_I2C_ADDR@h /* base of I2C controller */ - ori r14, r14, MPC107_I2C_ADDR@l - lis r3, 0x2b10 /* I2C clock = 100MHz/1024 */ - stw r3, 4(r14) - li r3, 0 /* clear arbitration */ - eieio - stw r3, 12(r14) - - /* Configure MCCR1 */ - lis r3, MPC106_REG@h - ori r3, r3, MPC106_MCCR1 - stwbrx r3, 0, r1 - addis r3, r0, 0x0660 /* don't set MEMGO now ! */ - ori r3, r3, 0x0000 - eieio - stwbrx r3, 0, r2 - - /* Configure MCCR2 */ - lis r3, MPC106_REG@h - ori r3, r3, MPC106_MCCR2 - stwbrx r3, 0, r1 - addis r3, r0, 0x0400 - ori r3, r3, 0x1800 - eieio - stwbrx r3, 0, r2 - - - /* Configure MCCR3 */ - lis r3, MPC106_REG@h - ori r3, r3, MPC106_MCCR3 - stwbrx r3, 0, r1 - addis r3, r0, 0x0230 - ori r3, r3, 0x0000 - eieio - stwbrx r3, 0, r2 - - /* Configure MCCR4 */ - lis r3, MPC106_REG@h - ori r3, r3, MPC106_MCCR4 - stwbrx r3, 0, r1 - addis r3, r0, 0x2532 - ori r3, r3, 0x2220 - eieio - stwbrx r3, 0, r2 - -/* - * configure memory interface (MICRs) - */ - addis r3, r0, 0x8000 /* ADDR_80 */ - ori r3, r3, 0x0080 /* SMEMADD1 */ - stwbrx r3, 0, r1 - addis r3, r0, 0xFFFF - ori r3, r3, 0x4000 - eieio - stwbrx r3, 0, r2 - - addis r3, r0, 0x8000 /* ADDR_84 */ - ori r3, r3, 0x0084 /* SMEMADD2 */ - stwbrx r3, 0, r1 - addis r3, r0, 0xFFFF - ori r3, r3, 0xFFFF - eieio - stwbrx r3, 0, r2 - - addis r3, r0, 0x8000 /* ADDR_88 */ - ori r3, r3, 0x0088 /* EXTSMEM1 */ - stwbrx r3, 0, r1 - addis r3, r0, 0x0303 - ori r3, r3, 0x0000 - eieio - stwbrx r3, 0, r2 - - addis r3, r0, 0x8000 /* ADDR_8C */ - ori r3, r3, 0x008c /* EXTSMEM2 */ - stwbrx r3, 0, r1 - addis r3, r0, 0x0303 - ori r3, r3, 0x0303 - eieio - stwbrx r3, 0, r2 - - addis r3, r0, 0x8000 /* ADDR_90 */ - ori r3, r3, 0x0090 /* EMEMADD1 */ - stwbrx r3, 0, r1 - addis r3, r0, 0xFFFF - ori r3, r3, 0x7F3F - eieio - stwbrx r3, 0, r2 - - addis r3, r0, 0x8000 /* ADDR_94 */ - ori r3, r3, 0x0094 /* EMEMADD2 */ - stwbrx r3, 0, r1 - addis r3, r0, 0xFFFF - ori r3, r3, 0xFFFF - eieio - stwbrx r3, 0, r2 - - addis r3, r0, 0x8000 /* ADDR_98 */ - ori r3, r3, 0x0098 /* EXTEMEM1 */ - stwbrx r3, 0, r1 - addis r3, r0, 0x0303 - ori r3, r3, 0x0000 - eieio - stwbrx r3, 0, r2 - - addis r3, r0, 0x8000 /* ADDR_9C */ - ori r3, r3, 0x009c /* EXTEMEM2 */ - stwbrx r3, 0, r1 - addis r3, r0, 0x0303 - ori r3, r3, 0x0303 - eieio - stwbrx r3, 0, r2 - - addis r3, r0, 0x8000 /* ADDR_A0 */ - ori r3, r3, 0x00a0 /* MEMBNKEN */ - stwbrx r3, 0, r1 - addis r3, r0, 0x0000 - ori r3, r3, 0x0003 - eieio - stwbrx r3, 0, r2 - -/* - * must wait at least 100us after HRESET to issue a MEMGO - */ - lis r0, 1 - mtctr r0 -memStartWait: - bdnz memStartWait - -/* - * enable RAM Operations through MCCR1 (MEMGO) - */ - lis r3, 0x8000 - ori r3, r3, 0x00f0 - stwbrx r3, r0, r1 - sync - lwbrx r3, 0, r2 - lis r0, 0x0008 - or r3, r0, r3 - stwbrx r3, 0, r2 - sync - -/* - * set LEDs first time - */ - li r3, 0x1 - lis r30, CONFIG_SYS_USR_LED_BASE@h - stb r3, 2(r30) - sync - -/* - * init COM1 for polled output - */ - lis r8, CONFIG_SYS_NS16550_COM1@h /* COM1 base address*/ - ori r8, r8, CONFIG_SYS_NS16550_COM1@l - li r9, 0x00 - stb r9, 1(r8) /* int disabled */ - eieio - li r9, 0x00 - stb r9, 4(r8) /* modem ctrl */ - eieio - li r9, 0x80 - stb r9, 3(r8) /* link ctrl */ - eieio - li r9, (CONFIG_SYS_NS16550_CLK / 16 / CONFIG_BAUDRATE) - stb r9, 0(r8) /* baud rate (LSB)*/ - eieio - li r9, ((CONFIG_SYS_NS16550_CLK / 16 / CONFIG_BAUDRATE) >> 8) - stb r9, 1(r8) /* baud rate (MSB) */ - eieio - li r9, 0x07 - stb r9, 3(r8) /* 8 data bits, 2 stop bit, no parity */ - eieio - li r9, 0x0b - stb r9, 4(r8) /* enable the receiver and transmitter (modem ctrl) */ - eieio -waitEmpty: - lbz r9, 5(r8) /* transmit empty */ - andi. r9, r9, 0x40 - beq waitEmpty - li r9, 0x47 - stb r9, 3(r8) /* send break, 8 data bits, 2 stop bit, no parity */ - eieio - - lis r0, 0x0001 - mtctr r0 -waitCOM1: - lwz r0, 5(r8) /* load from port for delay */ - bdnz waitCOM1 - -waitEmpty1: - lbz r9, 5(r8) /* transmit empty */ - andi. r9, r9, 0x40 - beq waitEmpty1 - li r9, 0x07 - stb r9, 3(r8) /* 8 data bits, 2 stop bit, no parity */ - eieio - -/* - * intro message from message block - */ - addi r3, r29, (MnewLine-MessageBlock) - bl Printf - addi r3, r29, (MinitLogo-MessageBlock) - bl Printf - -/* - * memory cofiguration using SPD information stored on the SODIMMs - */ - addi r3, r29, (Mspd01-MessageBlock) - bl Printf - - li r17, 0 - - li r3, 0x0002 /* get RAM type from spd for bank0/1 */ - bl spdRead - - cmpi 0, 0, r3, -1 /* error ? */ - bne noSpdError - - addi r3, r29, (Mfail-MessageBlock) - bl Printf - - li r6, 0xe /* error codes in r6 and r7 */ - li r7, 0x0 - b toggleError /* fail - loop forever */ - -noSpdError: - mr r15, r3 /* save r3 */ - - addi r3, r29, (Mok-MessageBlock) - bl Printf - - cmpli 0, 0, r15, 0x0004 /* SDRAM ? */ - beq isSDRAM - - addi r3, r29, (MramTyp-MessageBlock) - bl Printf - - li r6, 0xd /* error codes in r6 and r7 */ - li r7, 0x0 - b toggleError /* fail - loop forever */ - -isSDRAM: - li r3, 0x0012 /* get supported CAS latencies from byte 18 */ - bl spdRead - mr r15, r3 - li r3, 0x09 - andi. r0, r15, 0x04 - bne maxCLis3 - li r3, 0x17 -maxCLis3: - andi. r0, r15, 0x02 - bne CL2 - - addi r3, r29, (MramTyp-MessageBlock) - bl Printf - - li r6, 0xc /* error codes in r6 and r7 */ - li r7, 0x0 - b toggleError /* fail - loop forever */ -CL2: - bl spdRead - cmpli 0, 0, r3, 0xa1 /* cycle time must be 10ns max. */ - blt speedOk - - addi r3, r29, (MramTyp-MessageBlock) - bl Printf - - li r6, 0xb /* error codes in r6 and r7 */ - li r7, 0x0 - b toggleError /* fail - loop forever */ -speedOk: - lis r20, 0x06e8 /* preset MCR1 value */ - - li r3, 0x0011 /* get number of internal banks from spd for bank0/1 */ - bl spdRead - - cmpli 0, 0, r3, 0x02 - beq SD_2B - cmpli 0, 0, r3, 0x04 - beq SD_4B -memConfErr: - addi r3, r29, (MramConfErr-MessageBlock) - bl Printf - - li r6, 0xa /* error codes in r6 and r7 */ - li r7, 0x0 - b toggleError /* fail - loop forever */ - -SD_2B: - li r3, 0x0003 /* get number of row bits from spd for bank0/1 */ - bl spdRead - cmpli 0, 0, r3, 0x0b - beq row11x2 - cmpli 0, 0, r3, 0x0c - beq row12x2or13x2 - cmpli 0, 0, r3, 0x0d - beq row12x2or13x2 - b memConfErr -SD_4B: - li r3, 0x0003 /* get number of row bits from spd for bank0/1 */ - bl spdRead - cmpli 0, 0, r3, 0x0b - beq row11x4or12x4 - cmpli 0, 0, r3, 0x0c - beq row11x4or12x4 - cmpli 0, 0, r3, 0x0d - beq row13x4 - b memConfErr -row12x2or13x2: - ori r20, r20, 0x05 - b row11x4or12x4 -row13x4: - ori r20, r20, 0x0a - b row11x4or12x4 -row11x2: - ori r20, r20, 0x0f -row11x4or12x4: - /* get the size of bank 0-1 */ - - li r3, 0x001f /* get bank size from spd for bank0/1 */ - bl spdRead - - rlwinm r16, r3, 2, 24, 29 /* calculate size in MByte (128 MB max.) */ - - li r3, 0x0005 /* get number of banks from spd for bank0/1 */ - bl spdRead - - cmpi 0, 0, r3, 2 /* 2 banks ? */ - bne SDRAMnobank1 - - mr r17, r16 - -SDRAMnobank1: - li r3, 0x000c /* get refresh from spd for bank0/1 */ - bl spdRead - andi. r3, r3, 0x007f /* mask selfrefresh bit */ - li r4, 0x1800 /* refesh cycle 1536 clocks left shifted 2 */ - cmpli 0, 0, r3, 0x0000 /* 15.6 us ? */ - beq writeRefresh - - li r4, 0x0c00 /* refesh cycle 768 clocks left shifted 2 */ - cmpli 0, 0, r3, 0x0002 /* 7.8 us ? */ - beq writeRefresh - - li r4, 0x3000 /* refesh cycle 3072 clocks left shifted 2 */ - cmpli 0, 0, r3, 0x0003 /* 31.3 us ? */ - beq writeRefresh - - li r4, 0x6000 /* refesh cycle 6144 clocks left shifted 2 */ - cmpli 0, 0, r3, 0x0004 /* 62.5 us ? */ - beq writeRefresh - - li r4, 0 - ori r4, r4, 0xc000 /* refesh cycle 8224 clocks left shifted 2 */ - cmpli 0, 0, r3, 0x0005 /* 125 us ? */ - beq writeRefresh - - b memConfErr - -writeRefresh: - lis r21, 0x0400 /* preset MCCR2 value */ - or r21, r21, r4 - - /* Overwrite MCCR1 */ - lis r3, MPC106_REG@h - ori r3, r3, MPC106_MCCR1 - stwbrx r3, 0, r1 - eieio - stwbrx r20, 0, r2 - - /* Overwrite MCCR2 */ - lis r3, MPC106_REG@h - ori r3, r3, MPC106_MCCR2 - stwbrx r3, 0, r1 - eieio - stwbrx r21, 0, r2 - - /* set the memory boundary registers for bank 0-3 */ - li r20, 0 - lis r23, 0x0303 - lis r24, 0x0303 - subi r21, r16, 1 /* calculate end address bank0 */ - li r22, 1 - - cmpi 0, 0, r17, 0 /* bank1 present ? */ - beq nobank1 - - andi. r3, r16, 0x00ff /* calculate start address of bank1 */ - andi. r4, r16, 0x0300 - rlwinm r3, r3, 8, 16, 23 - or r20, r20, r3 - or r23, r23, r4 - - add r16, r16, r17 /* add to total memory size */ - - subi r3, r16, 1 /* calculate end address of bank1 */ - andi. r4, r3, 0x0300 - andi. r3, r3, 0x00ff - rlwinm r3, r3, 8, 16, 23 - or r21, r21, r3 - or r24, r24, r4 - - ori r22, r22, 2 /* enable bank1 */ - b bankOk -nobank1: - ori r23, r23, 0x0300 /* set bank1 start to unused area */ - ori r24, r24, 0x0300 /* set bank1 end to unused area */ -bankOk: - addi r3, r29, (Mactivate-MessageBlock) - bl Printf - mr r3, r16 - bl OutDec - addi r3, r29, (Mact0123e-MessageBlock) - bl Printf - -/* - * overwrite MSAR1, MEAR1, EMSAR1, and EMEAR1 - */ - addis r3, r0, 0x8000 /* ADDR_80 */ - ori r3, r3, 0x0080 /* MSAR1 */ - stwbrx r3, 0, r1 - eieio - stwbrx r20, 0, r2 - - addis r3, r0, 0x8000 /* ADDR_88 */ - ori r3, r3, 0x0088 /* EMSAR1 */ - stwbrx r3, 0, r1 - eieio - stwbrx r23, 0, r2 - - addis r3, r0, 0x8000 /* ADDR_90 */ - ori r3, r3, 0x0090 /* MEAR1 */ - stwbrx r3, 0, r1 - eieio - stwbrx r21, 0, r2 - - addis r3, r0, 0x8000 /* ADDR_98 */ - ori r3, r3, 0x0098 /* EMEAR1 */ - stwbrx r3, 0, r1 - eieio - stwbrx r24, 0, r2 - - addis r3, r0, 0x8000 /* ADDR_A0 */ - ori r3, r3, 0x00a0 /* MBER */ - stwbrx r3, 0, r1 - eieio - stwbrx r22, 0, r2 - -/* - * delay to let SDRAM go through several initialization/refresh cycles - */ - lis r3, 3 - mtctr r3 -memStartWait_1: - bdnz memStartWait_1 - eieio - -/* - * set LEDs end - */ - li r3, 0xf - lis r30, CONFIG_SYS_USR_LED_BASE@h - stb r3, 2(r30) - sync - - mtlr r13 - blr /* EXIT board_asm_init ... */ - -/*----------------------------------------------------------------------------*/ -/* - * print a message to COM1 in polling mode (r10=COM1 port, r3=(char*)string) - */ - -Printf: - lis r10, CONFIG_SYS_NS16550_COM1@h /* COM1 base address*/ - ori r10, r10, CONFIG_SYS_NS16550_COM1@l -WaitChr: - lbz r0, 5(r10) /* read link status */ - eieio - andi. r0, r0, 0x40 /* mask transmitter empty bit */ - beq cr0, WaitChr /* wait till empty */ - lbzx r0, r0, r3 /* get char */ - stb r0, 0(r10) /* write to transmit reg */ - eieio - addi r3, r3, 1 /* next char */ - lbzx r0, r0, r3 /* get char */ - cmpwi cr1, r0, 0 /* end of string ? */ - bne cr1, WaitChr - blr - -/* - * print a char to COM1 in polling mode (r10=COM1 port, r3=char) - */ -OutChr: - lis r10, CONFIG_SYS_NS16550_COM1@h /* COM1 base address*/ - ori r10, r10, CONFIG_SYS_NS16550_COM1@l -OutChr1: - lbz r0, 5(r10) /* read link status */ - eieio - andi. r0, r0, 0x40 /* mask transmitter empty bit */ - beq cr0, OutChr1 /* wait till empty */ - stb r3, 0(r10) /* write to transmit reg */ - eieio - blr - -/* - * print 8/4/2 digits hex value to COM1 in polling mode (r10=COM1 port, r3=val) - */ -OutHex2: - li r9, 4 /* shift reg for 2 digits */ - b OHstart -OutHex4: - li r9, 12 /* shift reg for 4 digits */ - b OHstart -OutHex: - li r9, 28 /* shift reg for 8 digits */ -OHstart: - lis r10, CONFIG_SYS_NS16550_COM1@h /* COM1 base address*/ - ori r10, r10, CONFIG_SYS_NS16550_COM1@l -OutDig: - lbz r0, 0(r29) /* slow down dummy read */ - lbz r0, 5(r10) /* read link status */ - eieio - andi. r0, r0, 0x40 /* mask transmitter empty bit */ - beq cr0, OutDig - sraw r0, r3, r9 - clrlwi r0, r0, 28 - cmpwi cr1, r0, 9 - ble cr1, digIsNum - addic r0, r0, 55 - b nextDig -digIsNum: - addic r0, r0, 48 -nextDig: - stb r0, 0(r10) /* write to transmit reg */ - eieio - addic. r9, r9, -4 - bge OutDig - blr - -/* - * print 3 digits hdec value to COM1 in polling mode - * (r10=COM1 port, r3=val, r7=x00, r8=x0, r9=x, r0, r6=scratch) - */ -OutDec: - li r6, 10 - divwu r0, r3, r6 /* r0 = r3 / 10, r9 = r3 mod 10 */ - mullw r10, r0, r6 - subf r9, r10, r3 - mr r3, r0 - divwu r0, r3, r6 /* r0 = r3 / 10, r8 = r3 mod 10 */ - mullw r10, r0, r6 - subf r8, r10, r3 - mr r3, r0 - divwu r0, r3, r6 /* r0 = r3 / 10, r7 = r3 mod 10 */ - mullw r10, r0, r6 - subf r7, r10, r3 - lis r10, CONFIG_SYS_NS16550_COM1@h /* COM1 base address*/ - ori r10, r10, CONFIG_SYS_NS16550_COM1@l - or. r7, r7, r7 - bne noblank1 - li r3, 0x20 - b OutDec4 -noblank1: - addi r3, r7, 48 /* convert to ASCII */ -OutDec4: - lbz r0, 0(r29) /* slow down dummy read */ - lbz r0, 5(r10) /* read link status */ - eieio - andi. r0, r0, 0x40 /* mask transmitter empty bit */ - beq cr0, OutDec4 - stb r3, 0(r10) /* x00 to transmit */ - eieio - or. r7, r7, r8 - beq OutDec5 - addi r3, r8, 48 /* convert to ASCII */ -OutDec5: - lbz r0, 0(r29) /* slow down dummy read */ - lbz r0, 5(r10) /* read link status */ - eieio - andi. r0, r0, 0x40 /* mask transmitter empty bit */ - beq cr0, OutDec5 - stb r3, 0(r10) /* x0 to transmit */ - eieio - addi r3, r9, 48 /* convert to ASCII */ -OutDec6: - lbz r0, 0(r29) /* slow down dummy read */ - lbz r0, 5(r10) /* read link status */ - eieio - andi. r0, r0, 0x40 /* mask transmitter empty bit */ - beq cr0, OutDec6 - stb r3, 0(r10) /* x to transmit */ - eieio - blr - -/* - * hang endless loop - */ -toggleError: /* fail type in r6, r7=0xff, toggle LEDs */ - stb r7, 2(r30) /* r7 to LED */ - li r0, 0 - lis r9, 127 - ori r9, r9, 65535 -toggleError1: - addic r0, r0, 1 - cmpw cr1, r0, r9 - ble cr1, toggleError1 - stb r6, 2(r30) /* r6 to LED */ - li r0, 0 - lis r9, 127 - ori r9, r9, 65535 -toggleError2: - addic r0, r0, 1 - cmpw cr1, r0, r9 - ble cr1, toggleError2 - b toggleError - -/* - * routines to read from ram spd - */ -spdWaitIdle: - lis r0, 0x1 /* timeout for about 100us */ - mtctr r0 -iSpd: - lbz r10, 12(r14) - andi. r10, r10, 0x20 /* mask and test MBB */ - beq idle - bdnz iSpd - orc. r10, r0, r0 /* return -1 to caller */ -idle: - bclr 20, 0 /* return to caller */ - -waitSpd: - lis r0, 0x10 /* timeout for about 1.5ms */ - mtctr r0 -wSpd: - lbz r10, 12(r14) - andi. r10, r10, 0x82 - cmpli 0, 0, r10, 0x82 /* test MCF and MIF set */ - beq wend - bdnz wSpd - orc. r10, r0, r0 /* return -1 to caller */ - bclr 20, 0 /* return to caller */ - -wend: - li r10, 0 - stb r10, 12(r14) /* clear status */ - bclr 20, 0 /* return to caller */ - -/* - * spdread - * in: r3 adr to read - * out: r3 val or -1 for error - * uses r10, assumes that r14 points to I2C controller - */ -spdRead: - mfspr r25, 8 /* save link register */ - - bl spdWaitIdle - bne spdErr - - li r10, 0x80 /* start with MEN */ - stb r10, 8(r14) - eieio - - li r10, 0xb0 /* start as master */ - stb r10, 8(r14) - eieio - - li r10, 0xa0 /* write device 0xA0 */ - stb r10, 16(r14) - eieio - bl waitSpd - bne spdErr - - lbz r10, 12(r14) /* test ACK */ - andi. r10, r10, 0x01 - bne gotNoAck - - stb r3, 16(r14) /* data address */ - eieio - bl waitSpd - bne spdErr - - - li r10, 0xb4 /* switch to read - restart */ - stb r10, 8(r14) - eieio - - li r10, 0xa1 /* read device 0xA0 */ - stb r10, 16(r14) - eieio - bl waitSpd - bne spdErr - - li r10, 0xa8 /* no ACK */ - stb r10, 8(r14) - eieio - - lbz r10, 16(r14) /* trigger read next byte */ - eieio - bl waitSpd - bne spdErr - - li r10, 0x88 /* generate STOP condition */ - stb r10, 8(r14) - eieio - - lbz r3, 16(r14) /* return read byte */ - - mtspr 8, r25 /* restore link register */ - blr - -gotNoAck: - li r10, 0x80 /* generate STOP condition */ - stb r10, 8(r14) - eieio -spdErr: - orc r3, r0, r0 /* return -1 */ - mtspr 8, r25 /* restore link register */ - blr - -get_lnk_reg: - mflr r3 /* return link reg */ - blr - -MessageBlock: - -MinitLogo: - .ascii "\015\012*** ELTEC Elektronik, Mainz ***\015\012" - .ascii "\015\012Initialising RAM\015\012\000" -Mspd01: - .ascii " Reading SPD of SODIMM ...... \000" -MramTyp: - .ascii "\015\012\SDRAM with CL=2 at 100 MHz required!\015\012\000" -MramConfErr: - .ascii "\015\012\Unsupported SODIMM Configuration!\015\012\000" -Mactivate: - .ascii " Activating \000" -Mact0123e: - .ascii " MByte.\015\012\000" -Mok: - .ascii "OK \015\012\000" -Mfail: - .ascii "FAILED \015\012\000" -MnewLine: - .ascii "\015\012\000" - .align 4 diff --git a/board/eltec/elppc/eepro100_srom.c b/board/eltec/elppc/eepro100_srom.c deleted file mode 100644 index 05ba9c4..0000000 --- a/board/eltec/elppc/eepro100_srom.c +++ /dev/null @@ -1,98 +0,0 @@ -/* - * (C) Copyright 2002 ELTEC Elektronik AG - * Frank Gottschling <fgottschling@eltec.de> - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -/* - * Local network srom writing for first time run - */ - -/* includes */ -#include <common.h> -#include <pci.h> -#include <net.h> -#include "srom.h" - -extern int eepro100_write_eeprom (struct eth_device *dev, - int location, int addr_len, - unsigned short data); - -/*----------------------------------------------------------------------------*/ - -unsigned short eepro100_srom_checksum (unsigned short *sromdata) -{ - unsigned short sum = 0; - unsigned int i; - - for (i = 0; i < (EE_SIZE - 1); i++) { - sum += sromdata[i]; - } - return (EE_CHECKSUM - sum); -} - -/*----------------------------------------------------------------------------*/ - -int eepro100_srom_store (unsigned short *source) -{ - int count; - struct eth_device onboard_dev; - - /* get onboard network iobase */ - pci_read_config_dword (PCI_BDF (0, 0x10, 0), PCI_BASE_ADDRESS_0, - (unsigned int *) &onboard_dev.iobase); - onboard_dev.iobase &= ~0xf; - - source[63] = eepro100_srom_checksum (source); - - for (count = 0; count < EE_SIZE; count++) { - if (eepro100_write_eeprom ((struct eth_device *) &onboard_dev, - count, EE_ADDR_BITS, - SROM_SHORT (source)) == -1) { - return -1; - } - source++; - } - return 0; -} - -/*----------------------------------------------------------------------------*/ - -#ifdef EEPRO100_SROM_CHECK - -extern int read_eeprom (struct eth_device *dev, int location, int addr_len); - -void eepro100_srom_load (unsigned short *destination) -{ - int count; - struct eth_device onboard_dev; - -#ifdef DEBUG - int lr = 0; - - printf ("eepro100_srom_download:\n"); -#endif - - /* get onboard network iobase */ - pci_read_config_dword (PCI_BDF (0, 0x10, 0), PCI_BASE_ADDRESS_0, - &onboard_dev.iobase); - onboard_dev.iobase &= ~0xf; - - memset (destination, 0x65, 128); - - for (count = 0; count < 0x40; count++) { - *destination++ = read_eeprom ((struct eth_device *) &onboard_dev, - count, EE_ADDR_BITS); -#ifdef DEBUG - printf ("%04x ", *(destination - 1)); - if (lr++ == 7) { - printf ("\n"); - lr = 0; - } -#endif - } -} -#endif /* EEPRO100_SROM_CHECK */ - -/*----------------------------------------------------------------------------*/ diff --git a/board/eltec/elppc/elppc.c b/board/eltec/elppc/elppc.c deleted file mode 100644 index ac814b8..0000000 --- a/board/eltec/elppc/elppc.c +++ /dev/null @@ -1,164 +0,0 @@ -/* - * (C) Copyright 2002 ELTEC Elektronik AG - * Frank Gottschling <fgottschling@eltec.de> - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#include <common.h> -#include <command.h> -#include <mpc106.h> -#include <video_fb.h> -#include <netdev.h> - -DECLARE_GLOBAL_DATA_PTR; - -/* ------------------------------------------------------------------------- */ - -int checkboard (void) -{ - puts ("Board: ELTEC PowerPC\n"); - return (0); -} - -/* ------------------------------------------------------------------------- */ - -int checkflash (void) -{ - /* TODO */ - printf ("Test not implemented !\n"); - return (0); -} - -/* ------------------------------------------------------------------------- */ - -static unsigned int mpc106_read_cfg_dword (unsigned int reg) -{ - unsigned int reg_addr = MPC106_REG | (reg & 0xFFFFFFFC); - - out32r (MPC106_REG_ADDR, reg_addr); - - return (in32r (MPC106_REG_DATA | (reg & 0x3))); -} - -/* ------------------------------------------------------------------------- */ - -long int dram_size (int board_type) -{ - /* - * No actual initialisation to do - done when setting up - * PICRs MCCRs ME/SARs etc in asm_init.S. - */ - - register unsigned long i, msar1, mear1, memSize; - -#if defined(CONFIG_SYS_MEMTEST) - register unsigned long reg; - - printf ("Testing DRAM\n"); - - /* write each mem addr with it's address */ - for (reg = CONFIG_SYS_MEMTEST_START; reg < CONFIG_SYS_MEMTEST_END; reg += 4) - *reg = reg; - - for (reg = CONFIG_SYS_MEMTEST_START; reg < CONFIG_SYS_MEMTEST_END; reg += 4) { - if (*reg != reg) - return -1; - } -#endif - - /* - * Since MPC107 memory controller chip has already been set to - * control all memory, just read and interpret its memory boundery register. - */ - memSize = 0; - msar1 = mpc106_read_cfg_dword (MPC106_MSAR1); - mear1 = mpc106_read_cfg_dword (MPC106_MEAR1); - i = mpc106_read_cfg_dword (MPC106_MBER) & 0xf; - - do { - if (i & 0x01) /* is bank enabled ? */ - memSize += (mear1 & 0xff) - (msar1 & 0xff) + 1; - msar1 >>= 8; - mear1 >>= 8; - i >>= 1; - } while (i); - - return (memSize * 0x100000); -} - -/* ------------------------------------------------------------------------- */ - -phys_size_t initdram (int board_type) -{ - return dram_size (board_type); -} - -/* ------------------------------------------------------------------------- */ - -/* - * The BAB 911 can be reset by writing bit 0 of the Processor Initialization - * Register PI in the MPC 107 (at offset 0x41090 of the Embedded Utilities - * Memory Block). - */ -int do_reset (cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[]) -{ - out8 (MPC107_EUMB_PI, 1); - return (0); -} - -/* ------------------------------------------------------------------------- */ - -#if defined(CONFIG_WATCHDOG) - -/* - * Since the 7xx CPUs don't have an internal watchdog, this function is - * board specific. - */ -void watchdog_reset (void) -{ -} -#endif /* CONFIG_WATCHDOG */ - -/* ------------------------------------------------------------------------- */ - -void after_reloc (ulong dest_addr) -{ - /* - * Jump to the main U-Boot board init code - */ - board_init_r ((gd_t *)gd, dest_addr); -} - -/* ------------------------------------------------------------------------- */ - -#ifdef CONFIG_CONSOLE_EXTRA_INFO -extern GraphicDevice smi; - -void video_get_info_str (int line_number, char *info) -{ - /* init video info strings for graphic console */ - switch (line_number) { - case 1: - sprintf (info, " MPC7xx V%d.%d at %d / %d MHz", - (get_pvr () >> 8) & 0xFF, get_pvr () & 0xFF, 400, 100); - return; - case 2: - sprintf (info, " ELTEC ELPPC with %ld MB DRAM and %ld MB FLASH", - dram_size (0) / 0x100000, flash_init () / 0x100000); - return; - case 3: - sprintf (info, " %s", smi.modeIdent); - return; - } - - /* no more info lines */ - *info = 0; - return; -} -#endif - -int board_eth_init(bd_t *bis) -{ - return pci_eth_init(bis); -} diff --git a/board/eltec/elppc/flash.c b/board/eltec/elppc/flash.c deleted file mode 100644 index 2b41685..0000000 --- a/board/eltec/elppc/flash.c +++ /dev/null @@ -1,496 +0,0 @@ -/* - * (C) Copyright 2000 - * Wolfgang Denk, DENX Software Engineering, wd@denx.de. - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -/* - * 07-10-2002 Frank Gottschling: added 29F032 flash (ELPPC). - * fixed monitor protection part - * - * 09-18-2001 Andreas Heppel: Reduced the code in here to the usage - * of AMD's 29F040 and 29F016 flashes, since the BAB7xx does use - * any other. - */ - -#include <common.h> -#include <asm/processor.h> -#include <asm/pci_io.h> - -flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS]; /* info for FLASH chips */ - -ulong flash_get_size (vu_long *addr, flash_info_t *info); -static int write_word (flash_info_t *info, ulong dest, ulong data); - -/*flash command address offsets*/ - -#define ADDR0 (0x555) -#define ADDR1 (0x2AA) -#define ADDR3 (0x001) - -#define FLASH_WORD_SIZE unsigned char - -/*----------------------------------------------------------------------------*/ - -unsigned long flash_init (void) -{ - unsigned long size1, size2; - int i; - - /* Init: no FLASHes known */ - for (i=0; i<CONFIG_SYS_MAX_FLASH_BANKS; ++i) - { - flash_info[i].flash_id = FLASH_UNKNOWN; - } - - /* initialise 1st flash */ - size1 = flash_get_size((vu_long *)FLASH_BASE0_PRELIM, &flash_info[0]); - - if (flash_info[0].flash_id == FLASH_UNKNOWN) - { - printf ("## Unknown FLASH on Bank 0 - Size = 0x%08lx = %ld MB\n", - size1, size1<<20); - } - - /* initialise 2nd flash */ - size2 = flash_get_size((vu_long *)FLASH_BASE1_PRELIM, &flash_info[1]); - - if (flash_info[1].flash_id == FLASH_UNKNOWN) - { - printf ("## Unknown FLASH on Bank 1 - Size = 0x%08lx = %ld MB\n", - size2, size2<<20); - } - - /* monitor protection ON by default */ - if (size1 == 512*1024) - { - (void)flash_protect(FLAG_PROTECT_SET, - FLASH_BASE0_PRELIM, - FLASH_BASE0_PRELIM+monitor_flash_len-1, - &flash_info[0]); - } - if (size2 == 512*1024) - { - (void)flash_protect(FLAG_PROTECT_SET, - FLASH_BASE1_PRELIM, - FLASH_BASE1_PRELIM+monitor_flash_len-1, - &flash_info[1]); - } - if (size2 == 4*1024*1024) - { - (void)flash_protect(FLAG_PROTECT_SET, - CONFIG_SYS_FLASH_BASE, - CONFIG_SYS_FLASH_BASE+monitor_flash_len-1, - &flash_info[1]); - } - - return (size1 + size2); -} - -/*----------------------------------------------------------------------------*/ - -void flash_print_info (flash_info_t *info) -{ - int i; - int k; - int size; - int erased; - volatile unsigned long *flash; - - if (info->flash_id == FLASH_UNKNOWN) { - printf ("missing or unknown FLASH type\n"); - flash_init(); - } - - if (info->flash_id == FLASH_UNKNOWN) { - printf ("missing or unknown FLASH type\n"); - return; - } - - switch (info->flash_id & FLASH_VENDMASK) { - case FLASH_MAN_AMD: - printf ("AMD "); - break; - default: - printf ("Unknown Vendor "); - break; - } - - switch (info->flash_id & FLASH_TYPEMASK) { - case AMD_ID_F040B: - printf ("AM29F040B (4 Mbit)\n"); - break; - case AMD_ID_F016D: - printf ("AM29F016D (16 Mbit)\n"); - break; - case AMD_ID_F032B: - printf ("AM29F032B (32 Mbit)\n"); - break; - default: - printf ("Unknown Chip Type\n"); - break; - } - - if (info->size >= (1 << 20)) { - printf (" Size: %ld MB in %d Sectors\n", info->size >> 20, info->sector_count); - } else { - printf (" Size: %ld kB in %d Sectors\n", info->size >> 10, info->sector_count); - } - - printf (" Sector Start Addresses:"); - for (i=0; i<info->sector_count; ++i) { - /* - * Check if whole sector is erased - */ - if (i != (info->sector_count-1)) - size = info->start[i+1] - info->start[i]; - else - size = info->start[0] + info->size - info->start[i]; - - erased = 1; - flash = (volatile unsigned long *)info->start[i]; - size = size >> 2; /* divide by 4 for longword access */ - for (k=0; k<size; k++) { - if (*flash++ != 0xffffffff) { - erased = 0; - break; - } - } - - if ((i % 5) == 0) - printf ("\n "); - - printf (" %08lX%s%s", - info->start[i], - erased ? " E" : " ", - info->protect[i] ? "RO " : " "); - } - printf ("\n"); -} - -/*----------------------------------------------------------------------------*/ -/* - * The following code cannot be run from FLASH! - */ -ulong flash_get_size (vu_long *addr, flash_info_t *info) -{ - short i; - ulong vendor, devid; - ulong base = (ulong)addr; - volatile unsigned char *caddr = (unsigned char *)addr; - -#ifdef DEBUG - printf("flash_get_size for address 0x%lx: \n", (unsigned long)caddr); -#endif - - /* Write auto select command: read Manufacturer ID */ - caddr[0] = 0xF0; /* reset bank */ - udelay(10); - - eieio(); - caddr[0x555] = 0xAA; - udelay(10); - caddr[0x2AA] = 0x55; - udelay(10); - caddr[0x555] = 0x90; - - udelay(10); - - vendor = caddr[0]; - devid = caddr[1]; - -#ifdef DEBUG - printf("Manufacturer: 0x%lx\n", vendor); -#endif - - vendor &= 0xff; - devid &= 0xff; - - /* We accept only two AMD types */ - switch (vendor) { - case (FLASH_WORD_SIZE)AMD_MANUFACT: - info->flash_id = FLASH_MAN_AMD; - break; - default: - info->flash_id = FLASH_UNKNOWN; - info->sector_count = 0; - info->size = 0; - return (0); /* no or unknown flash */ - } - - switch (devid) { - case (FLASH_WORD_SIZE)AMD_ID_F040B: - info->flash_id |= AMD_ID_F040B; - info->sector_count = 8; - info->size = 0x00080000; - break; /* => 0.5 MB */ - - case (FLASH_WORD_SIZE)AMD_ID_F016D: - info->flash_id |= AMD_ID_F016D; - info->sector_count = 32; - info->size = 0x00200000; - break; /* => 2 MB */ - - case (FLASH_WORD_SIZE)AMD_ID_F032B: - info->flash_id |= AMD_ID_F032B; - info->sector_count = 64; - info->size = 0x00400000; - break; /* => 4 MB */ - - default: - info->flash_id = FLASH_UNKNOWN; - return (0); /* => no or unknown flash */ - - } - -#ifdef DEBUG - printf("flash id 0x%lx; sector count 0x%x, size 0x%lx\n", info->flash_id, info->sector_count, info->size); -#endif - - /* check for protected sectors */ - for (i = 0; i < info->sector_count; i++) { - /* sector base address */ - info->start[i] = base + i * (info->size / info->sector_count); - /* read sector protection at sector address, (A7 .. A0) = 0x02 */ - /* D0 = 1 if protected */ - caddr = (volatile unsigned char *)(info->start[i]); - info->protect[i] = caddr[2] & 1; - } - - /* - * Prevent writes to uninitialized FLASH. - */ - if (info->flash_id != FLASH_UNKNOWN) { - caddr = (volatile unsigned char *)info->start[0]; - caddr[0] = 0xF0; /* reset bank */ - } - - return (info->size); -} - -/*----------------------------------------------------------------------------*/ - -int flash_erase (flash_info_t *info, int s_first, int s_last) -{ - volatile FLASH_WORD_SIZE *addr = (FLASH_WORD_SIZE *)(info->start[0]); - int flag, prot, sect, l_sect; - ulong start, now, last; - int rc = 0; - - if ((s_first < 0) || (s_first > s_last)) { - if (info->flash_id == FLASH_UNKNOWN) { - printf ("- missing\n"); - } else { - printf ("- no sectors to erase\n"); - } - return 1; - } - - if ((info->flash_id == FLASH_UNKNOWN) || - (info->flash_id > FLASH_AMD_COMP)) { - printf ("Can't erase unknown flash type - aborted\n"); - return 1; - } - - prot = 0; - for (sect=s_first; sect<=s_last; ++sect) { - if (info->protect[sect]) { - prot++; - } - } - - if (prot) { - printf ("- Warning: %d protected sectors will not be erased!\n", - prot); - } else { - printf ("\n"); - } - - l_sect = -1; - - /* Disable interrupts which might cause a timeout here */ - flag = disable_interrupts(); - - addr[ADDR0] = (FLASH_WORD_SIZE)0x00AA00AA; - addr[ADDR1] = (FLASH_WORD_SIZE)0x00550055; - addr[ADDR0] = (FLASH_WORD_SIZE)0x00800080; - addr[ADDR0] = (FLASH_WORD_SIZE)0x00AA00AA; - addr[ADDR1] = (FLASH_WORD_SIZE)0x00550055; - - /* Start erase on unprotected sectors */ - for (sect = s_first; sect<=s_last; sect++) { - if (info->protect[sect] == 0) { /* not protected */ - addr = (FLASH_WORD_SIZE *)(info->start[sect]); - if (info->flash_id & FLASH_MAN_SST) { - addr[ADDR0] = (FLASH_WORD_SIZE)0x00AA00AA; - addr[ADDR1] = (FLASH_WORD_SIZE)0x00550055; - addr[ADDR0] = (FLASH_WORD_SIZE)0x00800080; - addr[ADDR0] = (FLASH_WORD_SIZE)0x00AA00AA; - addr[ADDR1] = (FLASH_WORD_SIZE)0x00550055; - addr[0] = (FLASH_WORD_SIZE)0x00500050; /* block erase */ - udelay(30000); /* wait 30 ms */ - } - else - addr[0] = (FLASH_WORD_SIZE)0x00300030; /* sector erase */ - l_sect = sect; - } - } - - /* re-enable interrupts if necessary */ - if (flag) - enable_interrupts(); - - /* wait at least 80us - let's wait 1 ms */ - udelay (1000); - - /* - * We wait for the last triggered sector - */ - if (l_sect < 0) - goto DONE; - - start = get_timer (0); - last = start; - addr = (FLASH_WORD_SIZE *)(info->start[l_sect]); - while ((addr[0] & (FLASH_WORD_SIZE)0x00800080) != (FLASH_WORD_SIZE)0x00800080) { - if ((now = get_timer(start)) > CONFIG_SYS_FLASH_ERASE_TOUT) { - printf ("Timeout\n"); - return 1; - } - /* show that we're waiting */ - if ((now - last) > 1000) { /* every second */ - serial_putc ('.'); - last = now; - } - } - -DONE: - /* reset to read mode */ - addr = (FLASH_WORD_SIZE *)info->start[0]; - addr[0] = (FLASH_WORD_SIZE)0x00F000F0; /* reset bank */ - - printf (" done\n"); - return rc; -} - -/*----------------------------------------------------------------------------*/ -/* - * Copy memory to flash, returns: - * 0 - OK - * 1 - write timeout - * 2 - Flash not erased - */ -int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt) -{ - ulong cp, wp, data; - int i, l, rc; - - wp = (addr & ~3); /* get lower word aligned address */ - - /* - * handle unaligned start bytes - */ - if ((l = addr - wp) != 0) { - data = 0; - for (i=0, cp=wp; i<l; ++i, ++cp) { - data = (data << 8) | (*(uchar *)cp); - } - for (; i<4 && cnt>0; ++i) { - data = (data << 8) | *src++; - --cnt; - ++cp; - } - for (; cnt==0 && i<4; ++i, ++cp) { - data = (data << 8) | (*(uchar *)cp); - } - - if ((rc = write_word(info, wp, data)) != 0) { - return (rc); - } - wp += 4; - } - - /* - * handle word aligned part - */ - while (cnt >= 4) { - data = 0; - for (i=0; i<4; ++i) { - data = (data << 8) | *src++; - } - if ((rc = write_word(info, wp, data)) != 0) { - return (rc); - } - wp += 4; - cnt -= 4; - } - - if (cnt == 0) { - return (0); - } - - /* - * handle unaligned tail bytes - */ - data = 0; - for (i=0, cp=wp; i<4 && cnt>0; ++i, ++cp) { - data = (data << 8) | *src++; - --cnt; - } - for (; i<4; ++i, ++cp) { - data = (data << 8) | (*(uchar *)cp); - } - - return (write_word(info, wp, data)); -} - -/*----------------------------------------------------------------------------*/ -/* Write a word to Flash, returns: - * 0 - OK - * 1 - write timeout - * 2 - Flash not erased - */ -static int write_word (flash_info_t *info, ulong dest, ulong data) -{ - volatile FLASH_WORD_SIZE *addr2 = (FLASH_WORD_SIZE *)(info->start[0]); - volatile FLASH_WORD_SIZE *dest2 = (FLASH_WORD_SIZE *)dest; - volatile FLASH_WORD_SIZE *data2 = (FLASH_WORD_SIZE *)&data; - ulong start; - int flag; - int i; - - /* Check if Flash is (sufficiently) erased */ - if ((*((volatile FLASH_WORD_SIZE *)dest) & - (FLASH_WORD_SIZE)data) != (FLASH_WORD_SIZE)data) { - return (2); - } - /* Disable interrupts which might cause a timeout here */ - flag = disable_interrupts(); - - for (i=0; i<4/sizeof(FLASH_WORD_SIZE); i++) - { - addr2[ADDR0] = (FLASH_WORD_SIZE)0x00AA00AA; - addr2[ADDR1] = (FLASH_WORD_SIZE)0x00550055; - addr2[ADDR0] = (FLASH_WORD_SIZE)0x00A000A0; - - dest2[i] = data2[i]; - - /* re-enable interrupts if necessary */ - if (flag) - enable_interrupts(); - - /* data polling for D7 */ - start = get_timer (0); - while ((dest2[i] & (FLASH_WORD_SIZE)0x00800080) != - (data2[i] & (FLASH_WORD_SIZE)0x00800080)) { - if (get_timer(start) > CONFIG_SYS_FLASH_WRITE_TOUT) { - return (1); - } - } - } - - return (0); -} - -/*----------------------------------------------------------------------------*/ diff --git a/board/eltec/elppc/misc.c b/board/eltec/elppc/misc.c deleted file mode 100644 index 2acf800..0000000 --- a/board/eltec/elppc/misc.c +++ /dev/null @@ -1,250 +0,0 @@ -/* - * (C) Copyright 2002 ELTEC Elektronik AG - * Frank Gottschling <fgottschling@eltec.de> - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -/* includes */ -#include <common.h> -#include <cli.h> -#include <linux/ctype.h> -#include <pci.h> -#include <net.h> -#include "srom.h" - -/* imports */ -extern int l2_cache_enable (int l2control); -extern int eepro100_write_eeprom (struct eth_device *dev, int location, - int addr_len, unsigned short data); -extern int read_eeprom (struct eth_device *dev, int location, int addr_len); - -/*----------------------------------------------------------------------------*/ -/* - * read/write to nvram is only byte access - */ -void *nvram_read (void *dest, const long src, size_t count) -{ - uchar *d = (uchar *) dest; - uchar *s = (uchar *) (CONFIG_ENV_MAP_ADRS + src); - - while (count--) - *d++ = *s++; - - return dest; -} - -void nvram_write (long dest, const void *src, size_t count) -{ - uchar *d = (uchar *) (CONFIG_ENV_MAP_ADRS + dest); - uchar *s = (uchar *) src; - - while (count--) - *d++ = *s++; -} - -/*----------------------------------------------------------------------------*/ -/* - * handle sroms on ELPPC - * fix ether address - * set serial console as default - */ -int misc_init_r (void) -{ - revinfo eerev; - u_char *ptr; - u_int i, l, initSrom, copyNv; - char buf[256]; - char hex[23] = { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 0, 0, 0, - 0, 0, 0, 0, 10, 11, 12, 13, 14, 15 - }; - - /* Clock setting for MPC107 i2c */ - mpc107_i2c_init (MPC107_EUMB_ADDR, 0x2b); - - /* Reset the EPIC */ - out32r (MPC107_EUMB_GCR, 0xa0000000); - while (in32r (MPC107_EUMB_GCR) & 0x80000000); /* Wait for reset to complete */ - out32r (MPC107_EUMB_GCR, 0x20000000); /* Put into into mixed mode */ - while (in32r (MPC107_EUMB_IACKR) != 0xff); /* Clear all pending interrupts */ - - /* - * Check/Remake revision info - */ - initSrom = 0; - copyNv = 0; - - /* read out current revision srom contens */ - mpc107_srom_load (0x0000, (u_char *) & eerev, sizeof (revinfo), - SECOND_DEVICE, FIRST_BLOCK); - - /* read out current nvram shadow image */ - nvram_read (buf, CONFIG_SYS_NV_SROM_COPY_ADDR, CONFIG_SYS_SROM_SIZE); - - if (strcmp (eerev.magic, "ELTEC") != 0) { - /* srom is not initialized -> create a default revision info */ - for (i = 0, ptr = (u_char *) & eerev; i < sizeof (revinfo); - i++) - *ptr++ = 0x00; - strcpy (eerev.magic, "ELTEC"); - eerev.revrev[0] = 1; - eerev.revrev[1] = 0; - eerev.size = 0x00E0; - eerev.category[0] = 0x01; - - /* node id from dead e128 as default */ - eerev.etheraddr[0] = 0x00; - eerev.etheraddr[1] = 0x00; - eerev.etheraddr[2] = 0x5B; - eerev.etheraddr[3] = 0x00; - eerev.etheraddr[4] = 0x2E; - eerev.etheraddr[5] = 0x4D; - - /* cache config word for ELPPC */ - memset(&eerev.res[0], 0, 4); - - initSrom = 1; /* force dialog */ - copyNv = 1; /* copy to nvram */ - } - - if ((copyNv == 0) - && (el_srom_checksum ((u_char *) & eerev, CONFIG_SYS_SROM_SIZE) != - el_srom_checksum ((u_char *) buf, CONFIG_SYS_SROM_SIZE))) { - printf ("Invalid revision info copy in nvram !\n"); - printf ("Press key:\n <c> to copy current revision info to nvram.\n"); - printf (" <r> to reenter revision info.\n"); - printf ("=> "); - if (0 != cli_readline(NULL)) { - switch ((char) toupper (console_buffer[0])) { - case 'C': - copyNv = 1; - break; - case 'R': - copyNv = 1; - initSrom = 1; - break; - } - } - } - - if (initSrom) { - memcpy (buf, &eerev.revision[0][0], 14); /* save all revision info */ - printf ("Enter revision number (0-9): %c ", - eerev.revision[0][0]); - if (0 != cli_readline(NULL)) { - eerev.revision[0][0] = - (char) toupper (console_buffer[0]); - memcpy (&eerev.revision[1][0], buf, 12); /* shift rest of rev info */ - } - - printf ("Enter revision character (A-Z): %c ", - eerev.revision[0][1]); - if (1 == cli_readline(NULL)) { - eerev.revision[0][1] = - (char) toupper (console_buffer[0]); - } - - printf ("Enter board name (V-XXXX-XXXX): %s ", - (char *) &eerev.board); - if (11 == cli_readline(NULL)) { - for (i = 0; i < 11; i++) - eerev.board[i] = - (char) toupper (console_buffer[i]); - eerev.board[11] = '\0'; - } - - printf ("Enter serial number: %s ", (char *) &eerev.serial); - if (6 == cli_readline(NULL)) { - for (i = 0; i < 6; i++) - eerev.serial[i] = console_buffer[i]; - eerev.serial[6] = '\0'; - } - - printf ("Enter ether node ID with leading zero (HEX): %02x%02x%02x%02x%02x%02x ", eerev.etheraddr[0], eerev.etheraddr[1], eerev.etheraddr[2], eerev.etheraddr[3], eerev.etheraddr[4], eerev.etheraddr[5]); - if (12 == cli_readline(NULL)) { - for (i = 0; i < 12; i += 2) - eerev.etheraddr[i >> 1] = - (char) (16 * - hex[toupper - (console_buffer[i]) - - '0'] + - hex[toupper - (console_buffer[i + 1]) - - '0']); - } - - l = strlen ((char *) &eerev.text); - printf ("Add to text section (max 64 chr): %s ", - (char *) &eerev.text); - if (0 != cli_readline(NULL)) { - for (i = l; i < 63; i++) - eerev.text[i] = console_buffer[i - l]; - eerev.text[63] = '\0'; - } - - /* prepare network eeprom */ - memset (buf, 0, 128); - - buf[0] = eerev.etheraddr[1]; - buf[1] = eerev.etheraddr[0]; - buf[2] = eerev.etheraddr[3]; - buf[3] = eerev.etheraddr[2]; - buf[4] = eerev.etheraddr[5]; - buf[5] = eerev.etheraddr[4]; - - buf[20] = 0x48; - buf[21] = 0xB2; - - buf[22] = 0x00; - buf[23] = 0x04; - - buf[24] = 0x14; - buf[25] = 0x33; - - printf ("\nSRom: Writing i82559 info ........ "); - if (eepro100_srom_store ((unsigned short *) buf) == -1) - printf ("FAILED\n"); - else - printf ("OK\n"); - - /* update CRC */ - eerev.crc = - el_srom_checksum ((u_char *) eerev.board, eerev.size); - - /* write new values */ - printf ("\nSRom: Writing revision info ...... "); - if (mpc107_srom_store - ((BLOCK_SIZE - sizeof (revinfo)), (u_char *) & eerev, - sizeof (revinfo), SECOND_DEVICE, FIRST_BLOCK) == -1) - printf ("FAILED\n\n"); - else - printf ("OK\n\n"); - - /* write new values as shadow image to nvram */ - nvram_write (CONFIG_SYS_NV_SROM_COPY_ADDR, (void *) &eerev, - CONFIG_SYS_SROM_SIZE); - - } - - /*if (initSrom) */ - /* copy current values as shadow image to nvram */ - if (initSrom == 0 && copyNv == 1) - nvram_write (CONFIG_SYS_NV_SROM_COPY_ADDR, (void *) &eerev, - CONFIG_SYS_SROM_SIZE); - - /* update environment */ - sprintf (buf, "%02x:%02x:%02x:%02x:%02x:%02x", - eerev.etheraddr[0], eerev.etheraddr[1], - eerev.etheraddr[2], eerev.etheraddr[3], - eerev.etheraddr[4], eerev.etheraddr[5]); - setenv ("ethaddr", buf); - - /* print actual board identification */ - printf ("Ident: %s Ser %s Rev %c%c\n", - eerev.board, (char *) &eerev.serial, - eerev.revision[0][0], eerev.revision[0][1]); - - return (0); -} - -/*----------------------------------------------------------------------------*/ diff --git a/board/eltec/elppc/mpc107_i2c.c b/board/eltec/elppc/mpc107_i2c.c deleted file mode 100644 index 4f95703..0000000 --- a/board/eltec/elppc/mpc107_i2c.c +++ /dev/null @@ -1,304 +0,0 @@ -/* - * (C) Copyright 2002 ELTEC Elektronik AG - * Frank Gottschling <fgottschling@eltec.de> - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -/* includes */ -#include <common.h> -#include "srom.h" - -/* locals */ -static unsigned long mpc107_eumb_addr = 0; - -/*----------------------------------------------------------------------------*/ - -/* - * calculate checksum for ELTEC revision srom - */ -unsigned long el_srom_checksum (ptr, size) -register unsigned char *ptr; -unsigned long size; -{ - u_long f, accu = 0; - u_int i; - u_char byte; - - for (; size; size--) - { - byte = *ptr++; - for (i = 8; i; i--) - { - f = ((byte & 1) ^ (accu & 1)) ? 0x84083001 : 0; - accu >>= 1; accu ^= f; - byte >>= 1; - } - } - return(accu); -} - -/*----------------------------------------------------------------------------*/ - -static int mpc107_i2c_wait ( unsigned long timeout ) -{ - unsigned long x; - - while (((x = in32r(MPC107_I2CSR)) & 0x82) != 0x82) - { - if (!timeout--) - return -1; - } - - if (x & 0x10) - { - return -1; - } - out32r(MPC107_I2CSR, 0); - - return 0; -} - -/*----------------------------------------------------------------------------*/ - -static int mpc107_i2c_wait_idle ( unsigned long timeout ) -{ - while (in32r(MPC107_I2CSR) & 0x20) - { - if (!timeout--) - return -1; - } - return 0; -} - - -/*----------------------------------------------------------------------------*/ - -int mpc107_i2c_read_byte ( - unsigned char device, - unsigned char block, - unsigned char offset ) -{ - unsigned long timeout = MPC107_I2C_TIMEOUT; - int data; - - if (!mpc107_eumb_addr) - return -6; - - mpc107_i2c_wait_idle (timeout); - - /* Start with MEN */ - out32r(MPC107_I2CCR, 0x80); - - /* Start as master */ - out32r(MPC107_I2CCR, 0xB0); - out32r(MPC107_I2CDR, (0xA0 | device | block)); - - if (mpc107_i2c_wait(timeout) < 0) - { - printf("mpc107_i2c_read Error 1\n"); - return -2; - } - - if (in32r(MPC107_I2CSR)&0x1) - { - /* Generate STOP condition; device busy or not existing */ - out32r(MPC107_I2CCR, 0x80); - return -1; - } - - /* Data address */ - out32r(MPC107_I2CDR, offset); - - if (mpc107_i2c_wait(timeout) < 0) - { - printf("mpc107_i2c_read Error 2\n"); - return -3; - } - - /* Switch to read - restart */ - out32r(MPC107_I2CCR, 0xB4); - out32r(MPC107_I2CDR, (0xA1 | device | block)); - - if (mpc107_i2c_wait(timeout) < 0) - { - printf("mpc107_i2c_read Error 3\n"); - return -4; - } - - out32r(MPC107_I2CCR, 0xA8); /* no ACK */ - in32r(MPC107_I2CDR); - - if (mpc107_i2c_wait(timeout) < 0) - { - printf("mpc107_i2c_read Error 4\n"); - return -5; - } - /* Generate STOP condition */ - out32r(MPC107_I2CCR, 0x88); - - /* read */ - data = in32r(MPC107_I2CDR); - - return (data); -} - -/*----------------------------------------------------------------------------*/ - -int mpc107_i2c_write_byte ( - unsigned char device, - unsigned char block, - unsigned char offset, - unsigned char val ) -{ - - unsigned long timeout = MPC107_I2C_TIMEOUT; - - if (!mpc107_eumb_addr) - return -6; - - mpc107_i2c_wait_idle(timeout); - - /* Start with MEN */ - out32r(MPC107_I2CCR, 0x80); - - /* Start as master */ - out32r(MPC107_I2CCR, 0xB0); - out32r(MPC107_I2CDR, (0xA0 | device | block)); - - if (mpc107_i2c_wait(timeout) < 0) - { - printf("mpc107_i2c_write Error 1\n"); - return -1; - } - - /* Data address */ - out32r(MPC107_I2CDR, offset); - - if (mpc107_i2c_wait(timeout) < 0) - { - printf("mpc107_i2c_write Error 2\n"); - return -1; - } - - /* Write */ - out32r(MPC107_I2CDR, val); - if (mpc107_i2c_wait(timeout) < 0) - { - printf("mpc107_i2c_write Error 3\n"); - return -1; - } - - /* Generate Stop Condition */ - out32r(MPC107_I2CCR, 0x80); - - /* Return ACK or no ACK */ - return (in32r(MPC107_I2CSR) & 0x01); -} - -/*----------------------------------------------------------------------------*/ - -int mpc107_srom_load ( - unsigned char addr, - unsigned char *pBuf, - int cnt, - unsigned char device, - unsigned char block ) -{ - register int i; - int val; - int timeout; - - for (i = 0; i < cnt; i++) - { - timeout=100; - do - { - val = mpc107_i2c_read_byte (device, block, addr); - if (val < -1) - { - printf("i2c_read_error %d at dev %x block %x addr %x\n", - val, device, block, addr); - return -1; - } - else if (timeout==0) - { - printf ("i2c_read_error: timeout at dev %x block %x addr %x\n", - device, block, addr); - return -1; - } - timeout--; - } while (val == -1); /* if no ack: try again! */ - - *pBuf++ = (unsigned char)val; - addr++; - - if ((addr == 0) && (i != cnt-1)) /* is it the same block ? */ - { - if (block == FIRST_BLOCK) - block = SECOND_BLOCK; - else - { - printf ("ic2_read_error: read beyond 2. block !\n"); - return -1; - } - } - } - udelay(100000); - return (cnt); -} - -/*----------------------------------------------------------------------------*/ - -int mpc107_srom_store ( - unsigned char addr, - unsigned char *pBuf, - int cnt, - unsigned char device, - unsigned char block ) -{ - register int i; - - for (i = 0; i < cnt; i++) - { - while (mpc107_i2c_write_byte (device,block,addr,*pBuf) == 1); - addr++; - pBuf++; - - if ((addr == 0) && (i != cnt-1)) /* is it the same block ? */ - { - if (block == FIRST_BLOCK) - block = SECOND_BLOCK; - else - { - printf ("ic2_write_error: write beyond 2. block !\n"); - return -1; - } - } - } - udelay(100000); - return(cnt); -} - -/*----------------------------------------------------------------------------*/ - -int mpc107_i2c_init ( unsigned long eumb_addr, unsigned long divider ) -{ - unsigned long x; - - if (eumb_addr) - mpc107_eumb_addr = eumb_addr; - else - return -1; - - /* Set I2C clock */ - x = in32r(MPC107_I2CFDR) & 0xffffff00; - out32r(MPC107_I2CFDR, (x | divider)); - - /* Clear arbitration */ - out32r(MPC107_I2CSR, 0); - - return mpc107_eumb_addr; -} - -/*----------------------------------------------------------------------------*/ diff --git a/board/eltec/elppc/pci.c b/board/eltec/elppc/pci.c deleted file mode 100644 index d81a41a..0000000 --- a/board/eltec/elppc/pci.c +++ /dev/null @@ -1,81 +0,0 @@ -/* - * (C) Copyright 2002 ELTEC Elektronik AG - * Frank Gottschling <fgottschling@eltec.de> - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -/* - * PCI initialisation for the MPC10x. - */ - -#include <common.h> -#include <pci.h> -#include <mpc106.h> - -#ifdef CONFIG_PCI - -struct pci_controller local_hose; - -void pci_init_board(void) -{ - struct pci_controller* hose = (struct pci_controller *)&local_hose; - u16 reg16; - - hose->first_busno = 0; - hose->last_busno = 0xff; - - pci_set_region(hose->regions + 0, - CONFIG_SYS_PCI_MEMORY_BUS, - CONFIG_SYS_PCI_MEMORY_PHYS, - CONFIG_SYS_PCI_MEMORY_SIZE, - PCI_REGION_MEM | PCI_REGION_SYS_MEMORY); - - /* PCI memory space */ - pci_set_region(hose->regions + 1, - CONFIG_SYS_PCI_MEM_BUS, - CONFIG_SYS_PCI_MEM_PHYS, - CONFIG_SYS_PCI_MEM_SIZE, - PCI_REGION_MEM); - - /* ISA/PCI memory space */ - pci_set_region(hose->regions + 2, - CONFIG_SYS_ISA_MEM_BUS, - CONFIG_SYS_ISA_MEM_PHYS, - CONFIG_SYS_ISA_MEM_SIZE, - PCI_REGION_MEM); - - /* PCI I/O space */ - pci_set_region(hose->regions + 3, - CONFIG_SYS_PCI_IO_BUS, - CONFIG_SYS_PCI_IO_PHYS, - CONFIG_SYS_PCI_IO_SIZE, - PCI_REGION_IO); - - /* ISA/PCI I/O space */ - pci_set_region(hose->regions + 4, - CONFIG_SYS_ISA_IO_BUS, - CONFIG_SYS_ISA_IO_PHYS, - CONFIG_SYS_ISA_IO_SIZE, - PCI_REGION_IO); - - hose->region_count = 5; - - pci_setup_indirect(hose, - MPC106_REG_ADDR, - MPC106_REG_DATA); - - pci_register_hose(hose); - - hose->last_busno = pci_hose_scan(hose); - - /* Initialises the MPC10x PCI Configuration regs. */ - pci_read_config_word (PCI_BDF(0,0,0), PCI_COMMAND, ®16); - reg16 |= PCI_COMMAND_SERR | PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY; - pci_write_config_word(PCI_BDF(0,0,0), PCI_COMMAND, reg16); - - /* Clear non-reserved bits in status register */ - pci_write_config_word(PCI_BDF(0,0,0), PCI_STATUS, 0xffff); -} - -#endif /* CONFIG_PCI */ diff --git a/board/eltec/elppc/srom.h b/board/eltec/elppc/srom.h deleted file mode 100644 index 662daf8..0000000 --- a/board/eltec/elppc/srom.h +++ /dev/null @@ -1,86 +0,0 @@ -/* - * (C) Copyright 2002 ELTEC Elektronik AG - * Frank Gottschling <fgottschling@eltec.de> - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -/* common srom defs */ -#define FIRST_DEVICE 0x00 -#define SECOND_DEVICE 0x04 -#define FIRST_BLOCK 0x00 -#define SECOND_BLOCK 0x02 -#define BLOCK_SIZE 0x100 -#define ERROR (-1) - -#define CLK2P0TO1_1MB_PB_0P5DH 0x79000100 -#define CLK2P5TO1_1MB_PB_0P5DH 0x7B000100 - -#define CPU_TYPE_740 0x08 -#define CPU_TYPE_750 0x08 -#define CPU_TYPE ((get_pvr()>>16)&0xffff) - -#define ABS(x) ((x<0)?-x:x) -#define SROM_SHORT(pX) (*(u8 *)(pX) | *((u8 *)(pX)+1) << 8) - -/* bab7xx ELTEC srom */ -#define I2C_BUS_DAT (CONFIG_SYS_ISA_IO + 0x220) -#define I2C_BUS_DIR (CONFIG_SYS_ISA_IO + 0x221) - -/* srom at mpc107 */ -#define MPC107_I2CADDR (mpc107_eumb_addr + 0x3000) /* address */ -#define MPC107_I2CFDR (mpc107_eumb_addr + 0x3004) /* freq divider */ -#define MPC107_I2CCR (mpc107_eumb_addr + 0x3008) /* control */ -#define MPC107_I2CSR (mpc107_eumb_addr + 0x300c) /* status */ -#define MPC107_I2CDR (mpc107_eumb_addr + 0x3010) /* data */ -#define MPC107_I2C_TIMEOUT 10000000 - -/* i82559 */ -#define EE_ADDR_BITS 6 -#define EE_SIZE 0x40 /* 0x40 words */ -#define EE_CHECKSUM 0xBABA - -/* dc21143 */ -#define DEC_SROM_SIZE 128 - - -/* - * structure of revision srom - */ -typedef struct { - char magic[8]; /* 000 - Magic number */ - char revrev[2]; /* 008 - Revision of structure */ - unsigned short size; /* 00A - Size of CRC area */ - unsigned long crc; /* 00C - CRC */ - char board[16]; /* 010 - Board Revision information */ - char option[4][16]; /* 020 - Option Revision information */ - char serial[8]; /* 060 - Board serial number */ - char etheraddr[6]; /* 068 - Ethernet node addresse */ - char reserved[2]; /* 06E - Reserved */ - char revision[7][2]; /* 070 - Revision codes */ - char category[2]; /* 07E - Category codes */ - char text[64]; /* 080 - Text field */ - char res[64]; /* 0C0 - Reserved */ -} revinfo; - -unsigned long el_srom_checksum (unsigned char *ptr, unsigned long size); -int el_srom_load (unsigned char addr, unsigned char *buf, int cnt, - unsigned char device, unsigned char block); -int el_srom_store (unsigned char addr, unsigned char *buf, int cnt, - unsigned char device, unsigned char block); - -int mpc107_i2c_init (unsigned long eumb_addr, unsigned long divider); -int mpc107_i2c_read_byte (unsigned char device, unsigned char block, unsigned char offset); -int mpc107_i2c_write_byte (unsigned char device, unsigned char block, - unsigned char offset, unsigned char val); -int mpc107_srom_load (unsigned char addr, unsigned char *pBuf, int cnt, - unsigned char device, unsigned char block); -int mpc107_srom_store (unsigned char addr, unsigned char *pBuf, int cnt, - unsigned char device, unsigned char block); - -int dc_srom_load (unsigned short *dest); -int dc_srom_store (unsigned short *src); - -unsigned short eepro100_srom_checksum (unsigned short *sromdata); -void eepro100_srom_load (unsigned short *destination); -int eepro100_srom_store (unsigned short *source); |