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-rw-r--r--board/chromebook-x86/dts/alex.dts10
-rw-r--r--board/chromebook-x86/dts/link.dts10
2 files changed, 10 insertions, 10 deletions
diff --git a/board/chromebook-x86/dts/alex.dts b/board/chromebook-x86/dts/alex.dts
index cb6a9e4..2f13544 100644
--- a/board/chromebook-x86/dts/alex.dts
+++ b/board/chromebook-x86/dts/alex.dts
@@ -3,8 +3,8 @@
/include/ "coreboot.dtsi"
/ {
- #address-cells = <1>;
- #size-cells = <1>;
+ #address-cells = <1>;
+ #size-cells = <1>;
model = "Google Alex";
compatible = "google,alex", "intel,atom-pineview";
@@ -12,13 +12,13 @@
silent_console = <0>;
};
- gpio: gpio {};
+ gpio: gpio {};
serial {
reg = <0x3f8 8>;
clock-frequency = <115200>;
};
- chosen { };
- memory { device_type = "memory"; reg = <0 0>; };
+ chosen { };
+ memory { device_type = "memory"; reg = <0 0>; };
};
diff --git a/board/chromebook-x86/dts/link.dts b/board/chromebook-x86/dts/link.dts
index c95ee8a..4a37dac 100644
--- a/board/chromebook-x86/dts/link.dts
+++ b/board/chromebook-x86/dts/link.dts
@@ -3,8 +3,8 @@
/include/ "coreboot.dtsi"
/ {
- #address-cells = <1>;
- #size-cells = <1>;
+ #address-cells = <1>;
+ #size-cells = <1>;
model = "Google Link";
compatible = "google,link", "intel,celeron-ivybridge";
@@ -12,15 +12,15 @@
silent_console = <0>;
};
- gpio: gpio {};
+ gpio: gpio {};
serial {
reg = <0x3f8 8>;
clock-frequency = <115200>;
};
- chosen { };
- memory { device_type = "memory"; reg = <0 0>; };
+ chosen { };
+ memory { device_type = "memory"; reg = <0 0>; };
spi {
#address-cells = <1>;