diff options
Diffstat (limited to 'board/chromebook-x86')
| -rw-r--r-- | board/chromebook-x86/coreboot/Makefile | 3 | ||||
| -rw-r--r-- | board/chromebook-x86/coreboot/config.mk | 37 | ||||
| -rw-r--r-- | board/chromebook-x86/coreboot/coreboot.c | 87 | ||||
| -rw-r--r-- | board/chromebook-x86/coreboot/coreboot_pci.c | 30 | ||||
| -rw-r--r-- | board/chromebook-x86/coreboot/coreboot_start16.S | 46 | ||||
| -rw-r--r-- | board/chromebook-x86/dts/alex.dts | 24 | ||||
| -rw-r--r-- | board/chromebook-x86/dts/link.dts | 24 |
7 files changed, 85 insertions, 166 deletions
diff --git a/board/chromebook-x86/coreboot/Makefile b/board/chromebook-x86/coreboot/Makefile index cfcc0df..886baf6 100644 --- a/board/chromebook-x86/coreboot/Makefile +++ b/board/chromebook-x86/coreboot/Makefile @@ -32,9 +32,6 @@ include $(TOPDIR)/config.mk LIB = $(obj)lib$(BOARD).o -COBJS-y += coreboot.o -COBJS-$(CONFIG_PCI) += coreboot_pci.o -SOBJS-y += coreboot_start16.o SOBJS-y += coreboot_start.o SRCS := $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c) diff --git a/board/chromebook-x86/coreboot/config.mk b/board/chromebook-x86/coreboot/config.mk new file mode 100644 index 0000000..f720851 --- /dev/null +++ b/board/chromebook-x86/coreboot/config.mk @@ -0,0 +1,37 @@ +# +# Copyright (c) 2011 The Chromium OS Authors. All rights reserved. +# Use of this source code is governed by a BSD-style license that can be +# found in the LICENSE file. +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions are +# met: +# +# * Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# * Redistributions in binary form must reproduce the above +# copyright notice, this list of conditions and the following disclaimer +# in the documentation and/or other materials provided with the +# distribution. +# * Neither the name of Google Inc. nor the names of its +# contributors may be used to endorse or promote products derived from +# this software without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT +# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, +# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT +# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, +# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY +# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE +# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +# +# Alternatively, this software may be distributed under the terms of the +# GNU General Public License ("GPL") version 2 as published by the Free +# Software Foundation. +# + +HOSTCFLAGS_autoconf.mk.dep = -Wno-variadic-macros diff --git a/board/chromebook-x86/coreboot/coreboot.c b/board/chromebook-x86/coreboot/coreboot.c deleted file mode 100644 index 22a643c..0000000 --- a/board/chromebook-x86/coreboot/coreboot.c +++ /dev/null @@ -1,87 +0,0 @@ -/* - * Copyright (c) 2011 The Chromium OS Authors. - * (C) Copyright 2008 - * Graeme Russ, graeme.russ@gmail.com. - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#include <common.h> -#include <asm/u-boot-x86.h> -#include <flash.h> -#include <netdev.h> -#include <asm/arch-coreboot/tables.h> -#include <asm/arch-coreboot/sysinfo.h> - -DECLARE_GLOBAL_DATA_PTR; - -unsigned long monitor_flash_len = CONFIG_SYS_MONITOR_LEN; - -/* - * Miscellaneous platform dependent initializations - */ -int cpu_init_f(void) -{ - int ret = get_coreboot_info(&lib_sysinfo); - if (ret != 0) - printf("Failed to parse coreboot tables.\n"); - return ret; -} - -int board_early_init_f(void) -{ - return 0; -} - -int board_early_init_r(void) -{ - /* CPU Speed to 100MHz */ - gd->cpu_clk = 100000000; - - /* Crystal is 33.000MHz */ - gd->bus_clk = 33000000; - - return 0; -} - -void show_boot_progress(int val) -{ -} - - -int last_stage_init(void) -{ - return 0; -} - -#ifndef CONFIG_SYS_NO_FLASH -ulong board_flash_get_legacy(ulong base, int banknum, flash_info_t *info) -{ - return 0; -} -#endif - -int board_eth_init(bd_t *bis) -{ - return pci_eth_init(bis); -} - -void setup_pcat_compatibility() -{ -} diff --git a/board/chromebook-x86/coreboot/coreboot_pci.c b/board/chromebook-x86/coreboot/coreboot_pci.c deleted file mode 100644 index 732ca3c..0000000 --- a/board/chromebook-x86/coreboot/coreboot_pci.c +++ /dev/null @@ -1,30 +0,0 @@ -/* - * Copyright (c) 2011 The Chromium OS Authors. - * (C) Copyright 2008,2009 - * Graeme Russ, <graeme.russ@gmail.com> - * - * (C) Copyright 2002 - * Daniel Engström, Omicron Ceti AB, <daniel@omicron.se> - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -void pci_init_board(void) -{ -} diff --git a/board/chromebook-x86/coreboot/coreboot_start16.S b/board/chromebook-x86/coreboot/coreboot_start16.S deleted file mode 100644 index 9ad06df..0000000 --- a/board/chromebook-x86/coreboot/coreboot_start16.S +++ /dev/null @@ -1,46 +0,0 @@ -/* - * Copyright (c) 2011 The Chromium OS Authors. - * (C) Copyright 2008 - * Graeme Russ, graeme.russ@gmail.com. - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -/* - * 16bit initialization code. - * This code have to map the area of the boot flash - * that is used by U-boot to its final destination. - */ - -.text -.section .start16, "ax" -.code16 -.globl board_init16 -board_init16: - jmp board_init16_ret - -.section .bios, "ax" -.code16 -.globl realmode_reset -.hidden realmode_reset -.type realmode_reset, @function -realmode_reset: - -1: hlt - jmp 1 diff --git a/board/chromebook-x86/dts/alex.dts b/board/chromebook-x86/dts/alex.dts new file mode 100644 index 0000000..cb6a9e4 --- /dev/null +++ b/board/chromebook-x86/dts/alex.dts @@ -0,0 +1,24 @@ +/dts-v1/; + +/include/ "coreboot.dtsi" + +/ { + #address-cells = <1>; + #size-cells = <1>; + model = "Google Alex"; + compatible = "google,alex", "intel,atom-pineview"; + + config { + silent_console = <0>; + }; + + gpio: gpio {}; + + serial { + reg = <0x3f8 8>; + clock-frequency = <115200>; + }; + + chosen { }; + memory { device_type = "memory"; reg = <0 0>; }; +}; diff --git a/board/chromebook-x86/dts/link.dts b/board/chromebook-x86/dts/link.dts new file mode 100644 index 0000000..af60f59 --- /dev/null +++ b/board/chromebook-x86/dts/link.dts @@ -0,0 +1,24 @@ +/dts-v1/; + +/include/ "coreboot.dtsi" + +/ { + #address-cells = <1>; + #size-cells = <1>; + model = "Google Link"; + compatible = "google,link", "intel,celeron-ivybridge"; + + config { + silent_console = <0>; + }; + + gpio: gpio {}; + + serial { + reg = <0x3f8 8>; + clock-frequency = <115200>; + }; + + chosen { }; + memory { device_type = "memory"; reg = <0 0>; }; +}; |