summaryrefslogtreecommitdiff
path: root/board/chromebook-x86/dts/link.dts
diff options
context:
space:
mode:
Diffstat (limited to 'board/chromebook-x86/dts/link.dts')
-rw-r--r--board/chromebook-x86/dts/link.dts24
1 files changed, 24 insertions, 0 deletions
diff --git a/board/chromebook-x86/dts/link.dts b/board/chromebook-x86/dts/link.dts
new file mode 100644
index 0000000..af60f59
--- /dev/null
+++ b/board/chromebook-x86/dts/link.dts
@@ -0,0 +1,24 @@
+/dts-v1/;
+
+/include/ "coreboot.dtsi"
+
+/ {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ model = "Google Link";
+ compatible = "google,link", "intel,celeron-ivybridge";
+
+ config {
+ silent_console = <0>;
+ };
+
+ gpio: gpio {};
+
+ serial {
+ reg = <0x3f8 8>;
+ clock-frequency = <115200>;
+ };
+
+ chosen { };
+ memory { device_type = "memory"; reg = <0 0>; };
+};