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-rw-r--r--board/bf537-stamp/Makefile17
-rw-r--r--board/bf537-stamp/bf537-stamp.c38
-rw-r--r--board/bf537-stamp/cmd_bf537led.c2
-rw-r--r--board/bf537-stamp/config.mk7
-rw-r--r--board/bf537-stamp/nand.c21
-rw-r--r--board/bf537-stamp/post-memory.c55
-rw-r--r--board/bf537-stamp/spi_flash.c30
-rw-r--r--board/bf537-stamp/u-boot.lds.S26
8 files changed, 88 insertions, 108 deletions
diff --git a/board/bf537-stamp/Makefile b/board/bf537-stamp/Makefile
index e5481bf..cb38b96 100644
--- a/board/bf537-stamp/Makefile
+++ b/board/bf537-stamp/Makefile
@@ -29,18 +29,19 @@ include $(TOPDIR)/config.mk
LIB = $(obj)lib$(BOARD).a
-COBJS := $(BOARD).o post-memory.o spi_flash.o cmd_bf537led.o nand.o
+COBJS-y := $(BOARD).o post-memory.o cmd_bf537led.o
+COBJS-$(CONFIG_CMD_EEPROM) += spi_flash.o
+COBJS-$(CONFIG_CMD_NAND) += nand.o
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
+SRCS := $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c)
+OBJS := $(addprefix $(obj),$(COBJS-y))
+SOBJS := $(addprefix $(obj),$(SOBJS-y))
-$(LIB): $(obj).depend $(OBJS) $(SOBJS) u-boot.lds
+$(LIB): $(obj).depend $(OBJS) $(SOBJS) $(obj)u-boot.lds
$(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS)
-u-boot.lds: u-boot.lds.S
- $(CPP) $(CPPFLAGS) -D__ASSEMBLY__ -P -Ubfin $^ > $@.tmp
- mv -f $@.tmp $@
+$(obj)u-boot.lds: u-boot.lds.S
+ $(CPP) $(CPPFLAGS) -D__ASSEMBLY__ -P $^ > $@
clean:
rm -f $(SOBJS) $(OBJS)
diff --git a/board/bf537-stamp/bf537-stamp.c b/board/bf537-stamp/bf537-stamp.c
index 4567213..5b619be 100644
--- a/board/bf537-stamp/bf537-stamp.c
+++ b/board/bf537-stamp/bf537-stamp.c
@@ -34,22 +34,6 @@
#include <asm/mach-common/bits/bootrom.h>
#include <netdev.h>
-/**
- * is_valid_ether_addr - Determine if the given Ethernet address is valid
- * @addr: Pointer to a six-byte array containing the Ethernet address
- *
- * Check that the Ethernet address (MAC) is not 00:00:00:00:00:00, is not
- * a multicast address, and is not FF:FF:FF:FF:FF:FF.
- *
- * Return true if the address is valid.
- */
-static inline int is_valid_ether_addr(const u8 * addr)
-{
- /* FF:FF:FF:FF:FF:FF is a multicast address so we don't need to
- * explicitly check for it here. */
- return !is_multicast_ether_addr(addr) && !is_zero_ether_addr(addr);
-}
-
DECLARE_GLOBAL_DATA_PTR;
#define POST_WORD_ADDR 0xFF903FFC
@@ -100,21 +84,9 @@ void cf_outsw(unsigned short *addr, unsigned short *sect_buf, int words)
phys_size_t initdram(int board_type)
{
-#ifdef DEBUG
- int brate;
- char *tmp = getenv("baudrate");
- brate = simple_strtoul(tmp, NULL, 16);
- printf("Serial Port initialized with Baud rate = %x\n", brate);
- printf("SDRAM attributes:\n");
- printf("tRCD %d SCLK Cycles,tRP %d SCLK Cycles,tRAS %d SCLK Cycles"
- "tWR %d SCLK Cycles,CAS Latency %d SCLK cycles \n",
- 3, 3, 6, 2, 3);
- printf("SDRAM Begin: 0x%x\n", CFG_SDRAM_BASE);
- printf("Bank size = %d MB\n", CFG_MAX_RAM_SIZE >> 20);
-#endif
- gd->bd->bi_memstart = CFG_SDRAM_BASE;
- gd->bd->bi_memsize = CFG_MAX_RAM_SIZE;
- return CFG_MAX_RAM_SIZE;
+ gd->bd->bi_memstart = CONFIG_SYS_SDRAM_BASE;
+ gd->bd->bi_memsize = CONFIG_SYS_MAX_RAM_SIZE;
+ return gd->bd->bi_memsize;
}
#if defined(CONFIG_MISC_INIT_R)
@@ -236,11 +208,11 @@ int flash_post_test(int flags)
erase_block_flash(n);
printf("OK\r");
printf("--------Program block:%2d...", n);
- write_data(CFG_FLASH_BASE + offset, BLOCK_SIZE, pbuf);
+ write_data(CONFIG_SYS_FLASH_BASE + offset, BLOCK_SIZE, pbuf);
printf("OK\r");
printf("--------Verify block:%2d...", n);
for (i = 0; i < BLOCK_SIZE; i += 2) {
- if (*(unsigned short *)(CFG_FLASH_BASE + offset + i) !=
+ if (*(unsigned short *)(CONFIG_SYS_FLASH_BASE + offset + i) !=
*temp++) {
value = 1;
result = 1;
diff --git a/board/bf537-stamp/cmd_bf537led.c b/board/bf537-stamp/cmd_bf537led.c
index fa650f2..e77bb0c 100644
--- a/board/bf537-stamp/cmd_bf537led.c
+++ b/board/bf537-stamp/cmd_bf537led.c
@@ -196,6 +196,6 @@ void show_cmd_usage()
/* Register information for u-boot to find this command */
U_BOOT_CMD(led, 3, 1, do_bf537led,
- "led- Control BF537 stamp LEDs\n", USAGE_LONG);
+ "Control BF537 stamp LEDs", USAGE_LONG);
#endif
diff --git a/board/bf537-stamp/config.mk b/board/bf537-stamp/config.mk
index 1b87d53..719b97e 100644
--- a/board/bf537-stamp/config.mk
+++ b/board/bf537-stamp/config.mk
@@ -1,4 +1,6 @@
#
+# Copyright (c) 2005-2008 Analog Device Inc.
+#
# (C) Copyright 2001
# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
#
@@ -24,6 +26,9 @@
# This is not actually used for Blackfin boards so do not change it
#TEXT_BASE = do-not-use-me
+LDSCRIPT = $(obj)board/$(BOARDDIR)/u-boot.lds
+
# Set some default LDR flags based on boot mode.
-LDR_FLAGS-BFIN_BOOT_UART := --port g --gpio 6
+LDR_FLAGS-BFIN_BOOT_PARA := --bits 16 --dma 8
+LDR_FLAGS-BFIN_BOOT_UART := --port g --gpio 6
LDR_FLAGS += $(LDR_FLAGS-$(CONFIG_BFIN_BOOT_MODE))
diff --git a/board/bf537-stamp/nand.c b/board/bf537-stamp/nand.c
index 9800083..181e83d 100644
--- a/board/bf537-stamp/nand.c
+++ b/board/bf537-stamp/nand.c
@@ -1,5 +1,5 @@
/*
- * (C) Copyright 2006 Aubrey.Li, aubrey.li@analog.com
+ * Copyright (c) 2006-2007 Analog Devices Inc.
*
* See file CREDITS for list of people who contributed to this
* project.
@@ -23,8 +23,6 @@
#include <common.h>
#include <asm/io.h>
-#if defined(CONFIG_CMD_NAND)
-
#include <nand.h>
#define CONCAT(a,b,c,d) a ## b ## c ## d
@@ -43,14 +41,14 @@ static void bfin_hwcontrol(struct mtd_info *mtd, int cmd, unsigned int ctrl)
u32 IO_ADDR_W = (u32) this->IO_ADDR_W;
if (ctrl & NAND_CTRL_CHANGE) {
- if( ctrl & NAND_CLE )
- IO_ADDR_W = CFG_NAND_BASE + BFIN_NAND_CLE;
+ if (ctrl & NAND_CLE)
+ IO_ADDR_W = CONFIG_SYS_NAND_BASE + BFIN_NAND_CLE;
else
- IO_ADDR_W = CFG_NAND_BASE;
- if( ctrl & NAND_ALE )
- IO_ADDR_W = CFG_NAND_BASE + BFIN_NAND_ALE;
+ IO_ADDR_W = CONFIG_SYS_NAND_BASE;
+ if (ctrl & NAND_ALE)
+ IO_ADDR_W = CONFIG_SYS_NAND_BASE + BFIN_NAND_ALE;
else
- IO_ADDR_W = CFG_NAND_BASE;
+ IO_ADDR_W = CONFIG_SYS_NAND_BASE;
this->IO_ADDR_W = (void __iomem *) IO_ADDR_W;
}
this->IO_ADDR_R = this->IO_ADDR_W;
@@ -87,7 +85,7 @@ int bfin_device_ready(struct mtd_info *mtd)
* Members with a "?" were not set in the merged testing-NAND branch,
* so they are not set here either.
*/
-void board_nand_init(struct nand_chip *nand)
+int board_nand_init(struct nand_chip *nand)
{
*PORT(CONFIG_NAND_GPIO_PORT, _FER) &= ~BFIN_NAND_READY;
*PORT(CONFIG_NAND_GPIO_PORT, IO_DIR) &= ~BFIN_NAND_READY;
@@ -97,5 +95,6 @@ void board_nand_init(struct nand_chip *nand)
nand->ecc.mode = NAND_ECC_SOFT;
nand->dev_ready = bfin_device_ready;
nand->chip_delay = 30;
+
+ return 0;
}
-#endif
diff --git a/board/bf537-stamp/post-memory.c b/board/bf537-stamp/post-memory.c
index fa11991..9626f4c 100644
--- a/board/bf537-stamp/post-memory.c
+++ b/board/bf537-stamp/post-memory.c
@@ -6,7 +6,7 @@
#include <post.h>
#include <watchdog.h>
-#if CONFIG_POST & CFG_POST_MEMORY
+#if CONFIG_POST & CONFIG_SYS_POST_MEMORY
#define CLKIN 25000000
#define PATTERN1 0x5A5A5A5A
#define PATTERN2 0xAAAAAAAA
@@ -21,24 +21,24 @@ int post_init_sdram(int sclk);
void post_init_uart(int sclk);
const int pll[CCLK_NUM][SCLK_NUM][2] = {
- {{20, 4}, {20, 5}, {20, 10}}, /* CCLK = 500M */
- {{16, 4}, {16, 5}, {16, 8}}, /* CCLK = 400M */
- {{8, 2}, {8, 4}, {8, 5}}, /* CCLK = 200M */
- {{4, 1}, {4, 2}, {4, 4}} /* CCLK = 100M */
+ { {20, 4}, {20, 5}, {20, 10} }, /* CCLK = 500M */
+ { {16, 4}, {16, 5}, {16, 8} }, /* CCLK = 400M */
+ { {8, 2}, {8, 4}, {8, 5} }, /* CCLK = 200M */
+ { {4, 1}, {4, 2}, {4, 4} } /* CCLK = 100M */
};
const char *const log[CCLK_NUM][SCLK_NUM] = {
- {"CCLK-500Mhz SCLK-125Mhz: Writing...\0",
- "CCLK-500Mhz SCLK-100Mhz: Writing...\0",
- "CCLK-500Mhz SCLK- 50Mhz: Writing...\0",},
- {"CCLK-400Mhz SCLK-100Mhz: Writing...\0",
- "CCLK-400Mhz SCLK- 80Mhz: Writing...\0",
- "CCLK-400Mhz SCLK- 50Mhz: Writing...\0",},
- {"CCLK-200Mhz SCLK-100Mhz: Writing...\0",
- "CCLK-200Mhz SCLK- 50Mhz: Writing...\0",
- "CCLK-200Mhz SCLK- 40Mhz: Writing...\0",},
- {"CCLK-100Mhz SCLK-100Mhz: Writing...\0",
- "CCLK-100Mhz SCLK- 50Mhz: Writing...\0",
- "CCLK-100Mhz SCLK- 25Mhz: Writing...\0",},
+ {"CCLK-500MHz SCLK-125MHz: Writing...\0",
+ "CCLK-500MHz SCLK-100MHz: Writing...\0",
+ "CCLK-500MHz SCLK- 50MHz: Writing...\0",},
+ {"CCLK-400MHz SCLK-100MHz: Writing...\0",
+ "CCLK-400MHz SCLK- 80MHz: Writing...\0",
+ "CCLK-400MHz SCLK- 50MHz: Writing...\0",},
+ {"CCLK-200MHz SCLK-100MHz: Writing...\0",
+ "CCLK-200MHz SCLK- 50MHz: Writing...\0",
+ "CCLK-200MHz SCLK- 40MHz: Writing...\0",},
+ {"CCLK-100MHz SCLK-100MHz: Writing...\0",
+ "CCLK-100MHz SCLK- 50MHz: Writing...\0",
+ "CCLK-100MHz SCLK- 25MHz: Writing...\0",},
};
int memory_post_test(int flags)
@@ -71,10 +71,10 @@ int memory_post_test(int flags)
post_init_uart(sclk);
post_out_buff("\n\r\0");
post_out_buff(log[m][n]);
- for (addr = 0x0; addr < CFG_MAX_RAM_SIZE; addr += 4)
+ for (addr = 0x0; addr < CONFIG_SYS_MAX_RAM_SIZE; addr += 4)
*(unsigned long *)addr = PATTERN1;
post_out_buff("Reading...\0");
- for (addr = 0x0; addr < CFG_MAX_RAM_SIZE; addr += 4) {
+ for (addr = 0x0; addr < CONFIG_SYS_MAX_RAM_SIZE; addr += 4) {
if ((*(unsigned long *)addr) != PATTERN1) {
post_out_buff("Error\n\r\0");
ret = 0;
@@ -119,7 +119,8 @@ void post_out_buff(char *buff)
{
int i = 0;
- for (i = 0; i < 0x80000; i++) ;
+ for (i = 0; i < 0x80000; i++)
+ ;
i = 0;
while ((buff[i] != '\0') && (i != 100)) {
while (!(*pUART_LSR & 0x20)) ;
@@ -127,7 +128,8 @@ void post_out_buff(char *buff)
SSYNC();
i++;
}
- for (i = 0; i < 0x80000; i++) ;
+ for (i = 0; i < 0x80000; i++)
+ ;
}
/* Using sw10-PF5 as the hotkey */
@@ -150,9 +152,8 @@ int post_key_pressed(void)
value = 0;
goto key_pressed;
}
- if (value != 0) {
+ if (value != 0)
goto key_pressed;
- }
for (n = 0; n < KEY_DELAY; n++)
asm("nop");
}
@@ -164,9 +165,8 @@ int post_key_pressed(void)
value = 0;
goto key_pressed;
}
- if (value != 0) {
+ if (value != 0)
goto key_pressed;
- }
for (n = 0; n < KEY_DELAY; n++)
asm("nop");
}
@@ -178,9 +178,8 @@ int post_key_pressed(void)
value = 0;
goto key_pressed;
}
- if (value != 0) {
+ if (value != 0)
goto key_pressed;
- }
for (n = 0; n < KEY_DELAY; n++)
asm("nop");
}
@@ -318,5 +317,5 @@ int post_init_sdram(int sclk)
return mem_SDRRC;
}
-#endif /* CONFIG_POST & CFG_POST_MEMORY */
+#endif /* CONFIG_POST & CONFIG_SYS_POST_MEMORY */
#endif /* CONFIG_POST */
diff --git a/board/bf537-stamp/spi_flash.c b/board/bf537-stamp/spi_flash.c
index 7c73ddd..7b764b4 100644
--- a/board/bf537-stamp/spi_flash.c
+++ b/board/bf537-stamp/spi_flash.c
@@ -3,7 +3,7 @@
*
* Enter bugs at http://blackfin.uclinux.org/
*
- * Copyright (c) 2005-2007 Analog Devices Inc.
+ * Copyright (c) 2005-2008 Analog Devices Inc.
*
* Licensed under the GPL-2 or later.
*/
@@ -163,7 +163,9 @@ static struct manufacturer_info flash_manufacturers[] = {
#define TIMEOUT 5000 /* timeout of 5 seconds */
-/* BF54x support */
+/* If part has multiple SPI flashes, assume SPI0 as that is
+ * the one we can boot off of ...
+ */
#ifndef pSPI_CTL
# define pSPI_CTL pSPI0_CTL
# define pSPI_BAUD pSPI0_BAUD
@@ -171,23 +173,14 @@ static struct manufacturer_info flash_manufacturers[] = {
# define pSPI_RDBR pSPI0_RDBR
# define pSPI_STAT pSPI0_STAT
# define pSPI_TDBR pSPI0_TDBR
-# define SPI0_SCK 0x0001
-# define SPI0_MOSI 0x0004
-# define SPI0_MISO 0x0002
-# define SPI0_SEL1 0x0010
#endif
/* Default to the SPI SSEL that we boot off of:
* BF54x, BF537, (everything new?): SSEL1
- * BF533, BF561: SSEL2
+ * BF51x, BF533, BF561: SSEL2
*/
#ifndef CONFIG_SPI_FLASH_SSEL
-# if defined(__ADSPBF531__) || defined(__ADSPBF532__) || \
- defined(__ADSPBF533__) || defined(__ADSPBF561__)
-# define CONFIG_SPI_FLASH_SSEL 2
-# else
-# define CONFIG_SPI_FLASH_SSEL 1
-# endif
+# define CONFIG_SPI_FLASH_SSEL BFIN_BOOT_SPI_SSEL
#endif
#define SSEL_MASK (1 << CONFIG_SPI_FLASH_SSEL)
@@ -200,12 +193,15 @@ static void SPI_INIT(void)
/* enable SPI pins: SSEL, MOSI, MISO, SCK */
#ifdef __ADSPBF54x__
- *pPORTE_FER |= (SPI0_SCK | SPI0_MOSI | SPI0_MISO | SPI0_SEL1);
+ *pPORTE_FER |= (PE0 | PE1 | PE2 | PE4);
#elif defined(__ADSPBF534__) || defined(__ADSPBF536__) || defined(__ADSPBF537__)
*pPORTF_FER |= (PF10 | PF11 | PF12 | PF13);
#elif defined(__ADSPBF52x__)
bfin_write_PORTG_MUX((bfin_read_PORTG_MUX() & ~PORT_x_MUX_0_MASK) | PORT_x_MUX_0_FUNC_3);
bfin_write_PORTG_FER(bfin_read_PORTG_FER() | PG1 | PG2 | PG3 | PG4);
+#elif defined(__ADSPBF51x__)
+ bfin_write_PORTG_MUX((bfin_read_PORTG_MUX() & ~PORT_x_MUX_7_MASK) | PORT_x_MUX_7_FUNC_1);
+ bfin_write_PORTG_FER(bfin_read_PORTG_FER() | PG12 | PG13 | PG14 | PG15);
#endif
/* initate communication upon write of TDBR */
@@ -412,7 +408,7 @@ void spi_init_f(void)
*/
void spi_init_r(void)
{
-#if defined(CONFIG_POST) && (CONFIG_POST & CFG_POST_SPI)
+#if defined(CONFIG_POST) && (CONFIG_POST & CONFIG_SYS_POST_SPI)
/* Our testing strategy here is pretty basic:
* - fill src memory with an 8-bit pattern
* - write the src memory to the SPI flash
@@ -797,8 +793,8 @@ int eeprom_info(void)
ret = 1;
else
printf("SPI Device: %s 0x%02X (%s) 0x%02X 0x%02X\n"
- "Parameters: num sectors = %i, sector size = %i, write size = %i\n"
- "Flash Size: %i mbit (%i mbyte)\n"
+ "Parameters: num sectors = %lu, sector size = %lu, write size = %i\n"
+ "Flash Size: %lu mbit (%lu mbyte)\n"
"Status: 0x%02X\n",
flash.flash->name, flash.manufacturer_id, flash.manufacturer->name,
flash.device_id1, flash.device_id2, flash.num_sectors,
diff --git a/board/bf537-stamp/u-boot.lds.S b/board/bf537-stamp/u-boot.lds.S
index 4e7fd7c..76daa75 100644
--- a/board/bf537-stamp/u-boot.lds.S
+++ b/board/bf537-stamp/u-boot.lds.S
@@ -28,6 +28,8 @@
#include <config.h>
#include <asm/blackfin.h>
#undef ALIGN
+#undef ENTRY
+#undef bfin
/* If we don't actually load anything into L1 data, this will avoid
* a syntax error. If we do actually load something into L1 data,
@@ -36,7 +38,7 @@
* for different CPU's which may lack non-cache L1 data.
*/
#ifndef L1_DATA_B_SRAM
-# define L1_DATA_B_SRAM CFG_MONITOR_BASE
+# define L1_DATA_B_SRAM CONFIG_SYS_MONITOR_BASE
# define L1_DATA_B_SRAM_SIZE 0
#endif
@@ -45,15 +47,18 @@ OUTPUT_ARCH(bfin)
/* The 0xC offset is so we don't clobber the tiny LDR jump block. */
MEMORY
{
- ram : ORIGIN = CFG_MONITOR_BASE, LENGTH = CFG_MONITOR_LEN
+ ram : ORIGIN = CONFIG_SYS_MONITOR_BASE, LENGTH = CONFIG_SYS_MONITOR_LEN
l1_code : ORIGIN = L1_INST_SRAM+0xC, LENGTH = L1_INST_SRAM_SIZE
l1_data : ORIGIN = L1_DATA_B_SRAM, LENGTH = L1_DATA_B_SRAM_SIZE
}
+ENTRY(_start)
SECTIONS
{
.text :
{
+ cpu/blackfin/start.o (.text .text.*)
+
#ifdef ENV_IS_EMBEDDED
/* WARNING - the following is hand-optimized to fit within
* the sector before the environment sector. If it throws
@@ -61,17 +66,20 @@ SECTIONS
* it linked after the configuration sector.
*/
- cpu/blackfin/start.o (.text)
- cpu/blackfin/traps.o (.text)
- cpu/blackfin/interrupt.o (.text)
- cpu/blackfin/serial.o (.text)
- common/dlmalloc.o (.text)
- lib_generic/crc32.o (.text)
+ cpu/blackfin/traps.o (.text .text.*)
+ cpu/blackfin/interrupt.o (.text .text.*)
+ cpu/blackfin/serial.o (.text .text.*)
+ common/dlmalloc.o (.text .text.*)
+ lib_generic/crc32.o (.text .text.*)
. = DEFINED(env_offset) ? env_offset : .;
- common/env_embedded.o (.text)
+ common/env_embedded.o (.text .text.*)
#endif
+ __initcode_start = .;
+ cpu/blackfin/initcode.o (.text .text.*)
+ __initcode_end = .;
+
*(.text .text.*)
} >ram
generated by cgit v1.1 at 2025-01-05 06:22:08 +0000