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-rw-r--r--board/atmel/at91sam9260ek/at91sam9260ek.c19
-rw-r--r--board/atmel/at91sam9263ek/at91sam9263ek.c19
-rw-r--r--board/atmel/at91sam9m10g45ek/at91sam9m10g45ek.c19
3 files changed, 4 insertions, 53 deletions
diff --git a/board/atmel/at91sam9260ek/at91sam9260ek.c b/board/atmel/at91sam9260ek/at91sam9260ek.c
index 263de49..7f14af1 100644
--- a/board/atmel/at91sam9260ek/at91sam9260ek.c
+++ b/board/atmel/at91sam9260ek/at91sam9260ek.c
@@ -12,7 +12,6 @@
#include <asm/arch/at91sam9_smc.h>
#include <asm/arch/at91_common.h>
#include <asm/arch/at91_pmc.h>
-#include <asm/arch/at91_rstc.h>
#include <asm/arch/gpio.h>
#include <atmel_mci.h>
@@ -73,8 +72,6 @@ static void at91sam9260ek_macb_hw_init(void)
{
struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
struct at91_port *pioa = (struct at91_port *)ATMEL_BASE_PIOA;
- struct at91_rstc *rstc = (struct at91_rstc *)ATMEL_BASE_RSTC;
- unsigned long erstl;
/* Enable EMAC clock */
writel(1 << ATMEL_ID_EMAC0, &pmc->pcer);
@@ -98,21 +95,7 @@ static void at91sam9260ek_macb_hw_init(void)
pin_to_mask(AT91_PIN_PA28),
&pioa->pudr);
- erstl = readl(&rstc->mr) & AT91_RSTC_MR_ERSTL_MASK;
-
- /* Need to reset PHY -> 500ms reset */
- writel(AT91_RSTC_KEY | AT91_RSTC_MR_ERSTL(13) |
- AT91_RSTC_MR_URSTEN, &rstc->mr);
-
- writel(AT91_RSTC_KEY | AT91_RSTC_CR_EXTRST, &rstc->cr);
-
- /* Wait for end hardware reset */
- while (!(readl(&rstc->sr) & AT91_RSTC_SR_NRSTL))
- ;
-
- /* Restore NRST value */
- writel(AT91_RSTC_KEY | erstl | AT91_RSTC_MR_URSTEN,
- &rstc->mr);
+ at91_phy_reset();
/* Re-enable pull-up */
writel(pin_to_mask(AT91_PIN_PA14) |
diff --git a/board/atmel/at91sam9263ek/at91sam9263ek.c b/board/atmel/at91sam9263ek/at91sam9263ek.c
index 2e9246f..d42a173 100644
--- a/board/atmel/at91sam9263ek/at91sam9263ek.c
+++ b/board/atmel/at91sam9263ek/at91sam9263ek.c
@@ -12,7 +12,6 @@
#include <asm/arch/at91sam9_smc.h>
#include <asm/arch/at91_common.h>
#include <asm/arch/at91_pmc.h>
-#include <asm/arch/at91_rstc.h>
#include <asm/arch/at91_matrix.h>
#include <asm/arch/at91_pio.h>
#include <asm/arch/clk.h>
@@ -82,10 +81,9 @@ static void at91sam9263ek_nand_hw_init(void)
#ifdef CONFIG_MACB
static void at91sam9263ek_macb_hw_init(void)
{
- unsigned long erstl;
at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC;
at91_pio_t *pio = (at91_pio_t *) ATMEL_BASE_PIO;
- at91_rstc_t *rstc = (at91_rstc_t *) ATMEL_BASE_RSTC;
+
/* Enable clock */
writel(1 << ATMEL_ID_EMAC, &pmc->pcer);
@@ -97,23 +95,10 @@ static void at91sam9263ek_macb_hw_init(void)
*
* PHY has internal pull-down
*/
-
writel(1 << 25, &pio->pioc.pudr);
writel((1 << 25) | (1 <<26), &pio->pioe.pudr);
- erstl = readl(&rstc->mr) & AT91_RSTC_MR_ERSTL_MASK;
-
- /* Need to reset PHY -> 500ms reset */
- writel(AT91_RSTC_KEY | AT91_RSTC_MR_ERSTL(0x0D) |
- AT91_RSTC_MR_URSTEN, &rstc->mr);
-
- writel(AT91_RSTC_KEY | AT91_RSTC_CR_EXTRST, &rstc->cr);
- /* Wait for end hardware reset */
- while (!(readl(&rstc->sr) & AT91_RSTC_SR_NRSTL))
- ;
-
- /* Restore NRST value */
- writel(AT91_RSTC_KEY | erstl | AT91_RSTC_MR_URSTEN, &rstc->mr);
+ at91_phy_reset();
/* Re-enable pull-up */
writel(1 << 25, &pio->pioc.puer);
diff --git a/board/atmel/at91sam9m10g45ek/at91sam9m10g45ek.c b/board/atmel/at91sam9m10g45ek/at91sam9m10g45ek.c
index 6a071f6..b7e2efd 100644
--- a/board/atmel/at91sam9m10g45ek/at91sam9m10g45ek.c
+++ b/board/atmel/at91sam9m10g45ek/at91sam9m10g45ek.c
@@ -12,7 +12,6 @@
#include <asm/arch/at91sam9_smc.h>
#include <asm/arch/at91_common.h>
#include <asm/arch/at91_pmc.h>
-#include <asm/arch/at91_rstc.h>
#include <asm/arch/gpio.h>
#include <asm/arch/clk.h>
#include <lcd.h>
@@ -88,8 +87,6 @@ static void at91sam9m10g45ek_macb_hw_init(void)
{
struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
struct at91_port *pioa = (struct at91_port *)ATMEL_BASE_PIOA;
- struct at91_rstc *rstc = (struct at91_rstc *)ATMEL_BASE_RSTC;
- unsigned long erstl;
/* Enable clock */
writel(1 << ATMEL_ID_EMAC, &pmc->pcer);
@@ -107,21 +104,7 @@ static void at91sam9m10g45ek_macb_hw_init(void)
pin_to_mask(AT91_PIN_PA13),
&pioa->pudr);
- erstl = readl(&rstc->mr) & AT91_RSTC_MR_ERSTL_MASK;
-
- /* Need to reset PHY -> 500ms reset */
- writel(AT91_RSTC_KEY | AT91_RSTC_MR_ERSTL(13) |
- AT91_RSTC_MR_URSTEN, &rstc->mr);
-
- writel(AT91_RSTC_KEY | AT91_RSTC_CR_EXTRST, &rstc->cr);
-
- /* Wait for end hardware reset */
- while (!(readl(&rstc->sr) & AT91_RSTC_SR_NRSTL))
- ;
-
- /* Restore NRST value */
- writel(AT91_RSTC_KEY | erstl | AT91_RSTC_MR_URSTEN,
- &rstc->mr);
+ at91_phy_reset();
/* Re-enable pull-up */
writel(pin_to_mask(AT91_PIN_PA15) |